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authorMike Frysinger <vapier@gentoo.org>2023-12-24 03:53:03 -0500
committerMike Frysinger <vapier@gentoo.org>2023-12-24 03:56:00 -0500
commitfed277fe1516127a0414eeda0b17a8bb6b318baf (patch)
tree993b693d57dee10c68b2a31eac98e53c1c54b1f3 /sim
parent1bdba1b7730fbdb848b50ae05f8ae4a0b693a0e3 (diff)
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sim: sh: fix plds Dz,MACL implementation
The plds Dz,MACL insn stores the Dz bit into MACL. The current code was storing the "res" variable into Dz and then into MACL, but not setting "res" to anything. Delete that logic and make it match the existing plds Dz,MACH insn.
Diffstat (limited to 'sim')
-rw-r--r--sim/sh/gencode.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index 9683dc4..8ef3f3e 100644
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -2439,7 +2439,7 @@ static op ppi_tab[] =
"if (0xa05f >> z & 1)",
" RAISE_EXCEPTION (SIGILL);",
"else",
- " MACL = DSP_R (z) = res;",
+ " MACL = DSP_R (z);",
"return;",
},
/* sh4a */