Index: gdb/ChangeLog

2003-05-07  Andrew Cagney  <cagney@redhat.com>

	* d10v-tdep.c (remote_d10v_translate_xfer_address): Add
	"regcache".
	(d10v_print_registers_info): Update.
	(d10v_dmap_register, d10v_imap_register): Delete functions.
	(struct gdbarch_tdep): Add "regcache" parameter to "dmap_register"
	and "imap_register".
	(d10v_ts2_dmap_register, d10v_ts2_imap_register): Add "regcache".
	(d10v_ts3_dmap_register, d10v_ts3_imap_register): Add "regcache".
	* arch-utils.c (generic_remote_translate_xfer_address): Add
	"regcache" and "gdbarch" parameters.
	* gdbarch.sh (REMOTE_TRANSLATE_XFER_ADDRESS): Add "regcache"
	parameter.  Change class to multi-arch.
	* gdbarch.h, gdbarch.c: Re-generate.
	* remote.c (remote_xfer_memory): Use
	gdbarch_remote_translate_xfer_address.

Index: include/gdb/ChangeLog
2003-05-07  Andrew Cagney  <cagney@redhat.com>

	* sim-d10v.h (sim_d10v_translate_addr): Add regcache parameter.
	(sim_d10v_translate_imap_addr): Add regcache parameter.
	(sim_d10v_translate_dmap_addr): Ditto.

Index: sim/d10v/ChangeLog
2003-05-07  Andrew Cagney  <cagney@redhat.com>

	* interp.c (sim_d10v_translate_addr): Add "regcache" parameter.
	(sim_d10v_translate_imap_addr): Ditto.
	(sim_d10v_translate_dmap_addr): Ditto.
	(xfer_mem): Pass NULL regcache to sim_d10v_translate_addr.
	(dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr.
	(dmap_register, imap_register): Add "regcache" parameter.
	(imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr.
	(sim_fetch_register): Pass NULL regcache to imap_register and
	dmap_register.

2 files changed, 36 insertions, 18 deletions

diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index 54d84e6..3256284 100644
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,3 +1,15 @@
+2003-05-07  Andrew Cagney  <cagney@redhat.com>
+
+	* interp.c (sim_d10v_translate_addr): Add "regcache" parameter.
+	(sim_d10v_translate_imap_addr): Ditto.
+	(sim_d10v_translate_dmap_addr): Ditto.
+	(xfer_mem): Pass NULL regcache to sim_d10v_translate_addr.
+	(dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr.
+	(dmap_register, imap_register): Add "regcache" parameter.
+	(imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr.
+	(sim_fetch_register): Pass NULL regcache to imap_register and
+	dmap_register.
+
 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 
 	* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c
index 718acca..30239ab 100644
--- a/sim/d10v/interp.c
+++ b/sim/d10v/interp.c
@@ -363,7 +363,7 @@ set_dmap_register (int reg_nr, unsigned long value)
 }
 
 static unsigned long
-dmap_register (int reg_nr)
+dmap_register (void *regcache, int reg_nr)
 {
   uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
 			   + DMAP0_OFFSET + 2 * reg_nr);
@@ -386,7 +386,7 @@ set_imap_register (int reg_nr, unsigned long value)
 }
 
 static unsigned long
-imap_register (int reg_nr)
+imap_register (void *regcache, int reg_nr)
 {
   uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
 			   + IMAP0_OFFSET + 2 * reg_nr);
@@ -440,7 +440,9 @@ unsigned long
 sim_d10v_translate_dmap_addr (unsigned long offset,
 			      int nr_bytes,
 			      unsigned long *phys,
-			      unsigned long (*dmap_register) (int reg_nr))
+			      void *regcache,
+			      unsigned long (*dmap_register) (void *regcache,
+							      int reg_nr))
 {
   short map;
   int regno;
@@ -457,7 +459,7 @@ sim_d10v_translate_dmap_addr (unsigned long offset,
       /* Don't cross a BLOCK boundary */
       nr_bytes = DMAP_BLOCK_SIZE - (offset % DMAP_BLOCK_SIZE);
     }
-  map = dmap_register (regno);
+  map = dmap_register (regcache, regno);
   if (regno == 3)
     {
       /* Always maps to data memory */
@@ -498,7 +500,9 @@ unsigned long
 sim_d10v_translate_imap_addr (unsigned long offset,
 			      int nr_bytes,
 			      unsigned long *phys,
-			      unsigned long (*imap_register) (int reg_nr))
+			      void *regcache,
+			      unsigned long (*imap_register) (void *regcache,
+							      int reg_nr))
 {
   short map;
   int regno;
@@ -517,7 +521,7 @@ sim_d10v_translate_imap_addr (unsigned long offset,
       /* Don't cross a BLOCK boundary */
       nr_bytes = IMAP_BLOCK_SIZE - offset;
     }
-  map = imap_register (regno);
+  map = imap_register (regcache, regno);
   sp = (map & 0x3000) >> 12;
   segno = (map & 0x007f);
   switch (sp)
@@ -549,8 +553,11 @@ unsigned long
 sim_d10v_translate_addr (unsigned long memaddr,
 			 int nr_bytes,
 			 unsigned long *targ_addr,
-			 unsigned long (*dmap_register) (int reg_nr),
-			 unsigned long (*imap_register) (int reg_nr))
+			 void *regcache,
+			 unsigned long (*dmap_register) (void *regcache,
+							 int reg_nr),
+			 unsigned long (*imap_register) (void *regcache,
+							 int reg_nr))
 {
   unsigned long phys;
   unsigned long seg;
@@ -614,12 +621,12 @@ sim_d10v_translate_addr (unsigned long memaddr,
       break;
 
     case 0x10:			/* in logical data address segment */
-      nr_bytes = sim_d10v_translate_dmap_addr (off, nr_bytes, &phys,
+      nr_bytes = sim_d10v_translate_dmap_addr (off, nr_bytes, &phys, regcache,
 					       dmap_register);
       break;
 
     case 0x11:			/* in logical instruction address segment */
-      nr_bytes = sim_d10v_translate_imap_addr (off, nr_bytes, &phys,
+      nr_bytes = sim_d10v_translate_imap_addr (off, nr_bytes, &phys, regcache,
 					       imap_register);
       break;
 
@@ -720,10 +727,8 @@ xfer_mem (SIM_ADDR virt,
       uint8 *memory;
       unsigned long phys;
       int phys_size;
-      phys_size = sim_d10v_translate_addr (virt, size,
-					   &phys,
-					   dmap_register,
-					   imap_register);
+      phys_size = sim_d10v_translate_addr (virt, size, &phys, NULL,
+					   dmap_register, imap_register);
       if (phys_size == 0)
 	return xfered;
 
@@ -892,7 +897,7 @@ dmem_addr (uint16 offset)
      things like ``0xfffe + 0x0e60 == 0x10e5d''.  Since offset's type
      is uint16 this is modulo'ed onto 0x0e5d. */
 
-  phys_size = sim_d10v_translate_dmap_addr (offset, 1, &phys,
+  phys_size = sim_d10v_translate_dmap_addr (offset, 1, &phys, NULL,
 					    dmap_register);
   if (phys_size == 0)
     {
@@ -919,7 +924,8 @@ imem_addr (uint32 offset)
 {
   unsigned long phys;
   uint8 *mem;
-  int phys_size = sim_d10v_translate_imap_addr (offset, 1, &phys, imap_register);
+  int phys_size = sim_d10v_translate_imap_addr (offset, 1, &phys, NULL,
+						imap_register);
   if (phys_size == 0)
     {
       return State.mem.fault;
@@ -1367,14 +1373,14 @@ sim_fetch_register (sd, rn, memory, length)
       break;
     case SIM_D10V_IMAP0_REGNUM:
     case SIM_D10V_IMAP1_REGNUM:
-      WRITE_16 (memory, imap_register (rn - SIM_D10V_IMAP0_REGNUM));
+      WRITE_16 (memory, imap_register (NULL, rn - SIM_D10V_IMAP0_REGNUM));
       size = 2;
       break;
     case SIM_D10V_DMAP0_REGNUM:
     case SIM_D10V_DMAP1_REGNUM:
     case SIM_D10V_DMAP2_REGNUM:
     case SIM_D10V_DMAP3_REGNUM:
-      WRITE_16 (memory, dmap_register (rn - SIM_D10V_DMAP0_REGNUM));
+      WRITE_16 (memory, dmap_register (NULL, rn - SIM_D10V_DMAP0_REGNUM));
       size = 2;
       break;
     case SIM_D10V_TS2_DMAP_REGNUM: