import gdb-1999-08-23 snapshot

4 files changed, 75 insertions, 32 deletions

diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index 26dcb3c..bfaafcb 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,3 +1,15 @@
+1999-08-20  Doug Evans  <devans@casey.cygnus.com>
+
+	* genmloop.sh: New args -parallel-generic-write, -parallel-only.
+	* cgen-engine.h (SEMANTIC_FN): Don't use version with PAREXEC
+	buffer arg if WITH_PARALLEL_GENWRITE.
+	(struct insn_sem): Handle WITH_PARALLEL_GENWRITE.
+	(struct idesc): Ditto.
+
+Wed Aug 18 18:17:28 1999  Doug Evans  <devans@canuck.cygnus.com>
+
+	* sim-model.c (model_option_handler): Add \n to error message.
+
 1999-08-08  Doug Evans  <devans@casey.cygnus.com>
 
 	* cgen-engine.h (SEM_FN_NAME,SEMF_FN_NAME): Delete.
diff --git a/sim/common/cgen-engine.h b/sim/common/cgen-engine.h
index fbcf3e5..d8bda1a 100644
--- a/sim/common/cgen-engine.h
+++ b/sim/common/cgen-engine.h
@@ -90,7 +90,7 @@ typedef void (EXTRACT_FN) (SIM_CPU *, IADDR, CGEN_INSN_INT, ARGBUF *);
 
 /* Instruction fields are extracted into ARGBUF before calling the
    semantic routine.  */
-#if HAVE_PARALLEL_INSNS
+#if HAVE_PARALLEL_INSNS && ! WITH_PARALLEL_GENWRITE
 typedef SEM_PC (SEMANTIC_FN) (SIM_CPU *, SEM_ARG, PAREXEC *);
 #else
 typedef SEM_PC (SEMANTIC_FN) (SIM_CPU *, SEM_ARG);
@@ -103,7 +103,7 @@ typedef unsigned int SEM_STATUS;
 
 /* Instruction fields are extracted by the semantic routine.
    ??? TODO: multi word insns.  */
-#if HAVE_PARALLEL_INSNS
+#if HAVE_PARALLEL_INSNS && ! WITH_PARALLEL_GENWRITE
 typedef SEM_STATUS (SEMANTIC_FN) (SIM_CPU *, SEM_ARG, PAREXEC *, CGEN_INSN_INT);
 #else
 typedef SEM_STATUS (SEMANTIC_FN) (SIM_CPU *, SEM_ARG, CGEN_INSN_INT);
@@ -329,8 +329,8 @@ do { \
 /* Instruction information.  */
 
 /* Sanity check, at most one of these may be true.  */
-#if WITH_PARALLEL_READ && WITH_PARALLEL_WRITE
-#error "Both WITH_PARALLEL_READ && WITH_PARALLEL_WRITE can't be true."
+#if WITH_PARALLEL_READ + WITH_PARALLEL_WRITE + WITH_PARALLEL_GENWRITE > 1
+#error "At most one of WITH_PARALLEL_{READ,WRITE,GENWRITE} can be true."
 #endif
 
 /* Compile time computable instruction data.  */
@@ -346,7 +346,7 @@ struct insn_sem {
   /* Semantic format number.  */
   int sfmt;
 
-#if WITH_PARALLEL_READ || WITH_PARALLEL_WRITE
+#if HAVE_PARALLEL_INSNS && ! WITH_PARALLEL_ONLY
   /* Index in IDESC table of parallel handler.  */
   int par_index;
 #endif
@@ -397,7 +397,7 @@ struct idesc {
 #endif
 
   /* Parallel support.  */
-#if WITH_PARALLEL_READ || WITH_PARALLEL_WRITE
+#if HAVE_PARALLEL_INSNS && (! WITH_PARALLEL_ONLY || (WITH_PARALLEL_ONLY && ! WITH_PARALLEL_GENWRITE))
   /* Pointer to parallel handler if serial insn.
      Pointer to readahead/writeback handler if parallel insn.  */
   struct idesc *par_idesc;
diff --git a/sim/common/genmloop.sh b/sim/common/genmloop.sh
index 8a1b8d6..115ae8c 100644
--- a/sim/common/genmloop.sh
+++ b/sim/common/genmloop.sh
@@ -85,6 +85,8 @@
 #
 # -parallel-read: support parallel execution with read-before-exec support.
 # -parallel-write: support parallel execution with write-after-exec support.
+# -parallel-generic-write: support parallel execution with generic queued
+#       writes.
 #
 #	One of these options is specified in addition to -simple, -scache,
 #	-pbb.  Note that while the code can determine if the cpu supports
@@ -92,6 +94,12 @@
 #	technically unnecessary], having this option cuts down on the clutter
 #	in the result.
 #
+# -parallel-only: semantic code only supports parallel version of insn
+#
+#	Semantic code only supports parallel versions of each insn.
+#	Things can be sped up by generating both serial and parallel versions
+#	and is better suited to mixed parallel architectures like the m32r.
+#
 # -switch file: specify file containing semantics implemented as a switch()
 #
 # -cpu <cpu-family>
@@ -116,6 +124,7 @@ type=mono
 #full_switch=
 #pbb=
 parallel=no
+parallel_only=no
 switch=
 cpu="unknown"
 infile=""
@@ -134,6 +143,8 @@ do
 	-no-parallel) ;;
 	-parallel-read) parallel=read ;;
 	-parallel-write) parallel=write ;;
+	-parallel-generic-write) parallel=genwrite ;;
+	-parallel-only) parallel_only=yes ;;
 	-switch) shift ; switch=$1 ;;
 	-cpu) shift ; cpu=$1 ;;
 	-infile) shift ; infile=$1 ;;
@@ -189,22 +200,36 @@ fi
 
 echo ""
 echo "/* HAVE_PARALLEL_INSNS: non-zero if cpu can parallelly execute > 1 insn.  */"
-if [ x$parallel != xno ] ; then
-	echo "#define HAVE_PARALLEL_INSNS 1"
-	if [ x$parallel = xread ] ; then
-	    echo "/* Parallel execution is supported by read-before-exec.  */"
-	    echo "#define WITH_PARALLEL_READ 1"
-	    echo "#define WITH_PARALLEL_WRITE 0"
-	else
-	    echo "/* Parallel execution is supported by write-after-exec.  */"
-	    echo "#define WITH_PARALLEL_READ 0"
-	    echo "#define WITH_PARALLEL_WRITE 1"
-	fi
-else
-	echo "#define HAVE_PARALLEL_INSNS 0"
-	echo "#define WITH_PARALLEL_READ 0"
-	echo "#define WITH_PARALLEL_WRITE 0"
-fi
+# blah blah blah, other ways to do this, blah blah blah
+case x$parallel in
+xno)
+    echo "#define HAVE_PARALLEL_INSNS 0"
+    echo "#define WITH_PARALLEL_READ 0"
+    echo "#define WITH_PARALLEL_WRITE 0"
+    echo "#define WITH_PARALLEL_GENWRITE 0"
+    ;;
+xread)
+    echo "#define HAVE_PARALLEL_INSNS 1"
+    echo "/* Parallel execution is supported by read-before-exec.  */"
+    echo "#define WITH_PARALLEL_READ 1"
+    echo "#define WITH_PARALLEL_WRITE 0"
+    echo "#define WITH_PARALLEL_GENWRITE 0"
+    ;;
+xwrite)
+    echo "#define HAVE_PARALLEL_INSNS 1"
+    echo "/* Parallel execution is supported by write-after-exec.  */"
+    echo "#define WITH_PARALLEL_READ 0"
+    echo "#define WITH_PARALLEL_WRITE 1"
+    echo "#define WITH_PARALLEL_GENWRITE 0"
+    ;;
+xgenwrite)
+    echo "#define HAVE_PARALLEL_INSNS 1"
+    echo "/* Parallel execution is supported by generic write-after-exec.  */"
+    echo "#define WITH_PARALLEL_READ 0"
+    echo "#define WITH_PARALLEL_WRITE 0"
+    echo "#define WITH_PARALLEL_GENWRITE 1"
+    ;;
+esac
 
 if [ "x$switch" != x ] ; then
 	echo ""
@@ -360,13 +385,15 @@ void
 
 EOF
 
-if [ x$parallel != xno ] ; then
-  cat << EOF
+case x$parallel in
+xread | xwrite)
+    cat << EOF
   PAREXEC pbufs[MAX_PARALLEL_INSNS];
   PAREXEC *par_exec;
 
 EOF
-fi
+    ;;
+esac
 
 # Any initialization code before looping starts.
 # Note that this code may declare some locals.
@@ -1118,13 +1145,15 @@ void
 
 EOF
 
-if [ x$parallel != xno ] ; then
-  cat << EOF
+case x$parallel in
+xread | xwrite)
+    cat << EOF
   PAREXEC pbufs[MAX_PARALLEL_INSNS];
   PAREXEC *par_exec = &pbufs[0];
 
 EOF
-fi
+    ;;
+esac
 
 # Any initialization code before looping starts.
 # Note that this code may declare some locals.
@@ -1208,13 +1237,15 @@ void
 
 EOF
 
-if [ x$parallel != xno ] ; then
-  cat << EOF
+case x$parallel in
+xread | xwrite)
+    cat << EOF
   PAREXEC pbufs[MAX_PARALLEL_INSNS];
   PAREXEC *par_exec = &pbufs[0];
 
 EOF
-fi
+    ;;
+esac
 
 # Any initialization code before looping starts.
 # Note that this code may declare some locals.
diff --git a/sim/common/sim-model.c b/sim/common/sim-model.c
index 8037dcd..3cfdc15 100644
--- a/sim/common/sim-model.c
+++ b/sim/common/sim-model.c
@@ -51,7 +51,7 @@ model_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
 	const MODEL *model = sim_model_lookup (arg);
 	if (! model)
 	  {
-	    sim_io_eprintf (sd, "unknown model `%s'", arg);
+	    sim_io_eprintf (sd, "unknown model `%s'\n", arg);
 	    return SIM_RC_FAIL;
 	  }
 	sim_model_set (sd, cpu, model);