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| author | Dave Brolley <brolley@redhat.com> | 2003-09-19 17:38:57 +0000 |
|---|---|---|
| committer | Dave Brolley <brolley@redhat.com> | 2003-09-19 17:38:57 +0000 |
| commit | d45d015e0c1d150d10005bfd8f4829f0eeb1a681 (patch) | |
| tree | af5542a71ce532753f0182ec92f7dfc39e35b4ea /sim | |
| parent | 5b03f2662bf6d0e139ee4fbd089723a2e1b3deee (diff) | |
| download | gdb-d45d015e0c1d150d10005bfd8f4829f0eeb1a681.zip gdb-d45d015e0c1d150d10005bfd8f4829f0eeb1a681.tar.gz gdb-d45d015e0c1d150d10005bfd8f4829f0eeb1a681.tar.bz2 | |
2003-09-19 Dave Brolley <brolley@redhat.com>
* sim/frv/rstqf.cgs: Use nldq instead of nldqi.
* sim/frv/rstq.cgs: Use nldq instead of nldqi.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/testsuite/sim/frv/rstq.cgs | 2 | ||||
| -rw-r--r-- | sim/testsuite/sim/frv/rstqf.cgs | 3 |
3 files changed, 8 insertions, 2 deletions
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog index ec6b7e3..451a9ed 100644 --- a/sim/testsuite/ChangeLog +++ b/sim/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2003-09-19 Dave Brolley <brolley@redhat.com> + + * sim/frv/rstqf.cgs: Use nldq instead of nldqi. + * sim/frv/rstq.cgs: Use nldq instead of nldqi. + 2003-09-11 Michael Snyder <msnyder@redhat.com> * sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273], diff --git a/sim/testsuite/sim/frv/rstq.cgs b/sim/testsuite/sim/frv/rstq.cgs index ba06651..190c954 100644 --- a/sim/testsuite/sim/frv/rstq.cgs +++ b/sim/testsuite/sim/frv/rstq.cgs @@ -90,7 +90,7 @@ add: ; 1 nesr active with the incorrect address in neear for gr set_gr_gr sp,gr12 - nldqi @(sp,0),gr40 + nldq @(sp,gr0),gr40 test_spr_gr neear0,gr12 set_mem_limmed 0x2222,0x2222,gr6 set_mem_limmed 0x3333,0x3333,gr27 diff --git a/sim/testsuite/sim/frv/rstqf.cgs b/sim/testsuite/sim/frv/rstqf.cgs index 942e865..72fd04a 100644 --- a/sim/testsuite/sim/frv/rstqf.cgs +++ b/sim/testsuite/sim/frv/rstqf.cgs @@ -99,7 +99,8 @@ add: ; 1 nesr active with the incorrect address in neear for gr set_gr_gr sp,gr10 inc_gr_immed -32,gr10 - nldqi @(sp,-32),gr40 + set_gr_immed -32,gr9 + nldq @(sp,gr9),gr40 test_spr_gr neear0,gr10 set_mem_limmed 0x2222,0x2222,gr12 set_mem_limmed 0x3333,0x3333,gr27 |