diff options
| author | Jason Molenda <jmolenda@apple.com> | 1999-08-02 23:48:37 +0000 |
|---|---|---|
| committer | Jason Molenda <jmolenda@apple.com> | 1999-08-02 23:48:37 +0000 |
| commit | a0b3c4fd32cf8336bf7b69f373ef86d5c54035f6 (patch) | |
| tree | cf8f31bccdd267252e6b3c9636a1d323397673e2 /sim | |
| parent | 30727aa6d12fb866494020c0b62ab265a2bdcdfe (diff) | |
| download | gdb-a0b3c4fd32cf8336bf7b69f373ef86d5c54035f6.zip gdb-a0b3c4fd32cf8336bf7b69f373ef86d5c54035f6.tar.gz gdb-a0b3c4fd32cf8336bf7b69f373ef86d5c54035f6.tar.bz2 | |
import gdb-1999-08-02 snapshot
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/mips/ChangeLog | 6 | ||||
| -rw-r--r-- | sim/mips/interp.c | 52 |
2 files changed, 50 insertions, 8 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index cdea1ae..64751c9 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,9 @@ +Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com> + + * interp.c (sim_store_register): Handle case where client - GDB - + specifies that a 4 byte register is 8 bytes in size. + (sim_fetch_register): Ditto. + 1999-07-14 Frank Ch. Eigler <fche@cygnus.com> Implement "sim firmware" option, inspired by jimb's version of 1998-01. diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 3ee5001..4975008 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -850,8 +850,17 @@ sim_store_register (sd,rn,memory,length) cpu->fpr_state[rn - FGRIDX] = fmt_uninterpreted; if (cpu->register_widths[rn] == 32) { - cpu->fgr[rn - FGRIDX] = T2H_4 (*(unsigned32*)memory); - return 4; + if (length == 8) + { + cpu->fgr[rn - FGRIDX] = + (unsigned32) T2H_8 (*(unsigned64*)memory); + return 8; + } + else + { + cpu->fgr[rn - FGRIDX] = T2H_4 (*(unsigned32*)memory); + return 4; + } } else { @@ -862,8 +871,17 @@ sim_store_register (sd,rn,memory,length) if (cpu->register_widths[rn] == 32) { - cpu->registers[rn] = T2H_4 (*(unsigned32*)memory); - return 4; + if (length == 8) + { + cpu->registers[rn] = + (unsigned32) T2H_8 (*(unsigned64*)memory); + return 8; + } + else + { + cpu->registers[rn] = T2H_4 (*(unsigned32*)memory); + return 4; + } } else { @@ -903,8 +921,17 @@ sim_fetch_register (sd,rn,memory,length) { if (cpu->register_widths[rn] == 32) { - *(unsigned32*)memory = H2T_4 (cpu->fgr[rn - FGRIDX]); - return 4; + if (length == 8) + { + *(unsigned64*)memory = + H2T_8 ((unsigned32) (cpu->fgr[rn - FGRIDX])); + return 8; + } + else + { + *(unsigned32*)memory = H2T_4 (cpu->fgr[rn - FGRIDX]); + return 4; + } } else { @@ -915,8 +942,17 @@ sim_fetch_register (sd,rn,memory,length) if (cpu->register_widths[rn] == 32) { - *(unsigned32*)memory = H2T_4 ((unsigned32)(cpu->registers[rn])); - return 4; + if (length == 8) + { + *(unsigned64*)memory = + H2T_8 ((unsigned32) (cpu->registers[rn])); + return 8; + } + else + { + *(unsigned32*)memory = H2T_4 ((unsigned32)(cpu->registers[rn])); + return 4; + } } else { |