diff options
author | Michael Meissner <gnu@the-meissners.org> | 1996-09-20 01:42:15 +0000 |
---|---|---|
committer | Michael Meissner <gnu@the-meissners.org> | 1996-09-20 01:42:15 +0000 |
commit | c12f5c678e2b93fa915a30698f952aedf57865b7 (patch) | |
tree | a4a60f03ddf3651a466d0f26e9da536de5b44493 /sim | |
parent | 81dc176f58906e0e61ce2e298513ae3b15717fec (diff) | |
download | gdb-c12f5c678e2b93fa915a30698f952aedf57865b7.zip gdb-c12f5c678e2b93fa915a30698f952aedf57865b7.tar.gz gdb-c12f5c678e2b93fa915a30698f952aedf57865b7.tar.bz2 |
Make sure cmp{,eq,u}i use correct casts
Diffstat (limited to 'sim')
-rw-r--r-- | sim/d10v/ChangeLog | 6 | ||||
-rw-r--r-- | sim/d10v/simops.c | 10 |
2 files changed, 11 insertions, 5 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index 5baf78b..1fbe0a3 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,3 +1,9 @@ +Thu Sep 19 21:38:20 1996 Michael Meissner <meissner@wogglebug.ziplink.net> + + * simops.c (OP_{401,2000000,601,3000000,23000000}): Get sign right + on comparisons. + (OP_401): Fix tracing information. + Thu Sep 19 10:30:22 1996 Michael Meissner <meissner@tiktok.cygnus.com> * simops.c (SIZE_{PC,LINE_NUMBER}): New default sizes for output. diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c index a1af4f9..801ad80 100644 --- a/sim/d10v/simops.c +++ b/sim/d10v/simops.c @@ -874,9 +874,9 @@ OP_1403 () void OP_401 () { - trace_input ("cmpeqi.s", OP_REG, OP_CONSTANT16, OP_VOID); + trace_input ("cmpeqi.s", OP_REG, OP_CONSTANT4, OP_VOID); State.F1 = State.F0; - State.F0 = (State.regs[OP[0]] == SEXT4(OP[1])) ? 1 : 0; + State.F0 = (State.regs[OP[0]] == (reg_t)SEXT4(OP[1])) ? 1 : 0; trace_output (OP_FLAG); } @@ -886,7 +886,7 @@ OP_2000000 () { trace_input ("cmpeqi.l", OP_REG, OP_CONSTANT16, OP_VOID); State.F1 = State.F0; - State.F0 = (State.regs[OP[0]] == OP[1]) ? 1 : 0; + State.F0 = (State.regs[OP[0]] == (reg_t)OP[1]) ? 1 : 0; trace_output (OP_FLAG); } @@ -896,7 +896,7 @@ OP_601 () { trace_input ("cmpi.s", OP_REG, OP_CONSTANT4, OP_VOID); State.F1 = State.F0; - State.F0 = ((int16)(State.regs[OP[0]]) < SEXT4(OP[1])) ? 1 : 0; + State.F0 = ((int16)(State.regs[OP[0]]) < (int16)SEXT4(OP[1])) ? 1 : 0; trace_output (OP_FLAG); } @@ -926,7 +926,7 @@ OP_23000000 () { trace_input ("cmpui", OP_REG, OP_CONSTANT16, OP_VOID); State.F1 = State.F0; - State.F0 = (State.regs[OP[0]] < OP[1]) ? 1 : 0; + State.F0 = (State.regs[OP[0]] < (reg_t)OP[1]) ? 1 : 0; trace_output (OP_FLAG); } |