diff options
| author | Andrew Cagney <cagney@redhat.com> | 2003-06-22 13:38:28 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 2003-06-22 13:38:28 +0000 |
| commit | ea0869653a5cf383a427d499952d0ca52cc5de72 (patch) | |
| tree | 63e9c9a1988422b72972ee72ac24e1c923f59861 /sim | |
| parent | 1f1b28179f4ddd66baa43256a12d2d03840d1690 (diff) | |
| download | gdb-ea0869653a5cf383a427d499952d0ca52cc5de72.zip gdb-ea0869653a5cf383a427d499952d0ca52cc5de72.tar.gz gdb-ea0869653a5cf383a427d499952d0ca52cc5de72.tar.bz2 | |
2003-06-22 Andrew Cagney <cagney@redhat.com>
* interp.c (xfer_mem): Simplify. Only do a single partial
transfer. Problem reported by Tom Rix.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/d10v/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/d10v/interp.c | 62 |
2 files changed, 31 insertions, 36 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index 3256284..f8e70a5 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,3 +1,8 @@ +2003-06-22 Andrew Cagney <cagney@redhat.com> + + * interp.c (xfer_mem): Simplify. Only do a single partial + transfer. Problem reported by Tom Rix. + 2003-05-07 Andrew Cagney <cagney@redhat.com> * interp.c (sim_d10v_translate_addr): Add "regcache" parameter. diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c index 30239ab..284a4e1 100644 --- a/sim/d10v/interp.c +++ b/sim/d10v/interp.c @@ -720,49 +720,39 @@ xfer_mem (SIM_ADDR virt, int size, int write_p) { - int xfered = 0; - - while (0 < size) - { - uint8 *memory; - unsigned long phys; - int phys_size; - phys_size = sim_d10v_translate_addr (virt, size, &phys, NULL, - dmap_register, imap_register); - if (phys_size == 0) - return xfered; + uint8 *memory; + unsigned long phys; + int phys_size; + phys_size = sim_d10v_translate_addr (virt, size, &phys, NULL, + dmap_register, imap_register); + if (phys_size == 0) + return 0; - memory = map_memory (phys); + memory = map_memory (phys); #ifdef DEBUG - if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - { - (*d10v_callback->printf_filtered) - (d10v_callback, - "sim_%s %d bytes: 0x%08lx (%s) -> 0x%08lx (%s) -> 0x%08lx (%s)\n", + if ((d10v_debug & DEBUG_INSTRUCTION) != 0) + { + (*d10v_callback->printf_filtered) + (d10v_callback, + "sim_%s %d bytes: 0x%08lx (%s) -> 0x%08lx (%s) -> 0x%08lx (%s)\n", (write_p ? "write" : "read"), - phys_size, virt, last_from, - phys, last_to, - (long) memory, last_segname); - } + phys_size, virt, last_from, + phys, last_to, + (long) memory, last_segname); + } #endif - if (write_p) - { - memcpy (memory, buffer, phys_size); - } - else - { - memcpy (buffer, memory, phys_size); - } - - virt += phys_size; - buffer += phys_size; - xfered += phys_size; - size -= phys_size; + if (write_p) + { + memcpy (memory, buffer, phys_size); } - - return xfered; + else + { + memcpy (buffer, memory, phys_size); + } + + return phys_size; } |