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| author | Jim Wilson <jim.wilson@linaro.org> | 2016-12-03 17:29:44 -0800 |
|---|---|---|
| committer | Jim Wilson <jim.wilson@linaro.org> | 2016-12-03 17:29:44 -0800 |
| commit | 668650d58d61d9d170f3e5b5c1657ed1c3e2b34b (patch) | |
| tree | ef3a1267d747b322ada68357c9c88ce918146c59 /sim | |
| parent | 4132f1c0dfe6bb8984c0dd521388ba6b7b32a4af (diff) | |
| download | gdb-668650d58d61d9d170f3e5b5c1657ed1c3e2b34b.zip gdb-668650d58d61d9d170f3e5b5c1657ed1c3e2b34b.tar.gz gdb-668650d58d61d9d170f3e5b5c1657ed1c3e2b34b.tar.bz2 | |
Fix bugs with tbnz/tbz instructions.users/ARM/embedded-binutils-master-2016q4
sim/aarch64
* simulator.c (tbnz, tbz): Cast 1 to uint64_t before shifting.
(dexTestBranchImmediate): Shift high bit of pos by 5 not 4.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/aarch64/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/aarch64/simulator.c | 6 |
2 files changed, 8 insertions, 3 deletions
diff --git a/sim/aarch64/ChangeLog b/sim/aarch64/ChangeLog index d8eb000..2eca54d 100644 --- a/sim/aarch64/ChangeLog +++ b/sim/aarch64/ChangeLog @@ -1,3 +1,8 @@ +2016-12-03 Jim Wilson <jim.wilson@linaro.org> + + * simulator.c (tbnz, tbz): Cast 1 to uint64_t before shifting. + (dexTestBranchImmediate): Shift high bit of pos by 5 not 4. + 2016-12-01 Jim Wilson <jim.wilson@linaro.org> * simulator.c (fsturs): Switch use of rn and st variables. diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c index 4fa5dc1..34fd17d 100644 --- a/sim/aarch64/simulator.c +++ b/sim/aarch64/simulator.c @@ -13353,7 +13353,7 @@ tbnz (sim_cpu *cpu, uint32_t pos, int32_t offset) unsigned rt = INSTR (4, 0); TRACE_DECODE (cpu, "emulated at line %d", __LINE__); - if (aarch64_get_reg_u64 (cpu, rt, NO_SP) & (1 << pos)) + if (aarch64_get_reg_u64 (cpu, rt, NO_SP) & (((uint64_t) 1) << pos)) aarch64_set_next_PC_by_offset (cpu, offset); } @@ -13364,7 +13364,7 @@ tbz (sim_cpu *cpu, uint32_t pos, int32_t offset) unsigned rt = INSTR (4, 0); TRACE_DECODE (cpu, "emulated at line %d", __LINE__); - if (!(aarch64_get_reg_u64 (cpu, rt, NO_SP) & (1 << pos))) + if (!(aarch64_get_reg_u64 (cpu, rt, NO_SP) & (((uint64_t) 1) << pos))) aarch64_set_next_PC_by_offset (cpu, offset); } @@ -13407,7 +13407,7 @@ dexTestBranchImmediate (sim_cpu *cpu) instr[18,5] = simm14 : signed offset counted in words instr[4,0] = uimm5 */ - uint32_t pos = ((INSTR (31, 31) << 4) | INSTR (23, 19)); + uint32_t pos = ((INSTR (31, 31) << 5) | INSTR (23, 19)); int32_t offset = simm32 (aarch64_get_instr (cpu), 18, 5) << 2; NYI_assert (30, 25, 0x1b); |