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authorAndrew Cagney <cagney@redhat.com>2000-04-09 14:15:43 +0000
committerAndrew Cagney <cagney@redhat.com>2000-04-09 14:15:43 +0000
commite30db7381caa0eb14435fa4d3728484d7f01033c (patch)
tree804dc6c723549aa0abfa6cf3ba8c18f24b707df8 /sim
parentf7384f0ffde53e161120ed59856680ec8e31c5ca (diff)
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Fix printf botch.
Diffstat (limited to 'sim')
-rw-r--r--sim/mips/ChangeLog4
-rw-r--r--sim/mips/interp.c4
2 files changed, 6 insertions, 2 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index af9985b..799159c 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,7 @@
+Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (decode_coproc): Output long using %lx and not %s.
+
2000-03-21 Frank Ch. Eigler <fche@redhat.com>
* interp.c (sim_open): Sort & extend dummy memory regions for
diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index eac81b3..a75d4ab 100644
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -3231,8 +3231,8 @@ decode_coproc (SIM_DESC sd,
/* 30 = ErrorEPC R4000 VR4100 VR4300 */
if (STATE_VERBOSE_P(SD))
sim_io_eprintf (SD,
- "Warning: PC 0x%s:interp.c decode_coproc DEADC0DE\n",
- (unsigned)cia);
+ "Warning: PC 0x%lx:interp.c decode_coproc DEADC0DE\n",
+ (unsigned long)cia);
GPR[rt] = 0xDEADC0DE; /* CPR[0,rd] */
/* CPR[0,rd] = GPR[rt]; */
default: