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authorNick Clifton <nickc@redhat.com>2013-05-13 10:52:52 +0000
committerNick Clifton <nickc@redhat.com>2013-05-13 10:52:52 +0000
commitfd7b2a545d530118913b1aefbfd8526785d3c2cc (patch)
tree222e0f9b9c9a3a55e9e724682861006ed67684c5 /sim
parent36d1c68c70a09d38d76faa82263d16269139033c (diff)
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* v850.igen (LDSR): Accept but ignore a selID parameter.
Diffstat (limited to 'sim')
-rw-r--r--sim/v850/ChangeLog4
-rw-r--r--sim/v850/v850.igen8
2 files changed, 9 insertions, 3 deletions
diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog
index a3139fe..2c3669c 100644
--- a/sim/v850/ChangeLog
+++ b/sim/v850/ChangeLog
@@ -1,3 +1,7 @@
+2013-05-13 Nick Clifton <nickc@redhat.com>
+
+ * v850.igen (LDSR): Accept but ignore a selID parameter.
+
2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
* configure: Rebuild.
diff --git a/sim/v850/v850.igen b/sim/v850/v850.igen
index b0f3903..c5b4180 100644
--- a/sim/v850/v850.igen
+++ b/sim/v850/v850.igen
@@ -934,13 +934,15 @@ rrrrr!0,111111,RRRRR + ddddddddddddddd,1:VII:::ld.hu
// LDSR
-regID,111111,RRRRR + 0000000000100000:IX:::ldsr
-"ldsr r<reg1>, s<regID>"
+regID,111111,RRRRR + selID,00000100000:IX:::ldsr
+"ldsr r<reg1>, s<regID>":(selID == 0)
+"ldsr r<reg1>, s<regID>, <selID>"
{
uint32 sreg = GR[reg1];
TRACE_ALU_INPUT1 (GR[reg1]);
- if ((idecode_issue == idecode_v850e2_issue
+ /* FIXME: For now we ignore the selID. */
+ if ( (idecode_issue == idecode_v850e2_issue
|| idecode_issue == idecode_v850e3v5_issue
|| idecode_issue == idecode_v850e2v3_issue)
&& regID < 28)