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authorChris Demetriou <cgd@google.com>2004-04-11 07:12:13 +0000
committerChris Demetriou <cgd@google.com>2004-04-11 07:12:13 +0000
commitadad0f8a2b7ce9423ef62ea86b318d3c4fec065a (patch)
tree8f4a9f6e3c738cca103bc191b523e2c736fad5c2 /sim
parentcdc89eb2c34d4c9739bf57618b3dec13017d1cc5 (diff)
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2004-04-11 Chris Demetriou <cgd@broadcom.com>
* utils-fpu.inc (enable_fpu, ckm_fp_cc): New macros. (clrset_fp_cc): Fix mask used for upper 7 condition codes. * utils-mdmx.inc: Include utils-fpu.inc. (enable_mdmx): Use enable_fpu.
Diffstat (limited to 'sim')
-rw-r--r--sim/testsuite/sim/mips/ChangeLog7
-rw-r--r--sim/testsuite/sim/mips/utils-fpu.inc20
-rw-r--r--sim/testsuite/sim/mips/utils-mdmx.inc11
3 files changed, 31 insertions, 7 deletions
diff --git a/sim/testsuite/sim/mips/ChangeLog b/sim/testsuite/sim/mips/ChangeLog
index 808e4e7..7d75661 100644
--- a/sim/testsuite/sim/mips/ChangeLog
+++ b/sim/testsuite/sim/mips/ChangeLog
@@ -1,3 +1,10 @@
+2004-04-11 Chris Demetriou <cgd@broadcom.com>
+
+ * utils-fpu.inc (enable_fpu, ckm_fp_cc): New macros.
+ (clrset_fp_cc): Fix mask used for upper 7 condition codes.
+ * utils-mdmx.inc: Include utils-fpu.inc.
+ (enable_mdmx): Use enable_fpu.
+
2004-04-10 Chris Demetriou <cgd@broadcom.com>
* utils-fpu.inc: New file.
diff --git a/sim/testsuite/sim/mips/utils-fpu.inc b/sim/testsuite/sim/mips/utils-fpu.inc
index d0701b9..82feb61 100644
--- a/sim/testsuite/sim/mips/utils-fpu.inc
+++ b/sim/testsuite/sim/mips/utils-fpu.inc
@@ -18,6 +18,12 @@
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ .macro enable_fpu fr
+ mfc0 $20, $12
+ or $20, $20, (1 << 29) | (\fr << 26)
+ mtc0 $20, $20
+ .endm
+
###
### Data movement macros
###
@@ -57,9 +63,9 @@
.macro clrset_fp_cc clr, set
cfc1 $20, $31
- or $20, $20, (((\clr & 0xf7) << 24) | ((\clr & 0x01) << 23))
- xor $20, $20, (((\clr & 0xf7) << 24) | ((\clr & 0x01) << 23))
- or $20, $20, (((\set & 0xf7) << 24) | ((\set & 0x01) << 23))
+ or $20, $20, (((\clr & 0xfe) << 24) | ((\clr & 0x01) << 23))
+ xor $20, $20, (((\clr & 0xfe) << 24) | ((\clr & 0x01) << 23))
+ or $20, $20, (((\set & 0xfe) << 24) | ((\set & 0x01) << 23))
ctc1 $20, $31
.endm
@@ -89,3 +95,11 @@
bnez $20, _fail
nop
.endm
+
+ .macro ckm_fp_cc v, mask
+ get_fp_cc $20
+ xori $20, $20, \v
+ andi $20, $20, \mask
+ bnez $20, _fail
+ nop
+ .endm
diff --git a/sim/testsuite/sim/mips/utils-mdmx.inc b/sim/testsuite/sim/mips/utils-mdmx.inc
index d1726b3..cda6550 100644
--- a/sim/testsuite/sim/mips/utils-mdmx.inc
+++ b/sim/testsuite/sim/mips/utils-mdmx.inc
@@ -18,15 +18,18 @@
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ .include "utils-fpu.inc"
+
###
### Shared macros
###
- # Enable MDMX, by setting Status.CU1, .FR, and .MX
+ # Enable MDMX: enable the FPU w/ FR=1, then set Status.MX
.macro enable_mdmx
- mfc0 $20, $12
- or $20, $20, (1 << 29) | (1 << 26) | (1 << 24)
- mtc0 $20, $12
+ enable_fpu 1
+ mfc0 $20, $12
+ or $20, $20, (1 << 24)
+ mtc0 $20, $12
.endm