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author | Tristan Gingold <gingold@adacore.com> | 2009-10-23 09:14:32 +0000 |
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committer | Tristan Gingold <gingold@adacore.com> | 2009-10-23 09:14:32 +0000 |
commit | 244d525937a2d8fb42756e97ca0174c5c97930c4 (patch) | |
tree | 9465805ce13809dba39e3735d6a216fc19a2954b /sim | |
parent | 98950613d80b6b340f11115cd9920b6d56e4dcfd (diff) | |
download | gdb-244d525937a2d8fb42756e97ca0174c5c97930c4.zip gdb-244d525937a2d8fb42756e97ca0174c5c97930c4.tar.gz gdb-244d525937a2d8fb42756e97ca0174c5c97930c4.tar.bz2 |
2009-10-23 Tristan Gingold <gingold@adacore.com>
* avr/interp.c (sim_stop): Return 1.
Diffstat (limited to 'sim')
-rw-r--r-- | sim/ChangeLog | 4 | ||||
-rw-r--r-- | sim/avr/interp.c | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/sim/ChangeLog b/sim/ChangeLog index 74dcba1..ac60e87 100644 --- a/sim/ChangeLog +++ b/sim/ChangeLog @@ -1,3 +1,7 @@ +2009-10-22 Tristan Gingold <gingold@adacore.com> + + * avr/interp.c (sim_stop): Return 1. + 2009-10-16 Doug Evans <dje@sebabeach.org> * MAINTAINERS: Add myself as m32r maintainer. diff --git a/sim/avr/interp.c b/sim/avr/interp.c index e4e80c3..8bb9ec2 100644 --- a/sim/avr/interp.c +++ b/sim/avr/interp.c @@ -1760,7 +1760,7 @@ sim_stop (SIM_DESC sd) { cpu_exception = sim_stopped; cpu_signal = TARGET_SIGNAL_INT; - return 0; + return 1; } void |