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authorChris Demetriou <cgd@google.com>2002-03-03 06:49:43 +0000
committerChris Demetriou <cgd@google.com>2002-03-03 06:49:43 +0000
commit043b7057fd25d89f2539850adf2c06de6ea42742 (patch)
tree9c46323260c2da113fe958797243a77a8870ad2c /sim
parentc1e8ada4068561eda83b2bdef82f6e51bcea6297 (diff)
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2002-03-02 Chris Demetriou <cgd@broadcom.com>
* interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND. * mips.igen (LL, CxC1, MxC1): Likewise.
Diffstat (limited to 'sim')
-rw-r--r--sim/mips/ChangeLog5
-rw-r--r--sim/mips/interp.c2
-rw-r--r--sim/mips/mips.igen14
3 files changed, 13 insertions, 8 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 43b78c3..c02a53b 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,5 +1,10 @@
2002-03-02 Chris Demetriou <cgd@broadcom.com>
+ * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
+ * mips.igen (LL, CxC1, MxC1): Likewise.
+
+2002-03-02 Chris Demetriou <cgd@broadcom.com>
+
* mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index 95f0ab6..3e31ce4 100644
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -1426,7 +1426,7 @@ load_word (SIM_DESC sd,
LoadMemory (&memval,NULL,uncached, AccessLength_WORD, paddr, vaddr,
isDATA, isREAL);
byte = (vaddr & mask) ^ (bigend << 2);
- return SIGNEXTEND (((memval >> (8 * byte)) & 0xffffffff), 32);
+ return EXTEND32 (memval >> (8 * byte));
}
}
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 1e6eb62..be78820 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -1716,7 +1716,7 @@
paddr = ((paddr & ~mask) | ((paddr & mask) ^ (reverse << shift)));
LoadMemory(&memval,&memval1,uncached,AccessLength_WORD,paddr,vaddr,isDATA,isREAL);
byte = ((vaddr & mask) ^ (bigend << shift));
- GPR[RT] = (SIGNEXTEND(((memval >> (8 * byte)) & 0xFFFFFFFF),32));
+ GPR[RT] = EXTEND32 (memval >> (8 * byte));
LLBIT = 1;
}
}
@@ -3269,9 +3269,9 @@
else
{ /* control from */
if (FS == 0)
- PENDING_FILL(RT,SIGNEXTEND(FCR0,32));
+ PENDING_FILL(RT, EXTEND32 (FCR0));
else if (FS == 31)
- PENDING_FILL(RT,SIGNEXTEND(FCR31,32));
+ PENDING_FILL(RT, EXTEND32 (FCR31));
/* else NOP */
}
}
@@ -3310,12 +3310,12 @@
if (FS == 0)
{
TRACE_ALU_INPUT1 (FCR0);
- GPR[RT] = SIGNEXTEND (FCR0, 32);
+ GPR[RT] = EXTEND32 (FCR0);
}
else if (FS == 31)
{
TRACE_ALU_INPUT1 (FCR31);
- GPR[RT] = SIGNEXTEND (FCR31, 32);
+ GPR[RT] = EXTEND32 (FCR31);
}
TRACE_ALU_RESULT (GPR[RT]);
/* else NOP */
@@ -3656,7 +3656,7 @@
PENDING_FILL ((FS + FGRIDX), VL4_8(GPR[RT]));
}
else /*MFC1*/
- PENDING_FILL (RT, SIGNEXTEND(FGR[FS],32));
+ PENDING_FILL (RT, EXTEND32 (FGR[FS]));
}
010001,00,X,00,5.RT,5.FS,00000000000:COP1Sb:32,f::MxC1
"m%s<X>c1 r<RT>, f<FS>"
@@ -3672,7 +3672,7 @@
/*MTC1*/
StoreFPR (FS, fmt_uninterpreted_32, VL4_8 (GPR[RT]));
else /*MFC1*/
- GPR[RT] = SIGNEXTEND(FGR[FS],32);
+ GPR[RT] = EXTEND32 (FGR[FS]);
}