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| author | Joyce Janczyn <janczyn@cygnus> | 1998-08-24 15:52:43 +0000 |
|---|---|---|
| committer | Joyce Janczyn <janczyn@cygnus> | 1998-08-24 15:52:43 +0000 |
| commit | c1802bfd6001b19af883f548f1410109e8de5a6f (patch) | |
| tree | f0c81ce68b6bd771699d04afd460fcdb2b692ba3 /sim | |
| parent | fb37fdcb89d4050c08047db7d3e2b1c468da3a45 (diff) | |
| download | gdb-c1802bfd6001b19af883f548f1410109e8de5a6f.zip gdb-c1802bfd6001b19af883f548f1410109e8de5a6f.tar.gz gdb-c1802bfd6001b19af883f548f1410109e8de5a6f.tar.bz2 | |
* sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/mn10300/ChangeLog | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog index 8f8151e..ccbcdb5 100644 --- a/sim/mn10300/ChangeLog +++ b/sim/mn10300/ChangeLog @@ -1,4 +1,18 @@ +Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com> + + * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA. + start-sanitize-am33 +Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen: Handle case where first DSP operation modifies a + register used in the second DSP operation correctly. + +Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com) + + * am33.igen: Detect cases where two operands must not match for + DSP instructions too. + Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com) * am33.igen: Detect cases where two operands must not match in |