* Numerous changes & small bug fixes in PKE sim code and test suite.

  for sim/testsuite/sky:

	* t-pke4.run: Removed test, since it succeeds yet returns a
 	non-zero exit code.

	* Makefile.in (RUNOPTS): Removed --memory-size flag, made
 	unnecessary by sim/mips/interp.c changes.
	(TESTS): Removed t-pke4.ok target.

	* t-pke3.trc: Classified tests with [---] indicators, to match
 	items up with entries documented in testplan.sgml.  Added numerous
 	additional tests.  They assert behavior that assumes certain
 	favorable answers to PKE question set #6 to SCEI.

	* t-pke1.trc: Added some [---] indicators.

  for sim/mips:

	* sky-pke.c (pke_issue): Revamped interrupt & stall code.  Assume
 	that ER1/ER0/PIS bits are only set if not masked by ERR bits.
  	Signal PIS only if unmasked.
	(pke_code_error): Signal ER1 only if unmasked.
	(pke_pc_fifo): Signal ER0 only if unmasked.
	(pke_code_unpack): Round up num_operands for last operand's
 	partial-word.  Factor out "R" bit handling for better coverage
 	analysis.  Fill upper words of a quadword with zeroes for Vn_m
 	UNPACK with n < 4.

	* sky-device.c (device_error): Made function accept varargs.

	* sky-device.h (device_error): Changed declaration to match.

	* interp.c (sim_open): Made 0x0000 area memory be an alias of
	the K0/K1 segments.  Sanitized code.

7 files changed, 327 insertions, 138 deletions

diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index b794fb7..eaf37a2 100644
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -310,13 +310,22 @@ sim_open (kind, cb, abfd, argv)
      are the kernel spaces K0 & K1.  Both of these map to a single
      smaller sub region */
   sim_do_command(sd," memory region 0x7fff8000,0x8000") ; /* MTZ- 32 k stack */
+/* start-sanitize-sky */
+#ifndef TARGET_SKY
+/* end-sanitize-sky */
   sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx%%0x%lx,0x%0x",
 		   K1BASE, K0SIZE,
 		   MEM_SIZE, /* actual size */
 		   K0BASE);
-#ifdef TARGET_SKY
-  sim_do_command (sd, "memory region 0x00000000,0x00100000"); /* 1M */
+/* start-sanitize-sky */
+#else
+  sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx%%0x%lx,0x%0x,0x%0x",
+		   K1BASE, K0SIZE,
+		   MEM_SIZE, /* actual size */
+		   K0BASE, 
+		   0); /* add alias at 0x0000 */
 #endif
+/* end-sanitize-sky */
 
   device_init(sd);
 
diff --git a/sim/mips/sky-pke.c b/sim/mips/sky-pke.c
index db9ecc4..011db64 100644
--- a/sim/mips/sky-pke.c
+++ b/sim/mips/sky-pke.c
@@ -13,11 +13,7 @@
 #include "sky-vu0.h"
 #include "sky-vu1.h"
 #include "sky-gpuif.h"
-
-
-/* Imported functions */
-
-void device_error (device *me, char* message);  /* device.c */
+#include "sky-device.h"
 
 
 /* Internal function declarations */
@@ -526,7 +522,24 @@ pke_issue(SIM_DESC sd, struct pke_device* me)
   unsigned_4 cmd, intr, num;
   unsigned_4 imm;
 
-  /* 1 -- test go / no-go for PKE execution */
+  /* 1 -- fetch PKE instruction */
+
+  /* confirm availability of new quadword of PKE instructions */
+  if(me->fifo_num_elements <= me->fifo_pc)
+    return;
+
+  /* skip over DMA tag, if present */
+  pke_pc_advance(me, 0);
+
+  /* "fetch" instruction quadword and word */ 
+  fqw = & me->fifo[me->fifo_pc];
+  fw = fqw->data[me->qw_pc];
+
+  /* store word in PKECODE register */
+  me->regs[PKE_REG_CODE][0] = fw;
+
+
+  /* 2 -- test go / no-go for PKE execution */
 
   /* switch on STAT:PSS if PSS-pending and in idle state */
   if((PKE_REG_MASK_GET(me, STAT, PPS) == PKE_REG_STAT_PPS_IDLE) &&
@@ -542,118 +555,109 @@ pke_issue(SIM_DESC sd, struct pke_device* me)
      /* PEW bit not a reason to keep stalling - it's re-checked below */
      /* PGW bit not a reason to keep stalling - it's re-checked below */
      /* maskable stall controls: ER0, ER1, PIS */
-     (PKE_REG_MASK_GET(me, STAT, ER0) && !PKE_REG_MASK_GET(me, ERR, ME0)) ||
-     (PKE_REG_MASK_GET(me, STAT, ER1) && !PKE_REG_MASK_GET(me, ERR, ME1)) ||
-     (PKE_REG_MASK_GET(me, STAT, PIS) && !PKE_REG_MASK_GET(me, ERR, MII)))
+     PKE_REG_MASK_GET(me, STAT, ER0) ||
+     PKE_REG_MASK_GET(me, STAT, ER1) ||
+     PKE_REG_MASK_GET(me, STAT, PIS))
     {
-      /* try again next cycle; no state change */
+      /* (still) stalled */
+      PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
+      /* try again next cycle */
       return;
     }
 
-  /* confirm availability of new quadword of PKE instructions */
-  if(me->fifo_num_elements <= me->fifo_pc)
-    return;
-
-
-  /* 2 -- fetch PKE instruction */
-
-  /* skip over DMA tag, if present */
-  pke_pc_advance(me, 0);
-
-  /* "fetch" instruction quadword and word */ 
-  fqw = & me->fifo[me->fifo_pc];
-  fw = fqw->data[me->qw_pc];
-
-  /* store word in PKECODE register */
-  me->regs[PKE_REG_CODE][0] = fw;
-
 
   /* 3 -- decode PKE instruction */
 
-  /* PKE instruction format: [intr 0:0][pke-command 6:0][num 7:0][immediate 15:0],
-     so op-code is in top byte. */
+  /* decoding */
+  if(PKE_REG_MASK_GET(me, STAT, PPS) == PKE_REG_STAT_PPS_IDLE)
+    PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_DECODE);
+
+  /* Extract relevant bits from PKEcode */
   intr = BIT_MASK_GET(fw, PKE_OPCODE_I_B,   PKE_OPCODE_I_E);
   cmd  = BIT_MASK_GET(fw, PKE_OPCODE_CMD_B, PKE_OPCODE_CMD_E);
-  num  = BIT_MASK_GET(fw, PKE_OPCODE_NUM_B, PKE_OPCODE_NUM_E);
-  imm  = BIT_MASK_GET(fw, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
 
   /* handle interrupts */
   if(intr)
     {
-      /* are we resuming an interrupt-flagged instruction? */
+      /* are we resuming an interrupt-stalled instruction? */
       if(me->flags & PKE_FLAG_INT_NOLOOP)
 	{
 	  /* clear loop-prevention flag */
 	  me->flags &= ~PKE_FLAG_INT_NOLOOP;
-	  /* mask interrupt bit from instruction word so re-decoded instructions don't stall */
-	  BIT_MASK_SET(fw, PKE_OPCODE_I_B, PKE_OPCODE_I_E, 0);
-	  intr = 0;
+
+	  /* fall through to decode & execute */
+	  /* The pke_code_* functions should not check the MSB in the
+             pkecode. */
 	}
       else /* new interrupt-flagged instruction */
 	{
+	  /* XXX: send interrupt to 5900? */
+
 	  /* set INT flag in STAT register */
 	  PKE_REG_MASK_SET(me, STAT, INT, 1);
 	  /* set loop-prevention flag */
 	  me->flags |= PKE_FLAG_INT_NOLOOP;
 
-	  /* XXX: send interrupt to 5900? */
+	  /* set PIS if stall not masked */
+	  if(!PKE_REG_MASK_GET(me, ERR, MII))
+	    PKE_REG_MASK_SET(me, STAT, PIS, 1);
+
+	  /* suspend this instruction unless it's PKEMARK */
+	  if(!IS_PKE_CMD(cmd, PKEMARK))
+	    {
+	      PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
+	      return;
+	    }
+	  else
+	    {
+	      ; /* fall through to decode & execute */
+	    }
 	}
     }
 
-  /* decoding */
-  if(PKE_REG_MASK_GET(me, STAT, PPS) == PKE_REG_STAT_PPS_IDLE)
-    PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_DECODE);
-
-  /* handle [new - first time] interrupts */
-  if(intr)
-    {
-      PKE_REG_MASK_SET(me, STAT, PIS, 1);
-      PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
-      /* presume stall state follows; only PKEMARK may go ahead anyway */
-    }
 
   /* decode & execute */
-  if(IS_PKE_CMD(cmd, PKENOP) && !intr)
+  if(IS_PKE_CMD(cmd, PKENOP))
     pke_code_nop(me, fw);
-  else if(IS_PKE_CMD(cmd, STCYCL) && !intr)
+  else if(IS_PKE_CMD(cmd, STCYCL))
     pke_code_stcycl(me, fw);
-  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, OFFSET) && !intr)
+  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, OFFSET))
     pke_code_offset(me, fw);
-  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, BASE) && !intr)
+  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, BASE))
     pke_code_base(me, fw);
-  else if(IS_PKE_CMD(cmd, ITOP) && !intr)
+  else if(IS_PKE_CMD(cmd, ITOP))
     pke_code_itop(me, fw);
-  else if(IS_PKE_CMD(cmd, STMOD) && !intr)
+  else if(IS_PKE_CMD(cmd, STMOD))
     pke_code_stmod(me, fw);
-  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, MSKPATH3) && !intr)
+  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, MSKPATH3))
     pke_code_mskpath3(me, fw);
   else if(IS_PKE_CMD(cmd, PKEMARK))
     pke_code_pkemark(me, fw);
-  else if(IS_PKE_CMD(cmd, FLUSHE) && !intr)
+  else if(IS_PKE_CMD(cmd, FLUSHE))
     pke_code_flushe(me, fw);
-  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, FLUSH) && !intr)
+  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, FLUSH))
     pke_code_flush(me, fw);
-  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, FLUSHA) && !intr)
+  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, FLUSHA))
     pke_code_flusha(me, fw);
-  else if(IS_PKE_CMD(cmd, PKEMSCAL) && !intr)
+  else if(IS_PKE_CMD(cmd, PKEMSCAL))
     pke_code_pkemscal(me, fw);
-  else if(IS_PKE_CMD(cmd, PKEMSCNT) && !intr)
+  else if(IS_PKE_CMD(cmd, PKEMSCNT))
     pke_code_pkemscnt(me, fw);
-  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, PKEMSCALF) && !intr)
+  else if(me->pke_number == 1 && IS_PKE_CMD(cmd, PKEMSCALF))
     pke_code_pkemscalf(me, fw);
-  else if(IS_PKE_CMD(cmd, STMASK) && !intr)
+  else if(IS_PKE_CMD(cmd, STMASK))
     pke_code_stmask(me, fw);
-  else if(IS_PKE_CMD(cmd, STROW) && !intr)
+  else if(IS_PKE_CMD(cmd, STROW))
     pke_code_strow(me, fw);
-  else if(IS_PKE_CMD(cmd, STCOL) && !intr)
+  else if(IS_PKE_CMD(cmd, STCOL))
     pke_code_stcol(me, fw);
-  else if(IS_PKE_CMD(cmd, MPG) && !intr)
+  else if(IS_PKE_CMD(cmd, MPG))
     pke_code_mpg(me, fw);
-  else if(IS_PKE_CMD(cmd, DIRECT) && !intr)
+  else if(IS_PKE_CMD(cmd, DIRECT))
     pke_code_direct(me, fw);
-  else if(IS_PKE_CMD(cmd, DIRECTHL) && !intr)
+  else if(IS_PKE_CMD(cmd, DIRECTHL))
     pke_code_directhl(me, fw);
-  else if(IS_PKE_CMD(cmd, UNPACK) && !intr)
+  else if(IS_PKE_CMD(cmd, UNPACK))
     pke_code_unpack(me, fw);
   /* ... no other commands ... */
   else
@@ -786,7 +790,12 @@ pke_pc_fifo(struct pke_device* me, int operand_num, unsigned_4** operand)
       if(fq->word_class[new_qw_pc] == wc_dma)
 	{
 	  /* mismatch error! */
-	  PKE_REG_MASK_SET(me, STAT, ER0, 1);
+	  if(! PKE_REG_MASK_GET(me, ERR, ME0))
+	    {
+	      PKE_REG_MASK_SET(me, STAT, ER0, 1);
+	      /* don't stall just yet -- finish this instruction */
+	      /* the PPS_STALL state will be entered by pke_issue() next time */
+	    }
 	  /* skip by going around loop an extra time */
 	  num ++;
 	}
@@ -1604,7 +1613,7 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
     n = num;
   else
     n = cl * (num/wl) + PKE_LIMIT(num % wl, cl);
-  num_operands = ((32 >> vl) * (vn+1) * n)/32;
+  num_operands = (31 + (32 >> vl) * (vn+1) * n)/32; /* round up to next word */
   
   /* confirm that FIFO has enough words in it */
   if(num_operands > 0)
@@ -1662,14 +1671,16 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
 	      /* map zero to max+1 */
 	      int addrwl = (wl == 0) ? 0x0100 : wl;
 	      vu_addr = vu_addr_base + 16 * (BIT_MASK_GET(imm, 0, 9) +
-					     (r ? PKE_REG_MASK_GET(me, TOPS, TOPS) : 0) +
-					     cl*(vector_num_out/addrwl) +
-					     (vector_num_out%addrwl));
+					     (vector_num_out / addrwl) * cl +
+					     (vector_num_out % addrwl));
 	    }
 	  else
 	    vu_addr = vu_addr_base + 16 * (BIT_MASK_GET(imm, 0, 9) +
-					   (r ? PKE_REG_MASK_GET(me, TOPS, TOPS) : 0) +
 					   vector_num_out);
+	  
+	  /* handle "R" double-buffering bit */
+	  if(r)
+	    vu_addr += 16 * PKE_REG_MASK_GET(me, TOPS, TOPS);
 
 	  /* check for vu_addr overflow */
 	  while(vu_addr >= vu_addr_base + vu_addr_max_size)
@@ -1693,7 +1704,7 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
 	  /* For cyclic unpack, next operand quadword may come from instruction stream
 	     or be zero. */
 	  if((num == 0 && cl == 0 && wl == 0) || /* shortcut clear */
-	     ((cl < wl) && ((vector_num_out % wl) >= cl))) /* wl != 0, set above */
+	     ((cl < wl) && ((vector_num_out % wl) >= cl))) /* && short-circuit asserts wl != 0 */
 	    {
 	      /* clear operand - used only in a "indeterminate" state */
 	      for(i = 0; i < 4; i++)
@@ -1744,6 +1755,10 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
 		    unpacked_data[i] = SEXT32(operand, unitbits-1);
 		}
 
+	      /* clear remaining top words in vector */
+	      for(; i<4; i++)
+		unpacked_data[i] = 0;
+
 	      /* consumed a vector from the PKE instruction stream */
 	      vector_num_in ++;
 	    } /* unpack word from instruction operand */
@@ -1863,9 +1878,17 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
 void
 pke_code_error(struct pke_device* me, unsigned_4 pkecode)
 {
-  /* set ER1 flag in STAT register */
-  PKE_REG_MASK_SET(me, STAT, ER1, 1);
+  if(! PKE_REG_MASK_GET(me, ERR, ME1))
+    {
+      /* set ER1 flag in STAT register */
+      PKE_REG_MASK_SET(me, STAT, ER1, 1);
+      PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
+    }
+  else
+    {
+      PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_IDLE);
+    }
+
   /* advance over faulty word */
-  PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_IDLE);
   pke_pc_advance(me, 1);
 }
diff --git a/sim/testsuite/sky/ChangeLog b/sim/testsuite/sky/ChangeLog
index 4892bae..34cd512 100644
--- a/sim/testsuite/sky/ChangeLog
+++ b/sim/testsuite/sky/ChangeLog
@@ -1,3 +1,19 @@
+Fri Mar  6 17:30:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
+
+	* t-pke4.run: Removed test, since it succeeds yet returns a
+ 	non-zero exit code.
+
+	* Makefile.in (RUNOPTS): Removed --memory-size flag, made
+ 	unnecessary by sim/mips/interp.c changes.
+	(TESTS): Removed t-pke4.ok target.
+
+	* t-pke3.trc: Classified tests with [---] indicators, to match
+ 	items up with entries documented in testplan.sgml.  Added numerous
+ 	additional tests.  They assert behavior that assumes certain
+ 	favorable answers to PKE question set #6 to SCEI.
+
+	* t-pke1.trc: Added some [---] indicators.
+
 Mon Mar  2 18:54:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
 
 	* t-pke3.trc: Added FLUSH* / PKEMS* tests.
diff --git a/sim/testsuite/sky/Makefile.in b/sim/testsuite/sky/Makefile.in
index 2076bc8..838e682 100644
--- a/sim/testsuite/sky/Makefile.in
+++ b/sim/testsuite/sky/Makefile.in
@@ -55,7 +55,7 @@ LD_FOR_TARGET = `\
     echo $(target_alias)-ld ; \
   fi`
 
-RUNOPTS = --memory-size=0x1000000
+RUNOPTS = 
 
 RUN_FOR_TARGET = `\
   if [ -x ../../../sim/mips/run ]; then \
@@ -84,8 +84,7 @@ TESTS = \
 	t-pke2.vif1ok \
 	t-pke3.c \
 	t-pke3.run \
-	t-pke3.ok \
-	t-pke4.ok
+	t-pke3.ok
 
 check: sanity $(TESTS)
 sanity:
diff --git a/sim/testsuite/sky/t-pke1.trc b/sim/testsuite/sky/t-pke1.trc
index 053975f..0a5fa5d 100644
--- a/sim/testsuite/sky/t-pke1.trc
+++ b/sim/testsuite/sky/t-pke1.trc
@@ -1,6 +1,7 @@
 # PKE tests from SCEI PKE simulator
 # Converted by FChE using emacs macros from "sce-project/scei/pke/sample/tsv432.in"
 # Regenerated with word classification using PKE trace output.
+# [test.code.unpack] [test.unpack.V4_32]
 0 0x55555555_20000000_00000000_31000066 0x00000000 .PDD
 0 0x0000ffff_0000ffff_0000ffff_30000000 0x00000000 ...P
 0 0x30000000_7c000000_01000000_0000ffff 0x00000000 PPP.
diff --git a/sim/testsuite/sky/t-pke3.trc b/sim/testsuite/sky/t-pke3.trc
index ca906aa..d711f1a 100644
--- a/sim/testsuite/sky/t-pke3.trc
+++ b/sim/testsuite/sky/t-pke3.trc
@@ -1,8 +1,7 @@
-# PKE tests for code coverage
+# PKE tests for code coverage / functional testing
 #
 #
-#
-# ---- STCYCL/CYCLE ----
+# ---- STCYCL/CYCLE ---- [test.code.stcycl]
 #
 # Test STCYCL instruction
 0 0x0100fedc_00000000_00000000_00000000 0x00000000 PPPP
@@ -14,7 +13,25 @@
 ? 0x10003800 0x00000000 0x00002000
 #
 #
-# ---- OFFSET/OFST ----
+# ---- BASE/BASE ---- [test.code.base] [test.dbf.base]
+#
+# Read TOPS register; confirm original TOPS
+? 0x10003cc0 0x00000000 0xffffffff
+# Test BASE instruction on PKE1
+1 0x0300fedc_00000000_00000000_00000000 0x00000000 PPPP
+# Attempt erroneous write to BASE register
+! 0x10003ca0 0x0000dead
+# Read BASE register; confirm proper 10-bit value
+? 0x10003ca0 0x000002dc 0xffffffff
+# Read TOPS register; confirm unmodified TOPS
+? 0x10003cc0 0x00000000 0xffffffff
+# Read STAT register; confirm DBF=0
+? 0x10003c00 0x00000000 0x00000080
+# Read DBF register; confirm DBF=0
+? 0x10003cf0 0x00000000 0x00000001
+#
+#
+# ---- OFFSET/OFST ---- [test.code.offset] [test.dbf.offset]
 #
 # Test OFFSET instruction on PKE1
 1 0x0200ffff_00000000_00000000_00000000 0x00000000 PPPP
@@ -22,6 +39,8 @@
 ! 0x10003cb0 0x0000dead
 # Read OFST register; confirm proper 10-bit value
 ? 0x10003cb0 0x000003ff 0xffffffff
+# Read TOPS register; confirm recomputed TOPS
+? 0x10003cc0 0x000002dc 0xffffffff
 # Read STAT register; confirm DBF=0
 ? 0x10003c00 0x00000000 0x00000080
 # Read DBF register; confirm DBF=0
@@ -30,21 +49,7 @@
 ? 0x10003c00 0x00000000 0x00002000
 #
 #
-# ---- BASE/BASE ----
-#
-# Test BASE instruction on PKE1
-1 0x0300ffff_00000000_00000000_00000000 0x00000000 PPPP
-# Attempt erroneous write to BASE register
-! 0x10003ca0 0x0000dead
-# Read BASE register; confirm proper 10-bit value
-? 0x10003ca0 0x000003ff 0xffffffff
-# Read STAT register; confirm DBF=0
-? 0x10003c00 0x00000000 0x00000080
-# Read DBF register; confirm DBF=0
-? 0x10003cf0 0x00000000 0x00000001
-#
-#
-# ---- ITOP/ITOPS ----
+# ---- ITOP/ITOPS ---- [test.code.itop]
 #
 # Test ITOP instruction
 0 0x0400ffff_00000000_00000000_00000000 0x00000000 PPPP
@@ -56,7 +61,7 @@
 ? 0x10003800 0x00000000 0x00002000
 #
 #
-# ---- STMOD/MODE ----
+# ---- STMOD/MODE ---- [test.code.stmod]
 #
 # Test STMOD instruction
 0 0x05000003_00000000_00000000_00000000 0x00000000 PPPP
@@ -72,7 +77,7 @@
 ? 0x10003800 0x00000000 0x00002000
 #
 #
-# ---- STMARK/MARK ----
+# ---- STMARK/MARK ---- [test.code.stmark]
 #
 # Test MARK instruction
 0 0x0700abcd_00000000_00000000_00000000 0x00000000 PPPP
@@ -88,15 +93,15 @@
 ? 0x10003830 0x00001234 0xffffffff
 #
 #
-# ---- bad PKEcode/ER1, interrupts ----
+# ---- bad PKEcode/ER1, interrupts ---- [test.code.bad] [test.stall.er1]
 #
 # A bad PKEcode
-1 0x00000000_00000000_00000000_08000000 0x00000000 PPPP
+1 0x00000000_00000000_01000001_08000000 0x00000000 PPPP
 # should put PKE into stalled mode, not executing following PKENOPs
 # Read STAT register; confirm ER1 bit set
 ? 0x10003c00 0x00002000 0x00002000
-# Read CODE register; confirm PKE is stuck at bad code
-? 0x10003c80 0x08000000 0xffffffff
+# Read CODE register; confirm PKE is stuck just after bad code
+? 0x10003c80 0x01000001 0xffffffff
 # Reset PKE
 ! 0x10003c10 0x00000001
 # Read STAT register; confirm ER1 no longer set
@@ -107,32 +112,56 @@
 # A bad PKEcode with ER1 masked
 1 0x00000000_00000000_00000000_08000000 0x00000000 PPPP
 # should not put PKE into stalled mode, should execute following PKENOPs
-# Read STAT register; confirm ER1 bit set
-? 0x10003c00 0x00002000 0x00002000
+# Read STAT register; confirm ER1 bit not set
+? 0x10003c00 0x00000000 0x00002000
 # Read CODE register; confirm PKE went past bad code
 ? 0x10003c80 0x00000000 0xffffffff
 # Reset PKE
 ! 0x10003c10 0x00000001
-# Read STAT register; confirm ER1 no longer set
-? 0x10003c00 0x00000000 0x00002000
-#
 #
+# [test.stall.pis] [test.stall.int]
 # A good PKEcode (STMOD) with interrupt
-1 0x00000000_00000000_00000000_85000000 0x00000000 PPPP
+1 0x01000000_00000000_00000000_85000000 0x00000000 PPPP
 # should put PKE into stalled mode, not executing following PKENOPs
-# Read STAT register; confirm PIS & INT bits set
-? 0x10003c00 0x00000c00 0x00000c00
+# Read STAT register; confirm PIS & INT bits set, no ER1
+? 0x10003c00 0x00000c00 0x00002c00
 # Read CODE register; confirm PKE is stuck at bad code
 ? 0x10003c80 0x85000000 0xffffffff
 # Resume PKE with STC
 ! 0x10003c10 0x00000008
-# Read STAT register; confirm PIS & INT no longer set
-? 0x10003c00 0x00000000 0x00000c00
-# Read CODE register; confirm PKE executed trailing no-ops
-? 0x10003c80 0x00000000 0xffffffff
+# Read STAT register; confirm PIS & INT no longer set, no ER1
+? 0x10003c00 0x00000000 0x00002c00
+# Read CODE register; confirm PKE executed last instruction
+? 0x10003c80 0x01000000 0xffffffff
+#
+# [test.stall.pis] [test.stall.int] [test.stall.int-masked]
+# Mask INT stall: set ERR:MII
+! 0x10003c20 0x00000001
+# A good PKEcode (STMOD) with interrupt
+1 0x01000001_00000000_00000000_85000000 0x00000000 PPPP
+# should NOT put PKE into stalled mode
+# Read STAT register; confirm INT bits set but no PIS, and no ER1
+? 0x10003c00 0x00000800 0x00002c00
+# Read CODE register; confirm PKE executed last instruction
+? 0x10003c80 0x01000001 0xffffffff
+#
+# [test.stall.int-mark]
+# Reset the PKE, unmasking interrupt
+! 0x10003c10 0x00000001
+# A good PKEcode (PKEMARK) with interrupt
+1 0x01000002_01000001_0100000f_8700b00f 0x00000000 PPPP
+# should NOT put PKE into stalled mode
+# Read MARK register; confirm its value
+? 0x10003c30 0x0000b00f 0xffffffff
+# Read STAT register; confirm INT & PIS bits are set, and no ER1
+? 0x10003c00 0x00000c00 0x00002c00
+# Read CODE register; confirm PKE is stalled with following NOP instruction
+? 0x10003c80 0x0100000f 0xffffffff
+# Reset the PKE
+! 0x10003c10 0x00000001
 #
 #
-# ---- STMASK/MASK ----
+# ---- STMASK/MASK ---- [test.code.stmask]
 #
 # Test STMASK instruction; leave operand out for now
 0 0x20000000_00000000_00000000_00000000 0x00000000 PPPP
@@ -148,7 +177,7 @@
 ? 0x10003800 0x00000000 0x00002000
 #
 #
-# ---- DIRECT ----
+# ---- DIRECT/DIRECTHL ---- [test.code.direct] [test.code.directhl]
 #
 # Test DIRECT instruction; leave operand out for now
 1 0x50000001_00000000_00000000_00000000 0x00000000 PPPP
@@ -164,16 +193,16 @@
 ! 0x10003c10 0x00000001
 # Read STAT register; confirm ER1 no longer set
 ? 0x10003c00 0x00000000 0x00002000
-# Test DIRECT instruction with bad operand alignment
-1 0x00000000_00000000_50000001_00000000 0x00000000 PPPP
+# Test DIRECTHL instruction with bad operand alignment
+1 0x00000000_00000000_51000001_00000000 0x00000000 PPPP
 # Read STAT register; confirm ER1 bit set
 ? 0x10003c00 0x00002000 0x00002000
 # Reset PKE
 ! 0x10003c10 0x00000001
 # Read STAT register; confirm ER1 no longer set
 ? 0x10003c00 0x00000000 0x00002000
-# Test DIRECT instruction with bad operand alignment
-1 0x00000000_00000000_00000000_50000001 0x00000000 PPPP
+# Test DIRECTHL instruction with bad operand alignment
+1 0x00000000_00000000_00000000_51000001 0x00000000 PPPP
 # Read STAT register; confirm ER1 bit set
 ? 0x10003c00 0x00002000 0x00002000
 # Reset PKE
@@ -182,7 +211,7 @@
 ? 0x10003c00 0x00000000 0x00002000
 #
 #
-# ---- MPG - PKE0 ----
+# ---- MPG - PKE0 ---- [test.code.mpg]
 #
 # Test MPG instruction; leave operand out for now
 0 0x4a080000_00000000_00000000_00000000 0x00000000 PPPP
@@ -230,7 +259,7 @@
 ? 0x10003800 0x00000000 0x00002000
 #
 #
-# ---- MPG - PKE1 ----
+# ---- MPG - PKE1 ---- [test.code.mpg]
 #
 # Test MPG instruction; leave operand out for now
 1 0x4a080000_00000000_00000000_00000000 0x00000000 PPPP
@@ -278,19 +307,24 @@
 ? 0x10003c00 0x00000000 0x00002000
 #
 #
-# ---- STROW/ROW + DMA mismatch ----
+# ---- STROW/ROW + DMA mismatch ---- [test.code.strow] [test.dma.er0]
 #
+# Don't mask anything (including ER0)
+! 0x10003820 0x00000000
 # Test STROW instruction; leave operand out for now
 0 0x30000000_00000000_00000000_00000000 0x00000000 PPPP
 # Read STAT register; confirm PPS field set at WAIT
 ? 0x10003800 0x00000001 0x00000003
-# Write ERR register; mask ER0 stalling
-! 0x10003820 0x00000002
 # Supply operand - four words
 0 0x1234abcd_2345bcde_ffffffff_ffffffff 0x00000000 ..DD
-0 0x00000000_00000000_5432dcba_76543210 0x00000000 PP..
 # Read STAT register; confirm ER0 (DMA mismatch)
 ? 0x10003800 0x00001000 0x00001000
+# Confirm that PKE is stalled at STROW instruction
+? 0x10003880 0x30000000 0xffffffff
+# Supply final few operand words
+0 0x00000000_01000020_5432dcba_76543210 0x00000000 PP..
+# Resume PKE with STC
+! 0x10003810 0x00000008
 # Make erroneous write
 ! 0x10003900 0x11111111
 ! 0x10003910 0x22222222
@@ -301,13 +335,11 @@
 ? 0x10003910 0x1234abcd 0xffffffff
 ? 0x10003920 0x76543210 0xffffffff
 ? 0x10003930 0x5432dcba 0xffffffff
-# Read STAT register; confirm ER1 not set
-? 0x10003800 0x00000000 0x00002000
 # Reset PKE
 ! 0x10003810 0x00000001
 #
 #
-# ---- STCOL/COL + STOP/CONTINUE ----
+# ---- STCOL/COL + STOP/CONTINUE ---- [test.code.stcol] [test.stall.fbk] [test.stall.pfs]
 #
 # Test STCOL instruction; leave operand out for now
 0 0x31000000_00000000_00000000_00000000 0x00000000 PPPP
@@ -334,6 +366,7 @@
 ? 0x10003800 0x00000000 0x00002000
 #
 # Try stopping using STP bit this time
+# [test.stall.stp]  [test.stall.wait] [test.stall.pss]
 # Test STCOL instruction; leave operand out for now
 1 0x31000000_00000000_00000000_00000000 0x00000000 PPPP
 # Read STAT register; confirm PPS field set at WAIT
@@ -365,10 +398,11 @@
 ? 0x10003c00 0x00000000 0x00002000
 #
 #
-# ---- MSKPATH3 ----
+# ---- MSKPATH3 ---- [test.code.mskpath3]
 #
 # Set then clear MSKPATH3 on PKE1
 1 0x06008000_00000000_06000000_00000000 0x00000000 PPPP
+# XXX: test M3P register of GPUIF XXX
 # Read STAT register; confirm ER1 not set
 ? 0x10003c00 0x00000000 0x00002000
 # Erroneously run this on PKE0
@@ -379,7 +413,7 @@
 ! 0x10003810 0x00000001
 #
 #
-# ---- memory-mapped port reading ----
+# ---- memory-mapped port reading ---- [test.mmap]
 #
 # Erroneously read words from FIFO ports
 ? 0x10004000 0x00000000 0xffffffff
@@ -432,8 +466,18 @@
 ! 0x10003d60 0x00000000
 ! 0x10003d70 0x00000000
 #
+# Erroneously read/write words between registers
+! 0x10003c14 0xffffffff
+! 0x10003c18 0xffffffff
+! 0x10003c1c 0xffffffff
+! 0x10003874 0xffffffff
+! 0x10003884 0xffffffff
+! 0x100038fc 0xffffffff
 #
-# ---- FLUSH/FLUSHE/FLUSHA & CALL/CALLF/CONT ----
+#
+# ---- FLUSH/FLUSHE/FLUSHA & CALL/CALLF/CONT ---- [test.code.flush] [test.code.flushe]
+# [test.code.flusha] [test.code.pkemscal] [test.code.pkemscalf] [test.code.pkemscnt]
+# [test.stall.vu]
 #
 # Load a bunch of NOP[e]/NOP instructions into the VU
 # 0x000002ff_8000033c == NOP NOP
@@ -447,6 +491,8 @@
 1 0x400002ff_8000033c_000002ff_8000033c 0x00000000 ....
 # Start VU; FLUSH
 1 0x10000000_14000000_00000000_00000000 0x00000000 PPPP
+# Assert PEW bit on while waiting for VU
+? 0x10003c00 0x00000004 0x00000004
 # Send a few more NOPs to let VU get to first END
 1 0x00000000_00000000_00000000_00000000 0x00000000 PPPP
 1 0x00000000_00000000_00000000_00000000 0x00000000 PPPP
@@ -472,4 +518,99 @@
 1 0x00000000_00000000_00000000_00000000 0x00000000 PPPP
 # Assert VU is in idle state
 ? 0x110073d0 0x00000000 0x00000200
-
+#
+#
+# ---- DBF ---- [test.code.base] [test.code.offset] [test.dbf]
+# [test.code.pkemscal] [test.code.pkemscalf] [test.code.pkemscnt]
+#
+# Load a bunch of NOP[e]/NOP instructions into the VU
+# 0x000002ff_8000033c == NOP NOP
+# 0x400002ff_8000033c == NOP[e] NOP
+# MPG 10 instructions with lots of ENDs
+1 0x4a0a0000_00000000_00000000_00000000 0x00000000 PPPP
+1 0x400002ff_8000033c_000002ff_8000033c 0x00000000 ....
+1 0x000002ff_8000033c_000002ff_8000033c 0x00000000 ....
+1 0x000002ff_8000033c_400002ff_8000033c 0x00000000 ....
+1 0x400002ff_8000033c_000002ff_8000033c 0x00000000 ....
+1 0x000002ff_8000033c_000002ff_8000033c 0x00000000 ....
+# Load BASE & OFFSET registers; stick in some DMA tags too [test.dma]
+1 0x02000200_03000100_77777777_77777777 0x00000000 PPDD
+# Confirm BASE & OFFSET & TOPS & TOP & DBF registers
+? 0x10003ca0 0x00000100 0xffffffff
+? 0x10003cb0 0x00000200 0xffffffff
+? 0x10003cc0 0x00000100 0xffffffff
+? 0x10003ce0 0x00000000 0xffffffff
+? 0x10003cf0 0x00000000 0xffffffff
+# Make one CALL
+1 0x00000000_00000000_00000000_14000000 0x00000000 PPPP
+# Confirm TOP & DBF & TOPS registers after DBF flip
+? 0x10003ce0 0x00000100 0xffffffff
+? 0x10003cf0 0x00000001 0xffffffff
+? 0x10003cc0 0x00000300 0xffffffff
+# Make one CALLF
+1 0x00000000_00000000_00000000_15000000 0x00000000 PPPP
+# Confirm TOP & DBF & TOPS registers after DBF flip
+? 0x10003ce0 0x00000300 0xffffffff
+? 0x10003cf0 0x00000000 0xffffffff
+? 0x10003cc0 0x00000100 0xffffffff
+# Make one CONT
+1 0x00000000_00000000_00000000_17000000 0x00000000 PPPP
+# Confirm TOP & DBF & TOPS registers after DBF flip
+? 0x10003ce0 0x00000100 0xffffffff
+? 0x10003cf0 0x00000001 0xffffffff
+? 0x10003cc0 0x00000300 0xffffffff
+#
+#
+# ---- MPG/UNPACK address overflow tests ---- [test.ext.mpgaddr]
+#
+# MPG to PKE0 near top of address range
+# [test.unpack.V3_32] [test.code.stcycl] [test.unpack.endian] [test.unpack.unsigned]
+# [test.unpack.no-r]
+0 0x6804ffff_01000000_77777777_55555555 0x00000000 PPDD
+0 0x33330333_22222022_11111101_ccccccc0 0x00000000 ....
+0 0x07777777_60666666_55055555_44404444 0x00000000 ....
+0 0xbbbb0bbb_aaaaa0aa_99999909_88888880 0x00000000 ....
+# Assert that all words were written correctly
+? 0x11004ff0 0xccccccc0 0xffffffff
+? 0x11004ff4 0x11111101 0xffffffff
+? 0x11004ff8 0x22222022 0xffffffff
+? 0x11004ffc 0x00000000 0xffffffff
+? 0x11004000 0x33330333 0xffffffff
+? 0x11004004 0x44404444 0xffffffff
+? 0x11004008 0x55055555 0xffffffff
+? 0x1100400c 0x00000000 0xffffffff
+? 0x11004010 0x60666666 0xffffffff
+? 0x11004014 0x07777777 0xffffffff
+? 0x11004018 0x88888880 0xffffffff
+? 0x1100401c 0x00000000 0xffffffff
+? 0x11004020 0x99999909 0xffffffff
+? 0x11004024 0xaaaaa0aa 0xffffffff
+? 0x11004028 0xbbbb0bbb 0xffffffff
+? 0x1100402c 0x00000000 0xffffffff
+#
+# MPG to PKE1 near top of PKE1 address range [test.unpack.V4_5]
+# [test.unpack.signed] [test.unpack.r]
+1 0x02000100_00000100_99999999_33333333 0x00000000 PPDD
+1 0x6f058eff_01000000_77777777_55555555 0x00000000 PPDD
+1 0x00000000_77779999_deadbeef_aaaa5555 0x00000000 P...
+# Assert that all words were written correctly
+? 0x1100fff0 0xfffffff5 0xffffffff
+? 0x1100fff4 0x0000000a 0xffffffff
+? 0x1100fff8 0xfffffff5 0xffffffff
+? 0x1100fffc 0x00000000 0xffffffff
+? 0x1100c000 0x0000000a 0xffffffff
+? 0x1100c004 0xfffffff5 0xffffffff
+? 0x1100c008 0x0000000a 0xffffffff
+? 0x1100c00c 0x00000001 0xffffffff
+? 0x1100c010 0x0000000f 0xffffffff
+? 0x1100c014 0xfffffff7 0xffffffff
+? 0x1100c018 0x0000000f 0xffffffff
+? 0x1100c01c 0x00000001 0xffffffff
+? 0x1100c020 0x0000000d 0xffffffff
+? 0x1100c024 0xfffffff5 0xffffffff
+? 0x1100c028 0xfffffff7 0xffffffff
+? 0x1100c02c 0x00000001 0xffffffff
+? 0x1100c030 0xfffffff9 0xffffffff
+? 0x1100c034 0x0000000c 0xffffffff
+? 0x1100c038 0x00000006 0xffffffff
+? 0x1100c03c 0x00000001 0xffffffff
diff --git a/sim/testsuite/sky/t-pke4.run b/sim/testsuite/sky/t-pke4.run
deleted file mode 100644
index 4c2c17f..0000000
--- a/sim/testsuite/sky/t-pke4.run
+++ /dev/null