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authorSteve Chamberlain <sac@cygnus>1995-06-21 22:05:47 +0000
committerSteve Chamberlain <sac@cygnus>1995-06-21 22:05:47 +0000
commitedf6a8435680e770828350718f82bd42983f5a82 (patch)
treec1d043a119d8b6e726c7590fdf8af3f0f9b93763 /sim
parent652970ff68f9f38f8e31ec95c6cf537bd306022f (diff)
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* interp.c: (SIGBUS, SIGTERM): Define if not.
(sim_memory_size): default to 2^19 on PCs. (sim_resume): Poll for quits on win32.
Diffstat (limited to 'sim')
-rw-r--r--sim/sh/ChangeLog10
-rw-r--r--sim/sh/Makefile.in5
-rw-r--r--sim/sh/interp.c47
3 files changed, 48 insertions, 14 deletions
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index 6859d5a..3267ca9 100644
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -1,3 +1,13 @@
+Wed Jun 21 15:03:49 1995 Steve Chamberlain <sac@slash.cygnus.com>
+
+ * interp.c: (SIGBUS, SIGTERM): Define if not.
+ (sim_memory_size): default to 2^19 on PCs.
+ (sim_resume): Poll for quits on win32.
+
+Wed May 24 16:22:48 1995 Jim Wilson <wilson@chestnut.cygnus.com>
+
+ * gencode.c (op_tab): Add SH3 support.
+
Wed May 24 14:07:11 1995 Steve Chamberlain <sac@slash.cygnus.com>
* gencode.c (tab): Add bsrf and braf.
diff --git a/sim/sh/Makefile.in b/sim/sh/Makefile.in
index 6bfb402..5295aa2 100644
--- a/sim/sh/Makefile.in
+++ b/sim/sh/Makefile.in
@@ -68,7 +68,8 @@ XL=-lX11
X=
XL=
INCDIR = $(srcdir)/../../include
-CSEARCH = -I. -I$(srcdir) -I../../include -I../../bfd -I$(INCDIR) -I$(srcdir)/../../bfd -I$(srcdir)/../../gdb
+CSEARCH = -I. -I$(srcdir) -I../../include \
+ -I../../bfd -I$(INCDIR) -I$(srcdir)/../../bfd -I$(srcdir)/../../gdb -I$(srcdir)/../../newlib/libc/sys/sh
DEP = mkdep
#### host, target, and site specific Makefile frags come in here.
@@ -95,7 +96,7 @@ table.c:gencode
# indent table.c
gencode:gencode.c
- $(CC_FOR_BUILD) -o gencode $<
+ $(CC_FOR_BUILD) -o gencode $(srcdir)/gencode.c
#### host and target dependent Makefile fragments come in here.
diff --git a/sim/sh/interp.c b/sim/sh/interp.c
index 38a1d26..8bf1de8 100644
--- a/sim/sh/interp.c
+++ b/sim/sh/interp.c
@@ -20,16 +20,25 @@
#include <signal.h>
#include "sysdep.h"
-#include <sys/times.h>
-#include <sys/param.h>
+//#include <sys/times.h>
+//#include <sys/param.h>
#include "bfd.h"
#include "remote-sim.h"
-#include "../../newlib/libc/sys/sh/sys/syscall.h"
+#include <sys/syscall.h>
+
+#ifndef SIGBUS
+#define SIGBUS SIGSEGV
+#endif
+#ifndef SIGQUIT
+#define SIGQUIT SIGTERM
+#endif
+
#define O_RECOMPILE 85
#define DEFINE_TABLE
-/*#define ACE_FAST*/
#define DISASSEMBLER_TABLE
+
+
#define SBIT(x) ((x)&sbit)
#define R0 saved_state.asregs.regs[0]
#define Rn saved_state.asregs.regs[n]
@@ -142,7 +151,7 @@ typedef union
}
asregs;
- int asints[28];
+ int asints[28];
} saved_state_type;
saved_state_type saved_state;
@@ -305,7 +314,7 @@ int empty[16];
#define TL(x) if ((x) == prevlock) stalls++;
#define TB(x,y) if ((x) == prevlock || (y)==prevlock) stalls++;
-#ifdef __GO32__
+#if defined(__GO32__) || defined(WIN32)
int sim_memory_size = 19;
#else
int sim_memory_size = 24;
@@ -467,7 +476,7 @@ trap (i, regs, memory, maskl, maskw, little_endian)
switch (regs[4])
{
-#ifndef __GO32__
+#if !defined(__GO32__) && !defined(WIN32)
case SYS_fork:
regs[0] = fork ();
@@ -758,8 +767,11 @@ macw (regs, memory, n, m)
}
else
{
+ long mach;
/* Add to MACH the sign extended product, and carry from low sum. */
- MACH += (-(prod < 0)) + ((unsigned long) sum < prod);
+ mach = MACH + (-(prod < 0)) + ((unsigned long) sum < prod);
+ /* Sign extend at 10:th bit in MACH. */
+ MACH = (mach & 0x1ff) | -(mach & 0x200);
}
MACL = sum;
}
@@ -796,7 +808,7 @@ sim_size (power)
}
-extern int target_byte_order;
+int target_byte_order;
static void
set_static_little_endian(x)
@@ -885,7 +897,7 @@ sim_resume (step, siggnal)
register int prevlock;
register int thislock;
register unsigned int doprofile;
-#ifdef __GO32__
+#if defined(__GO32__) || defined(WIN32)
register int pollcount = 0;
#endif
register int little_endian = target_byte_order == 1234;
@@ -961,6 +973,17 @@ sim_resume (step, siggnal)
}
}
#endif
+#if defined (WIN32)
+ pollcount++;
+ if (pollcount > 1000)
+ {
+ pollcount = 0;
+ if (win32pollquit())
+ {
+ control_c();
+ }
+ }
+#endif
#ifndef ACE_FAST
prevlock = thislock;
@@ -989,8 +1012,7 @@ sim_resume (step, siggnal)
while (!saved_state.asregs.exception);
if (saved_state.asregs.exception == SIGILL
- || saved_state.asregs.exception == SIGBUS
- || (saved_state.asregs.exception == SIGTRAP && !step))
+ || saved_state.asregs.exception == SIGBUS)
{
pc -= 2;
}
@@ -1163,3 +1185,4 @@ sim_kill ()
{
/* nothing to do */
}
+