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author | Kevin Buettner <kevinb@redhat.com> | 2012-08-01 14:38:19 +0000 |
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committer | Kevin Buettner <kevinb@redhat.com> | 2012-08-01 14:38:19 +0000 |
commit | 9256caa6041eb2c99c8147c5d38e56d78eebcaff (patch) | |
tree | b9186dadad79f5690526fc508c761cb92273fbdc /sim | |
parent | 8fbf7334deccc8a6f3ce9ec01ae801da781c2d82 (diff) | |
download | gdb-9256caa6041eb2c99c8147c5d38e56d78eebcaff.zip gdb-9256caa6041eb2c99c8147c5d38e56d78eebcaff.tar.gz gdb-9256caa6041eb2c99c8147c5d38e56d78eebcaff.tar.bz2 |
* wrapper.c (libiberty.h): Include.
(sim_store_register, sim_fetch_register): On success, return
length, instead of -1.
Diffstat (limited to 'sim')
-rw-r--r-- | sim/arm/ChangeLog | 6 | ||||
-rw-r--r-- | sim/arm/wrapper.c | 14 |
2 files changed, 14 insertions, 6 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 7757c8c..9df17bd 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,9 @@ +2012-08-01 Kevin Buettner <kevinb@redhat.com> + + * wrapper.c (libiberty.h): Include. + (sim_store_register, sim_fetch_register): On success, return + length, instead of -1. + 2012-06-15 Joel Brobecker <brobecker@adacore.com> * config.in, configure: Regenerate. diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c index f4348b9..0d7fbef 100644 --- a/sim/arm/wrapper.c +++ b/sim/arm/wrapper.c @@ -37,6 +37,7 @@ #include "run-sim.h" #include "gdb/sim-arm.h" #include "gdb/signals.h" +#include "libiberty.h" host_callback *sim_callback; @@ -443,7 +444,7 @@ sim_store_register (sd, rn, memory, length) SIM_DESC sd ATTRIBUTE_UNUSED; int rn; unsigned char *memory; - int length ATTRIBUTE_UNUSED; + int length; { init (); @@ -544,7 +545,7 @@ sim_store_register (sd, rn, memory, length) return 0; } - return -1; + return length; } int @@ -552,9 +553,10 @@ sim_fetch_register (sd, rn, memory, length) SIM_DESC sd ATTRIBUTE_UNUSED; int rn; unsigned char *memory; - int length ATTRIBUTE_UNUSED; + int length; { ARMword regval; + int len = length; init (); @@ -657,16 +659,16 @@ sim_fetch_register (sd, rn, memory, length) return 0; } - while (length) + while (len) { tomem (state, memory, regval); - length -= 4; + len -= 4; memory += 4; regval = 0; } - return -1; + return length; } #ifdef SIM_TARGET_SWITCHES |