Preliminary suport for xor-endian suport in core module.

6 files changed, 181 insertions, 79 deletions

diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index 2719e33..6421e70 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,3 +1,27 @@
+Fri May 23 14:24:31 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-inline.h: Review description.
+	
+	* sim-core.h, sim-core.c: Reduce number of functions being inlined
+ 	to just those involved in data transfers and configuration.
+	
+	* sim-xcat.h (XSTRING): New macro, map macro definition onto
+ 	string.
+	* sim-n-core.h (sim_core_read_aligned_N): Use.
+	(sim_core_read_unaligned_N): Ditto.
+	(sim_core_read_unaligned_N): Ditto..
+	(sim_core_write_unaligned_N): Ditto.
+	
+	* sim-core.h: Add xor endian bitmap to main structure.  *
+	
+ 	sim-n-core.h (sim_core_write_aligned_N): Add suport for xor
+ 	endian.
+	(sim_core_read_aligned_N): Ditto.
+
+	* sim-core.c (sim_core_set_xor_endian): New function.
+	(sim_core_attach): Don't overwrite the per-cpu xor map when
+ 	cloning the global core.
+
 Fri May 23 10:53:13 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 
 	* sim-engine.h: Update below so that it is using an enumerated
diff --git a/sim/common/sim-core.c b/sim/common/sim-core.c
index 3b9786c..7e03a7f 100644
--- a/sim/common/sim-core.c
+++ b/sim/common/sim-core.c
@@ -27,9 +27,13 @@
 
 
 /* "core" module install handler.
+
    This is called via sim_module_install to install the "core" subsystem
    into the simulator.  */
 
+static MODULE_INIT_FN sim_core_init;
+static MODULE_UNINSTALL_FN sim_core_uninstall;
+
 EXTERN_SIM_CORE\
 (SIM_RC)
 sim_core_install (SIM_DESC sd)
@@ -43,7 +47,7 @@ sim_core_install (SIM_DESC sd)
 
 /* Uninstall the "core" subsystem from the simulator.  */
 
-EXTERN_SIM_CORE\
+STATIC_SIM_CORE\
 (void)
 sim_core_uninstall (SIM_DESC sd)
 {
@@ -51,7 +55,7 @@ sim_core_uninstall (SIM_DESC sd)
 }
 
 
-EXTERN_SIM_CORE\
+STATIC_SIM_CORE\
 (SIM_RC)
 sim_core_init (SIM_DESC sd)
 {
@@ -82,7 +86,8 @@ sim_core_init (SIM_DESC sd)
 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
 sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
 
-static void
+STATIC_SIM_CORE\
+(void)
 sim_core_signal (SIM_DESC sd,
 		 sim_cpu *cpu,
 		 sim_cia cia,
@@ -107,11 +112,9 @@ sim_core_signal (SIM_DESC sd,
       sim_engine_abort (sd, cpu, cia, "sim_core_signal - internal error - bad switch");
     }
 }
-
-
-
 #endif
 
+
 STATIC_INLINE_SIM_CORE\
 (const char *)
 sim_core_map_to_str (sim_core_maps map)
@@ -126,12 +129,12 @@ sim_core_map_to_str (sim_core_maps map)
 }
 
 
-STATIC_INLINE_SIM_CORE\
+STATIC_SIM_CORE\
 (sim_core_mapping *)
 new_sim_core_mapping(SIM_DESC sd,
 		     attach_type attach,
 		     int space,
-		     unsigned_word addr,
+		     address_word addr,
 		     unsigned nr_bytes,
 		     device *device,
 		     void *buffer,
@@ -159,13 +162,13 @@ new_sim_core_mapping(SIM_DESC sd,
 }
 
 
-STATIC_INLINE_SIM_CORE\
+STATIC_SIM_CORE\
 (void)
 sim_core_map_attach(SIM_DESC sd,
 		    sim_core_map *access_map,
 		    attach_type attach,
 		    int space,
-		    unsigned_word addr,
+		    address_word addr,
 		    unsigned nr_bytes, /* host limited */
 		    device *client, /*callback/default*/
 		    void *buffer, /*raw_memory*/
@@ -224,14 +227,14 @@ sim_core_map_attach(SIM_DESC sd,
 }
 
 
-INLINE_SIM_CORE\
+EXTERN_SIM_CORE\
 (void)
 sim_core_attach(SIM_DESC sd,
 		sim_cpu *cpu,
 		attach_type attach,
 		access_type access,
 		int space,
-		unsigned_word addr,
+		address_word addr,
 		unsigned nr_bytes, /* host limited */
 		device *client,
 		void *optional_buffer)
@@ -317,7 +320,9 @@ sim_core_attach(SIM_DESC sd,
      FIXME - later this will be replaced by true processor specific
      maps. */
   for (i = 0; i < MAX_NR_PROCESSORS; i++)
-    *CPU_CORE (STATE_CPU (sd, i)) = *STATE_CORE (sd);
+    {
+      CPU_CORE (STATE_CPU (sd, i))->common = *STATE_CORE (sd);
+    }
 }
 
 
@@ -325,7 +330,7 @@ STATIC_INLINE_SIM_CORE\
 (sim_core_mapping *)
 sim_core_find_mapping(sim_core *core,
 		      sim_core_maps map,
-		      unsigned_word addr,
+		      address_word addr,
 		      unsigned nr_bytes,
 		      transfer_type transfer,
 		      int abort, /*either 0 or 1 - hint to inline/-O */
@@ -355,18 +360,18 @@ sim_core_find_mapping(sim_core *core,
 STATIC_INLINE_SIM_CORE\
 (void *)
 sim_core_translate(sim_core_mapping *mapping,
-	       unsigned_word addr)
+	       address_word addr)
 {
   return (void *)(((char *)mapping->buffer) + addr - mapping->base);
 }
 
 
-INLINE_SIM_CORE\
+EXTERN_SIM_CORE\
 (unsigned)
 sim_core_read_buffer(SIM_DESC sd,
 		     sim_core_maps map,
 		     void *buffer,
-		     unsigned_word addr,
+		     address_word addr,
 		     unsigned len)
 {
   unsigned count = 0;
@@ -404,12 +409,12 @@ sim_core_read_buffer(SIM_DESC sd,
 }
 
 
-INLINE_SIM_CORE\
+EXTERN_SIM_CORE\
 (unsigned)
 sim_core_write_buffer(SIM_DESC sd,
 		      sim_core_maps map,
 		      const void *buffer,
-		      unsigned_word addr,
+		      address_word addr,
 		      unsigned len)
 {
   unsigned count = 0;
@@ -447,6 +452,40 @@ sim_core_write_buffer(SIM_DESC sd,
 }
 
 
+EXTERN_SIM_CORE\
+(void)
+sim_core_set_xor (sim_cpu *cpu,
+		  sim_cia cia,
+		  int is_xor)
+{
+  sim_cpu_core *cpu_core = CPU_CORE (cpu);
+  /* set up the XOR registers if required. */
+  if (WITH_XOR_ENDIAN) {
+    {
+      int i = 1;
+      unsigned mask;
+      if (is_xor)
+	mask = WITH_XOR_ENDIAN - 1;
+      else
+	mask = 0;
+      while (i - 1 < WITH_XOR_ENDIAN)
+	{
+	  cpu_core->xor[i-1] = mask;
+	  mask = (mask << 1) & (WITH_XOR_ENDIAN - 1);
+	  i = (i << 1);
+	}
+    }
+  }
+  else {
+    if (is_xor)
+      sim_engine_abort (CPU_STATE (cpu), cpu, cia,
+			"Attempted to enable xor-endian mode when permenantly disabled.");
+  }
+}
+
+
+
+
 /* define the read/write 1/2/4/8/word functions */
 
 #define N 1
diff --git a/sim/common/sim-core.h b/sim/common/sim-core.h
index 5529105..5821b8c 100644
--- a/sim/common/sim-core.h
+++ b/sim/common/sim-core.h
@@ -23,6 +23,18 @@
 #define _SIM_CORE_H_
 
 
+/* core signals (error conditions) */
+
+typedef enum {
+  sim_core_unmapped_signal,
+  sim_core_unaligned_signal,
+  nr_sim_core_signals,
+} sim_core_signals;
+
+/* define SIM_CORE_SIGNAL to catch these signals - see sim-core.c for details */
+
+
+
 /* basic types */
 
 typedef struct _sim_core_mapping sim_core_mapping;
@@ -66,9 +78,13 @@ struct _sim_core {
 };
 
 
-/* Per CPU distributed component of the core */
+/* Per CPU distributed component of the core.  At present this is
+   mostly a clone of the global core data structure. */
 
-typedef sim_core sim_cpu_core;
+typedef struct _sim_cpu_core {
+  sim_core common;
+  address_word xor[WITH_XOR_ENDIAN];
+} sim_cpu_core;
 
 
 /* Install the "core" module.  */
@@ -77,28 +93,21 @@ EXTERN_SIM_CORE\
 (SIM_RC) sim_core_install (SIM_DESC sd);
 
 
-/* Uninstall the "core" subsystem.  */
-
-EXTERN_SIM_CORE\
-(void)
-sim_core_uninstall (SIM_DESC sd);
 
+/* Configure the per-cpu core's XOR endian transfer mode.  Only
+   applicable when WITH_XOR_ENDIAN is enabled.
 
+   Targets suporting XOR endian, shall notify the core of any changes
+   in state via this call.
 
-/* initialize */
+   FIXME - XOR endian memory transfers currently only work when made
+   through a correctly aligned cpu load/store. */
 
 EXTERN_SIM_CORE\
-(SIM_RC) sim_core_init
-(SIM_DESC sd);
-
-
-
-/* tracing */
-
-INLINE_SIM_CORE\
-(void) sim_core_set_trace\
-(SIM_DESC sd,
- int level);
+(void) sim_core_set_xor\
+(sim_cpu *cpu,
+ sim_cia cia,
+ int is_xor);
 
 
 
@@ -107,14 +116,14 @@ INLINE_SIM_CORE\
    The CPU option (when non NULL) specifes the single processor that
    the memory space is to be attached to. (unimplemented) */
 
-INLINE_SIM_CORE\
+EXTERN_SIM_CORE\
 (void) sim_core_attach
 (SIM_DESC sd,
  sim_cpu *cpu,
  attach_type attach,
  access_type access,
  int address_space,
- unsigned_word addr,
+ address_word addr,
  unsigned nr_bytes, /* host limited */
  device *client,
  void *optional_buffer);
@@ -127,20 +136,20 @@ INLINE_SIM_CORE\
    target.  Should any problems occure, the number of bytes
    successfully transfered is returned. */
 
-INLINE_SIM_CORE\
+EXTERN_SIM_CORE\
 (unsigned) sim_core_read_buffer
 (SIM_DESC sd,
  sim_core_maps map,
  void *buffer,
- unsigned_word addr,
+ address_word addr,
  unsigned nr_bytes);
 
-INLINE_SIM_CORE\
+EXTERN_SIM_CORE\
 (unsigned) sim_core_write_buffer
 (SIM_DESC sd,
  sim_core_maps map,
  const void *buffer,
- unsigned_word addr,
+ address_word addr,
  unsigned nr_bytes);
 
 
@@ -161,7 +170,7 @@ INLINE_SIM_CORE\
 (sim_cpu *cpu, \
  sim_cia cia, \
  sim_core_maps map, \
- unsigned_word addr, \
+ address_word addr, \
  unsigned_##N val);
 
 DECLARE_SIM_CORE_WRITE_N(aligned,1)
@@ -190,7 +199,7 @@ INLINE_SIM_CORE\
 (sim_cpu *cpu, \
  sim_cia cia, \
  sim_core_maps map, \
- unsigned_word addr);
+ address_word addr);
 
 DECLARE_SIM_CORE_READ_N(aligned,1)
 DECLARE_SIM_CORE_READ_N(aligned,2)
diff --git a/sim/common/sim-n-core.h b/sim/common/sim-n-core.h
index 8ab7973..a0570e1 100644
--- a/sim/common/sim-n-core.h
+++ b/sim/common/sim-n-core.h
@@ -40,14 +40,22 @@ INLINE_SIM_CORE(unsigned_N)
 sim_core_read_aligned_N(sim_cpu *cpu,
 			sim_cia cia,
 			sim_core_maps map,
-			unsigned_word addr)
+			unsigned_word xaddr)
 {
+  sim_cpu_core *cpu_core = CPU_CORE (cpu);
+  sim_core *core = &cpu_core->common;
   unsigned_N val;
-  sim_core_mapping *mapping = sim_core_find_mapping (CPU_CORE (cpu), map,
-						     addr,
-						     sizeof (unsigned_N),
-						     1,
-						     cpu, cia); /*abort*/
+  sim_core_mapping *mapping;
+  address_word addr;
+  if (WITH_XOR_ENDIAN)
+    addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
+  else
+    addr = xaddr;
+  mapping = sim_core_find_mapping (core, map,
+				   addr,
+				   sizeof (unsigned_N),
+				   read_transfer,
+				   1 /*abort*/, cpu, cia);
 #if (WITH_DEVICES)
   if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
     unsigned_N data;
@@ -56,7 +64,8 @@ sim_core_read_aligned_N(sim_cpu *cpu,
 			       mapping->space,
 			       addr,
 			       sizeof (unsigned_N)) != sizeof (unsigned_N))
-      device_error (mapping->device, "internal error - sim_core_read_N() - io_read_buffer should not fail");
+      device_error (mapping->device, "internal error - %s - io_read_buffer should not fail",
+		    XSTRING (sim_core_read_aligned_N));
     val = T2H_N (data);
   }
   else
@@ -78,7 +87,7 @@ INLINE_SIM_CORE(unsigned_N)
 sim_core_read_unaligned_N(sim_cpu *cpu,
 			  sim_cia cia,
 			  sim_core_maps map,
-			  unsigned_word addr)
+			  address_word addr)
 {
   int alignment = sizeof (unsigned_N) - 1;
   /* if hardwired to forced alignment just do it */
@@ -90,9 +99,9 @@ sim_core_read_unaligned_N(sim_cpu *cpu,
     switch (CURRENT_ALIGNMENT)
       {
       case STRICT_ALIGNMENT:
-	/* FIXME - notify abort handler */
-	sim_io_error (CPU_STATE (cpu), "read-%d - misaligned access to 0x%lx",
-		      sizeof (unsigned_N), (unsigned long) addr);
+	SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
+			 sizeof (unsigned_N), addr,
+			 read_transfer, sim_core_unaligned_signal);
 	return -1;
       case NONSTRICT_ALIGNMENT:
 	{
@@ -100,18 +109,23 @@ sim_core_read_unaligned_N(sim_cpu *cpu,
 	  if (sim_core_read_buffer (CPU_STATE (cpu), map, &val, addr,
 				    sizeof(unsigned_N))
 	      != sizeof(unsigned_N))
-	    sim_io_error(CPU_STATE (cpu), "misaligned %d byte read to 0x%lx failed",
-			 sizeof(unsigned_N), (unsigned long) addr);
+	    SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
+			     sizeof (unsigned_N), addr,
+			     read_transfer, sim_core_unaligned_signal);
 	  val = T2H_N(val);
 	  return val;
 	}
       case FORCED_ALIGNMENT:
 	return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
       case MIXED_ALIGNMENT:
-	sim_io_error (CPU_STATE (cpu), "internal error - sim_core_read_unaligned_N - mixed alignment");
+	sim_engine_abort (CPU_STATE (cpu), cpu, cia,
+			  "internal error - %s - mixed alignment",
+			  XSTRING (sim_core_read_unaligned_N));
 	return 0;
       default:
-	sim_io_error (CPU_STATE (cpu), "internal error - sim_core_read_unaligned_N - bad switch");
+	sim_engine_abort (CPU_STATE (cpu), cpu, cia,
+			  "internal error - %s - bad switch",
+			  XSTRING (sim_core_read_unaligned_N));
 	return 0;
       }
 }
@@ -121,14 +135,22 @@ INLINE_SIM_CORE(void)
 sim_core_write_aligned_N(sim_cpu *cpu,
 			 sim_cia cia,
 			 sim_core_maps map,
-			 unsigned_word addr,
+			 unsigned_word xaddr,
 			 unsigned_N val)
 {
-  sim_core_mapping *mapping = sim_core_find_mapping(CPU_CORE (cpu), map,
-						    addr,
-						    sizeof (unsigned_N),
-						    1,
-						    cpu, cia); /*abort*/
+  sim_cpu_core *cpu_core = CPU_CORE (cpu);
+  sim_core *core = &cpu_core->common;
+  sim_core_mapping *mapping;
+  address_word addr;
+  if (WITH_XOR_ENDIAN)
+    addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
+  else
+    addr = xaddr;
+  mapping = sim_core_find_mapping(core, map,
+				  addr,
+				  sizeof (unsigned_N),
+				  write_transfer,
+				  1 /*abort*/, cpu, cia);
 #if (WITH_DEVICES)
   if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
     unsigned_N data = H2T_N (val);
@@ -139,7 +161,8 @@ sim_core_write_aligned_N(sim_cpu *cpu,
 				sizeof (unsigned_N), /* nr_bytes */
 				cpu,
 				cia) != sizeof (unsigned_N))
-      device_error (mapping->device, "internal error - sim_core_write_N() - io_write_buffer should not fail");
+      device_error (mapping->device, "internal error - %s - io_write_buffer should not fail",
+		    XSTRING (sim_core_write_aligned_N));
   }
   else
 #endif
@@ -159,7 +182,7 @@ INLINE_SIM_CORE(void)
 sim_core_write_unaligned_N(sim_cpu *cpu,
 			   sim_cia cia,
 			   sim_core_maps map,
-			   unsigned_word addr,
+			   address_word addr,
 			   unsigned_N val)
 {
   int alignment = sizeof (unsigned_N) - 1;
@@ -172,10 +195,9 @@ sim_core_write_unaligned_N(sim_cpu *cpu,
     switch (CURRENT_ALIGNMENT)
       {
       case STRICT_ALIGNMENT:
-	/* FIXME - notify abort handler */
-	sim_io_error (CPU_STATE (cpu),
-		      "write-%d - misaligned access to 0x%lx",
-		      sizeof (unsigned_N), (unsigned long) addr);
+	SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
+			 sizeof (unsigned_N), addr,
+			 write_transfer, sim_core_unaligned_signal);
 	break;
       case NONSTRICT_ALIGNMENT:
 	{
@@ -183,18 +205,22 @@ sim_core_write_unaligned_N(sim_cpu *cpu,
 	  if (sim_core_write_buffer (CPU_STATE (cpu), map, &val, addr,
 				     sizeof(unsigned_N))
 	      != sizeof(unsigned_N))
-	    sim_io_error(CPU_STATE (cpu),
-			 "misaligned %d byte read to 0x%lx failed",
-			 sizeof(unsigned_N), (unsigned long) addr);
+	    SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
+			     sizeof (unsigned_N), addr,
+			     write_transfer, sim_core_unaligned_signal);
 	  break;
 	}
       case FORCED_ALIGNMENT:
 	sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
       case MIXED_ALIGNMENT:
-	sim_io_error (CPU_STATE (cpu), "internal error - sim_core_write_unaligned_N - mixed alignment");
+	sim_engine_abort (CPU_STATE (cpu), cpu, cia,
+			  "internal error - %s - mixed alignment",
+			  XSTRING (sim_core_write_unaligned_N));
 	break;
       default:
-	sim_io_error (CPU_STATE (cpu), "internal error - sim_core_write_unaligned_N - bad switch");
+	sim_engine_abort (CPU_STATE (cpu), cpu, cia,
+			  "internal error - %s - bad switch",
+			  XSTRING (sim_core_write_unaligned_N));
 	break;
       }
 }
diff --git a/sim/common/sim-xcat.h b/sim/common/sim-xcat.h
index 4abf262..7c3dd16 100644
--- a/sim/common/sim-xcat.h
+++ b/sim/common/sim-xcat.h
@@ -28,14 +28,18 @@
 #define CONCAT2(a,b)	 a##b
 #define CONCAT3(a,b,c)	 a##b##c
 #define CONCAT4(a,b,c,d) a##b##c##d
+#define STRINGX(s) #s
 #else
 #define CONCAT2(a,b)	 a/**/b
 #define CONCAT3(a,b,c)	 a/**/b/**/c
 #define CONCAT4(a,b,c,d) a/**/b/**/c/**/d
+#define STRINGX(s) "?"
 #endif
 
 #define XCONCAT2(a,b)     CONCAT2(a,b)
 #define XCONCAT3(a,b,c)   CONCAT3(a,b,c)
 #define XCONCAT4(a,b,c,d) CONCAT4(a,b,c,d)
 
+#define XSTRING(s) STRINGX(s) 
+
 #endif _SIM_XCAT_H_
diff --git a/sim/igen/gen-semantics.c b/sim/igen/gen-semantics.c
index b249e38..a8f73a3 100644
--- a/sim/igen/gen-semantics.c
+++ b/sim/igen/gen-semantics.c
@@ -176,7 +176,7 @@ print_semantic_body(lf *file,
   /* Architecture expects r0 to be zero.  Instead of having to check
      every read to see if it is refering to r0 just zap the r0
      register */
-  if ((code & generate_with_zero_r0))
+  if ((code & generate_with_semantic_zero_r0))
     {
       lf_printf (file, "\n");
       lf_printf (file, "GPR(0) = 0;\n");