diff options
author | Keith Seitz <keiths@redhat.com> | 2002-07-22 21:47:28 +0000 |
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committer | Keith Seitz <keiths@redhat.com> | 2002-07-22 21:47:28 +0000 |
commit | 37a4a663b0b4204deab9b6921f8fa4d63901a2f9 (patch) | |
tree | 9916eeb56ea6aa6d9ae9543baa084da826716412 /sim | |
parent | c7475684f54aad506777fd9c5b04631fc65fc7e7 (diff) | |
download | gdb-37a4a663b0b4204deab9b6921f8fa4d63901a2f9.zip gdb-37a4a663b0b4204deab9b6921f8fa4d63901a2f9.tar.gz gdb-37a4a663b0b4204deab9b6921f8fa4d63901a2f9.tar.bz2 |
Merge w/trunk (kseitz_interps-20020722-merge).
Diffstat (limited to 'sim')
61 files changed, 26267 insertions, 36049 deletions
diff --git a/sim/ChangeLog b/sim/ChangeLog index a9f73ae..4d6c1ad 100644 --- a/sim/ChangeLog +++ b/sim/ChangeLog @@ -1,3 +1,17 @@ +2002-07-17 Andrew Cagney <ac131313@redhat.com> + + * w65/: Delete directory. + +2002-07-16 Andrew Cagney <ac131313@redhat.com> + + * configure.in (extra_subdirs): Mark fr30-*-* as obsolete. + * configure: Re-generate. + +2002-07-13 Andrew Cagney <ac131313@redhat.com> + + * configure.in (extra_subdirs): Mark d30v-*-* as obsolete. + * configure: Re-generate. + 2002-06-16 Andrew Cagney <ac131313@redhat.com> * Makefile.in (autoconf-changelog autoheader-changelog): Let name, diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 3a50e89..acd66ad 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,12 @@ +2002-07-05 Nick Clifton <nickc@cambridge.redhat.com> + + * armemu.c (ARMul_Emulate32): Add more tests for valid MIA, MIAPH + and MIAxy instructions. + +2002-06-21 Nick Clifton <nickc@cambridge.redhat.com> + + * armos.h (ADP_Stopped_RunTimeError): Set correct value. + 2002-06-16 Andrew Cagney <ac131313@redhat.com> * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index 8e71926..44943c4 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -3366,78 +3366,84 @@ check_PMUintr: switch (BITS (18, 19)) { case 0x0: - { - /* XScale MIA instruction. Signed multiplication of two 32 bit - values and addition to 40 bit accumulator. */ - long long Rm = state->Reg[MULLHSReg]; - long long Rs = state->Reg[MULACCReg]; - - if (Rm & (1 << 31)) - Rm -= 1ULL << 32; - if (Rs & (1 << 31)) - Rs -= 1ULL << 32; - state->Accumulator += Rm * Rs; - } - goto donext; + if (BITS (4, 11) == 1 && BITS (16, 17) == 0) + { + /* XScale MIA instruction. Signed multiplication of + two 32 bit values and addition to 40 bit accumulator. */ + long long Rm = state->Reg[MULLHSReg]; + long long Rs = state->Reg[MULACCReg]; + + if (Rm & (1 << 31)) + Rm -= 1ULL << 32; + if (Rs & (1 << 31)) + Rs -= 1ULL << 32; + state->Accumulator += Rm * Rs; + goto donext; + } + break; case 0x2: - { - /* XScale MIAPH instruction. */ - ARMword t1 = state->Reg[MULLHSReg] >> 16; - ARMword t2 = state->Reg[MULACCReg] >> 16; - ARMword t3 = state->Reg[MULLHSReg] & 0xffff; - ARMword t4 = state->Reg[MULACCReg] & 0xffff; - long long t5; - - if (t1 & (1 << 15)) - t1 -= 1 << 16; - if (t2 & (1 << 15)) - t2 -= 1 << 16; - if (t3 & (1 << 15)) - t3 -= 1 << 16; - if (t4 & (1 << 15)) - t4 -= 1 << 16; - t1 *= t2; - t5 = t1; - if (t5 & (1 << 31)) - t5 -= 1ULL << 32; - state->Accumulator += t5; - t3 *= t4; - t5 = t3; - if (t5 & (1 << 31)) - t5 -= 1ULL << 32; - state->Accumulator += t5; - } - goto donext; + if (BITS (4, 11) == 1 && BITS (16, 17) == 0) + { + /* XScale MIAPH instruction. */ + ARMword t1 = state->Reg[MULLHSReg] >> 16; + ARMword t2 = state->Reg[MULACCReg] >> 16; + ARMword t3 = state->Reg[MULLHSReg] & 0xffff; + ARMword t4 = state->Reg[MULACCReg] & 0xffff; + long long t5; + + if (t1 & (1 << 15)) + t1 -= 1 << 16; + if (t2 & (1 << 15)) + t2 -= 1 << 16; + if (t3 & (1 << 15)) + t3 -= 1 << 16; + if (t4 & (1 << 15)) + t4 -= 1 << 16; + t1 *= t2; + t5 = t1; + if (t5 & (1 << 31)) + t5 -= 1ULL << 32; + state->Accumulator += t5; + t3 *= t4; + t5 = t3; + if (t5 & (1 << 31)) + t5 -= 1ULL << 32; + state->Accumulator += t5; + goto donext; + } + break; case 0x3: - { - /* XScale MIAxy instruction. */ - ARMword t1; - ARMword t2; - long long t5; - - if (BIT (17)) - t1 = state->Reg[MULLHSReg] >> 16; - else - t1 = state->Reg[MULLHSReg] & 0xffff; - - if (BIT (16)) - t2 = state->Reg[MULACCReg] >> 16; - else - t2 = state->Reg[MULACCReg] & 0xffff; - - if (t1 & (1 << 15)) - t1 -= 1 << 16; - if (t2 & (1 << 15)) - t2 -= 1 << 16; - t1 *= t2; - t5 = t1; - if (t5 & (1 << 31)) - t5 -= 1ULL << 32; - state->Accumulator += t5; - } - goto donext; + if (BITS (4, 11) == 1) + { + /* XScale MIAxy instruction. */ + ARMword t1; + ARMword t2; + long long t5; + + if (BIT (17)) + t1 = state->Reg[MULLHSReg] >> 16; + else + t1 = state->Reg[MULLHSReg] & 0xffff; + + if (BIT (16)) + t2 = state->Reg[MULACCReg] >> 16; + else + t2 = state->Reg[MULACCReg] & 0xffff; + + if (t1 & (1 << 15)) + t1 -= 1 << 16; + if (t2 & (1 << 15)) + t2 -= 1 << 16; + t1 *= t2; + t5 = t1; + if (t5 & (1 << 31)) + t5 -= 1ULL << 32; + state->Accumulator += t5; + goto donext; + } + break; default: break; diff --git a/sim/arm/armos.h b/sim/arm/armos.h index d943735..b0a1da0 100644 --- a/sim/arm/armos.h +++ b/sim/arm/armos.h @@ -15,20 +15,16 @@ along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/***************************************************************************\ -* Define the initial layout of memory * -\***************************************************************************/ +/* Define the initial layout of memory. */ -#define ADDRSUPERSTACK 0x800L /* supervisor stack space */ -#define ADDRUSERSTACK 0x80000L /* default user stack start */ -#define ADDRSOFTVECTORS 0x840L /* soft vectors are here */ -#define ADDRCMDLINE 0xf00L /* command line is here after a SWI GetEnv */ -#define ADDRSOFHANDLERS 0xad0L /* address and workspace for installed handlers */ -#define SOFTVECTORCODE 0xb80L /* default handlers */ +#define ADDRSUPERSTACK 0x800L /* Supervisor stack space. */ +#define ADDRUSERSTACK 0x80000L/* Default user stack start. */ +#define ADDRSOFTVECTORS 0x840L /* Soft vectors are here. */ +#define ADDRCMDLINE 0xf00L /* Command line is here after a SWI GetEnv. */ +#define ADDRSOFHANDLERS 0xad0L /* Address and workspace for installed handlers. */ +#define SOFTVECTORCODE 0xb80L /* Default handlers. */ -/***************************************************************************\ -* SWI numbers * -\***************************************************************************/ +/* SWI numbers. */ #define SWI_WriteC 0x0 #define SWI_Write0 0x2 @@ -56,40 +52,41 @@ #define SWI_InstallHandler 0x70 #define SWI_GenerateError 0x71 -#define SWI_Breakpoint 0x180000 /* see gdb's tm-arm.h */ +#define SWI_Breakpoint 0x180000 /* See gdb's tm-arm.h */ #define AngelSWI_ARM 0x123456 #define AngelSWI_Thumb 0xAB -/* The reason codes: */ -#define AngelSWI_Reason_Open (0x01) -#define AngelSWI_Reason_Close (0x02) -#define AngelSWI_Reason_WriteC (0x03) -#define AngelSWI_Reason_Write0 (0x04) -#define AngelSWI_Reason_Write (0x05) -#define AngelSWI_Reason_Read (0x06) -#define AngelSWI_Reason_ReadC (0x07) -#define AngelSWI_Reason_IsTTY (0x09) -#define AngelSWI_Reason_Seek (0x0A) -#define AngelSWI_Reason_FLen (0x0C) -#define AngelSWI_Reason_TmpNam (0x0D) -#define AngelSWI_Reason_Remove (0x0E) -#define AngelSWI_Reason_Rename (0x0F) -#define AngelSWI_Reason_Clock (0x10) -#define AngelSWI_Reason_Time (0x11) -#define AngelSWI_Reason_System (0x12) -#define AngelSWI_Reason_Errno (0x13) -#define AngelSWI_Reason_GetCmdLine (0x15) -#define AngelSWI_Reason_HeapInfo (0x16) -#define AngelSWI_Reason_EnterSVC (0x17) -#define AngelSWI_Reason_ReportException (0x18) +/* The reason codes: */ +#define AngelSWI_Reason_Open 0x01 +#define AngelSWI_Reason_Close 0x02 +#define AngelSWI_Reason_WriteC 0x03 +#define AngelSWI_Reason_Write0 0x04 +#define AngelSWI_Reason_Write 0x05 +#define AngelSWI_Reason_Read 0x06 +#define AngelSWI_Reason_ReadC 0x07 +#define AngelSWI_Reason_IsTTY 0x09 +#define AngelSWI_Reason_Seek 0x0A +#define AngelSWI_Reason_FLen 0x0C +#define AngelSWI_Reason_TmpNam 0x0D +#define AngelSWI_Reason_Remove 0x0E +#define AngelSWI_Reason_Rename 0x0F +#define AngelSWI_Reason_Clock 0x10 +#define AngelSWI_Reason_Time 0x11 +#define AngelSWI_Reason_System 0x12 +#define AngelSWI_Reason_Errno 0x13 +#define AngelSWI_Reason_GetCmdLine 0x15 +#define AngelSWI_Reason_HeapInfo 0x16 +#define AngelSWI_Reason_EnterSVC 0x17 +#define AngelSWI_Reason_ReportException 0x18 #define ADP_Stopped_ApplicationExit ((2 << 16) + 38) -#define ADP_Stopped_RunTimeError ((2 << 16) + 34) +#define ADP_Stopped_RunTimeError ((2 << 16) + 35) -#define FPESTART 0x2000L -#define FPEEND 0x8000L -#define FPEOLDVECT FPESTART + 0x100L + 8L * 16L + 4L /* stack + 8 regs + fpsr */ -#define FPENEWVECT(addr) 0xea000000L + ((addr) >> 2) - 3L /* branch from 4 to 0x2400 */ +/* Floating Point Emulator address space. */ +#define FPESTART 0x2000L +#define FPEEND 0x8000L +#define FPEOLDVECT FPESTART + 0x100L + 8L * 16L + 4L /* Stack + 8 regs + fpsr. */ +#define FPENEWVECT(addr) 0xea000000L + ((addr) >> 2) - 3L /* Branch from 4 to 0x2400. */ extern unsigned long fpecode[]; extern unsigned long fpesize; diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index 84db793..8e7aabc 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,3 +1,26 @@ +2002-07-17 Andrew Cagney <cagney@redhat.com> + + * run-sim.h: Add #ifdef RUN_SIM_H wrapper. + (sim_set_callbacks, sim_size, sim_trace) + (sim_set_trace, sim_set_profile_size, sim_kill): Declare. Moved + to here from "gdb/remote-sim.h". + +2002-07-16 Andrew Cagney <ac131313@redhat.com> + + * sim-resume.c (sim_resume): Add local variable sig_to_deliver to + avoid possible longjmp problems with automatic variable siggnal. + +2002-07-14 Andrew Cagney <ac131313@redhat.com> + + From 2002-07-11 Momchil Velikov <velco@fadata.bg>: + * Make-common.in (installdirs): Make $(libdir) too, needed when + installing libsim.a. + +2002-07-13 Andrew Cagney <ac131313@redhat.com> + + * gennltvals.sh (dir): Mark d30v as obsolete. + * nltvals.def: Remove d30v. + 2002-06-17 Andrew Cagney <cagney@redhat.com> * hw-events.c (hw_event_queue_schedule): Initialize `dummy'. diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in index 6662efd..744295a 100644 --- a/sim/common/Make-common.in +++ b/sim/common/Make-common.in @@ -592,6 +592,7 @@ install-common: installdirs installdirs: $(SHELL) $(srcdir)/../../mkinstalldirs $(bindir) + $(SHELL) $(srcdir)/../../mkinstalldirs $(libdir) check: cd ../testsuite && $(MAKE) check RUNTESTFLAGS="$(RUNTESTFLAGS)" diff --git a/sim/common/gennltvals.sh b/sim/common/gennltvals.sh index 40ca5c7..fefd880 100644 --- a/sim/common/gennltvals.sh +++ b/sim/common/gennltvals.sh @@ -33,9 +33,9 @@ dir=newlib/libc/sys/d10v/sys target=d10v $shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \ "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}" -dir=libgloss target=d30v -$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \ - "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}" +# OBSOLETE dir=libgloss target=d30v +# OBSOLETE $shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \ +# OBSOLETE "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}" dir=libgloss target=fr30 $shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \ diff --git a/sim/common/nltvals.def b/sim/common/nltvals.def index b5e82fc..14093ae 100644 --- a/sim/common/nltvals.def +++ b/sim/common/nltvals.def @@ -214,30 +214,6 @@ /* end d10v sys target macros */ #endif #endif -#ifdef NL_TARGET_d30v -#ifdef sys_defs -/* from syscall.h */ -/* begin d30v sys target macros */ - { "SYS_argv", 13 }, - { "SYS_argvlen", 12 }, - { "SYS_chdir", 14 }, - { "SYS_chmod", 16 }, - { "SYS_close", 3 }, - { "SYS_exit", 1 }, - { "SYS_fstat", 10 }, - { "SYS_getpid", 8 }, - { "SYS_kill", 9 }, - { "SYS_lseek", 6 }, - { "SYS_open", 2 }, - { "SYS_read", 4 }, - { "SYS_stat", 15 }, - { "SYS_time", 18 }, - { "SYS_unlink", 7 }, - { "SYS_utime", 17 }, - { "SYS_write", 5 }, -/* end d30v sys target macros */ -#endif -#endif #ifdef NL_TARGET_fr30 #ifdef sys_defs /* from syscall.h */ diff --git a/sim/common/run-sim.h b/sim/common/run-sim.h index 7792373..3424fa5 100644 --- a/sim/common/run-sim.h +++ b/sim/common/run-sim.h @@ -20,6 +20,9 @@ along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#ifndef RUN_SIM_H +#define RUN_SIM_H + #ifdef SIM_TARGET_SWITCHES /* Parse the command line, extracting any target specific switches before the generic simulator code gets a chance to complain @@ -29,4 +32,63 @@ int sim_target_parse_command_line PARAMS ((int, char **)); /* Display a list of target specific switches supported by this target. */ void sim_target_display_usage PARAMS ((void)); + +#endif + +/* Provide simulator with a default (global) host_callback_struct. + THIS PROCEDURE IS DEPRECATED. + GDB and NRUN do not use this interface. + This procedure does not take a SIM_DESC argument as it is + used before sim_open. */ + +void sim_set_callbacks PARAMS ((struct host_callback_struct *)); + + +/* Set the size of the simulator memory array. + THIS PROCEDURE IS DEPRECATED. + GDB and NRUN do not use this interface. + This procedure does not take a SIM_DESC argument as it is + used before sim_open. */ + +void sim_size PARAMS ((int i)); + + +/* Single-step simulator with tracing enabled. + THIS PROCEDURE IS DEPRECATED. + THIS PROCEDURE IS EVEN MORE DEPRECATED THAN SIM_SET_TRACE + GDB and NRUN do not use this interface. + This procedure returns: ``0'' indicating that the simulator should + be continued using sim_trace() calls; ``1'' indicating that the + simulation has finished. */ + +int sim_trace PARAMS ((SIM_DESC sd)); + + +/* Enable tracing. + THIS PROCEDURE IS DEPRECATED. + GDB and NRUN do not use this interface. + This procedure returns: ``0'' indicating that the simulator should + be continued using sim_trace() calls; ``1'' indicating that the + simulation has finished. */ + +void sim_set_trace PARAMS ((void)); + + +/* Configure the size of the profile buffer. + THIS PROCEDURE IS DEPRECATED. + GDB and NRUN do not use this interface. + This procedure does not take a SIM_DESC argument as it is + used before sim_open. */ + +void sim_set_profile_size PARAMS ((int n)); + + +/* Kill the running program. + THIS PROCEDURE IS DEPRECATED. + GDB and NRUN do not use this interface. + This procedure will be replaced as part of the introduction of + multi-cpu simulators. */ + +void sim_kill PARAMS ((SIM_DESC sd)); + #endif diff --git a/sim/common/sim-resume.c b/sim/common/sim-resume.c index 8cf75d5..d7d61e7 100644 --- a/sim/common/sim-resume.c +++ b/sim/common/sim-resume.c @@ -65,24 +65,29 @@ sim_resume (SIM_DESC sd, int last_cpu_nr = sim_engine_last_cpu_nr (sd); int next_cpu_nr = sim_engine_next_cpu_nr (sd); int nr_cpus = sim_engine_nr_cpus (sd); + int sig_to_deliver; sim_events_preprocess (sd, last_cpu_nr >= nr_cpus, next_cpu_nr >= nr_cpus); if (next_cpu_nr >= nr_cpus) next_cpu_nr = 0; - /* Only deliver the siggnal ]sic] the first time through - don't - re-deliver any siggnal during a restart. */ - if (jmpval == sim_engine_restart_jmpval) - siggnal = 0; + /* Only deliver the SIGGNAL [sic] the first time through - don't + re-deliver any SIGGNAL during a restart. NOTE: A new local + variable is used to avoid problems with the automatic + variable ``siggnal'' being trashed by a long jump. */ + if (jmpval == sim_engine_start_jmpval) + sig_to_deliver = siggnal; + else + sig_to_deliver = 0; #ifdef SIM_CPU_EXCEPTION_RESUME { sim_cpu* cpu = STATE_CPU (sd, next_cpu_nr); - SIM_CPU_EXCEPTION_RESUME(sd, cpu, siggnal); + SIM_CPU_EXCEPTION_RESUME(sd, cpu, sig_to_deliver); } #endif - sim_engine_run (sd, next_cpu_nr, nr_cpus, siggnal); + sim_engine_run (sd, next_cpu_nr, nr_cpus, sig_to_deliver); } engine->jmpbuf = NULL; diff --git a/sim/configure b/sim/configure index b8029dd..a50ac9a 100755 --- a/sim/configure +++ b/sim/configure @@ -1420,12 +1420,12 @@ case "${target}" in extra_subdirs="${extra_subdirs} testsuite" ;; d10v-*-*) sim_target=d10v ;; - d30v-*-*) - sim_target=d30v - only_if_gcc=yes - extra_subdirs="${extra_subdirs} igen" - ;; - fr30-*-*) sim_target=fr30 ;; +# OBSOLETE d30v-*-*) +# OBSOLETE sim_target=d30v +# OBSOLETE only_if_gcc=yes +# OBSOLETE extra_subdirs="${extra_subdirs} igen" +# OBSOLETE ;; +# OBSOLETE fr30-*-*) sim_target=fr30 ;; h8300*-*-*) sim_target=h8300 ;; h8500-*-*) sim_target=h8500 ;; i960-*-*) sim_target=i960 ;; diff --git a/sim/configure.in b/sim/configure.in index e48ae36..ce074b3 100644 --- a/sim/configure.in +++ b/sim/configure.in @@ -59,12 +59,12 @@ case "${target}" in extra_subdirs="${extra_subdirs} testsuite" ;; d10v-*-*) sim_target=d10v ;; - d30v-*-*) - sim_target=d30v - only_if_gcc=yes - extra_subdirs="${extra_subdirs} igen" - ;; - fr30-*-*) sim_target=fr30 ;; +# OBSOLETE d30v-*-*) +# OBSOLETE sim_target=d30v +# OBSOLETE only_if_gcc=yes +# OBSOLETE extra_subdirs="${extra_subdirs} igen" +# OBSOLETE ;; +# OBSOLETE fr30-*-*) sim_target=fr30 ;; h8300*-*-*) sim_target=h8300 ;; h8500-*-*) sim_target=h8500 ;; i960-*-*) sim_target=i960 ;; diff --git a/sim/d30v/ChangeLog b/sim/d30v/ChangeLog index 2c3e1c4..d1c1df5 100644 --- a/sim/d30v/ChangeLog +++ b/sim/d30v/ChangeLog @@ -1,3 +1,9 @@ +2002-07-13 Andrew Cagney <ac131313@redhat.com> + + * cpu.h: Mark file obsolete. + * sim-main.h, sim-calls.c, engine.c, cpu.c, alu.h: Ditto. + * dc-short, ic-d30v, d30v-insns, Makefile.in: Ditto. + 2002-06-16 Andrew Cagney <ac131313@redhat.com> * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/d30v/Makefile.in b/sim/d30v/Makefile.in index d563be8..76afe20 100644 --- a/sim/d30v/Makefile.in +++ b/sim/d30v/Makefile.in @@ -1,217 +1,217 @@ -# Mitsubishi Electric Corp. D30V Simulator. -# Copyright (C) 1997, Free Software Foundation, Inc. -# Contributed by Cygnus Support. -# -# This file is part of GDB, the GNU debugger. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -M4= @M4@ - - -## COMMON_PRE_CONFIG_FRAG - -# These variables are given default values in COMMON_PRE_CONFIG_FRAG. -# We override the ones we need to here. -# Not all of these need to be mentioned, only the necessary ones. - -# List of object files, less common parts. -SIM_OBJS = \ - $(SIM_NEW_COMMON_OBJS) \ - engine.o cpu.o \ - s_support.o l_support.o \ - s_idecode.o l_idecode.o \ - s_semantics.o l_semantics.o \ - sim-calls.o itable.o \ - sim-hload.o \ - sim-hrw.o \ - sim-engine.o \ - sim-stop.o \ - sim-reason.o \ - sim-resume.o - -# List of extra dependencies. -# Generally this consists of simulator specific files included by sim-main.h. -SIM_EXTRA_DEPS = itable.h s_idecode.h l_idecode.h cpu.h alu.h - -# List of generators -SIM_GEN=tmp-igen - -# List of extra flags to always pass to $(CC). -SIM_EXTRA_CFLAGS = @sim_trapdump@ - -# List of main object files for `run'. -SIM_RUN_OBJS = nrun.o - -# Dependency of `clean' to clean any extra files. -SIM_EXTRA_CLEAN = clean-igen - -# This selects the d30v newlib/libgloss syscall definitions. -NL_TARGET=-DNL_TARGET_d30v - -## COMMON_POST_CONFIG_FRAG - -MAIN_INCLUDE_DEPS = tconfig.h -INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) - -# Rules need to build $(SIM_OBJS), plus whatever else the target wants. - -# ... target specific rules ... - -# Filter to eliminate known warnings -FILTER = 2>&1 | egrep -v "Discarding instruction|instruction field of type \`compute\' changed to \`cache\'|Instruction format is not 64 bits wide" - -BUILT_SRC_FROM_IGEN = \ - s_icache.h \ - s_icache.c \ - s_idecode.h \ - s_idecode.c \ - s_semantics.h \ - s_semantics.c \ - s_model.h \ - s_model.c \ - s_support.h \ - s_support.c \ - l_icache.h \ - l_icache.c \ - l_idecode.h \ - l_idecode.c \ - l_semantics.h \ - l_semantics.c \ - l_model.h \ - l_model.c \ - l_support.h \ - l_support.c \ - itable.h itable.c -$(BUILT_SRC_FROM_IGEN): tmp-igen -# - -.PHONY: clean-igen -clean-igen: - rm -f $(BUILT_SRC_FROM_IGEN) - rm -f tmp-igen tmp-insns - -../igen/igen: - cd ../igen && $(MAKE) - -tmp-igen: $(srcdir)/dc-short $(srcdir)/d30v-insns $(srcdir)/ic-d30v ../igen/igen - cd ../igen && $(MAKE) - echo "# 1 \"$(srcdir)/d30v-insns\"" > tmp-insns - $(M4) < $(srcdir)/d30v-insns >> tmp-insns - @echo "Generating short version ..." - ../igen/igen \ - -G gen-zero-r0 \ - -G direct-access \ - -G default-nia-minus-one \ - -G conditional-issue \ - -G verify-slot \ - -G field-widths \ - -F short,emul \ - -B 32 \ - -P "s_" \ - -o $(srcdir)/dc-short \ - -k $(srcdir)/ic-d30v \ - -n $(srcdir)/d30v-insns -i tmp-insns \ - -n s_icache.h -hc tmp-icache.h \ - -n s_icache.c -c tmp-icache.c \ - -n s_semantics.h -hs tmp-semantics.h \ - -n s_semantics.c -s tmp-semantics.c \ - -n s_idecode.h -hd tmp-idecode.h \ - -n s_idecode.c -d tmp-idecode.c \ - -n s_model.h -hm tmp-model.h \ - -n s_model.c -m tmp-model.c \ - -n s_support.h -hf tmp-support.h \ - -n s_support.c -f tmp-support.c $(FILTER) - $(srcdir)/../../move-if-change tmp-icache.h s_icache.h - $(srcdir)/../../move-if-change tmp-icache.c s_icache.c - $(srcdir)/../../move-if-change tmp-idecode.h s_idecode.h - $(srcdir)/../../move-if-change tmp-idecode.c s_idecode.c - $(srcdir)/../../move-if-change tmp-semantics.h s_semantics.h - $(srcdir)/../../move-if-change tmp-semantics.c s_semantics.c - $(srcdir)/../../move-if-change tmp-model.h s_model.h - $(srcdir)/../../move-if-change tmp-model.c s_model.c - $(srcdir)/../../move-if-change tmp-support.h s_support.h - $(srcdir)/../../move-if-change tmp-support.c s_support.c - @echo "Generating long version ..." - ../igen/igen \ - -G gen-zero-r0 \ - -G direct-access \ - -G default-nia-minus-one \ - -G conditional-issue \ - -G field-widths \ - -F long,emul \ - -B 64 \ - -P "l_" \ - -o $(srcdir)/dc-short \ - -k $(srcdir)/ic-d30v \ - -i tmp-insns \ - -n l_icache.h -hc tmp-icache.h \ - -n l_icache.c -c tmp-icache.c \ - -n l_semantics.h -hs tmp-semantics.h \ - -n l_semantics.c -s tmp-semantics.c \ - -n l_idecode.h -hd tmp-idecode.h \ - -n l_idecode.c -d tmp-idecode.c \ - -n l_model.h -hm tmp-model.h \ - -n l_model.c -m tmp-model.c \ - -n l_support.h -hf tmp-support.h \ - -n l_support.c -f tmp-support.c $(FILTER) - $(srcdir)/../../move-if-change tmp-icache.h l_icache.h - $(srcdir)/../../move-if-change tmp-icache.c l_icache.c - $(srcdir)/../../move-if-change tmp-idecode.h l_idecode.h - $(srcdir)/../../move-if-change tmp-idecode.c l_idecode.c - $(srcdir)/../../move-if-change tmp-semantics.h l_semantics.h - $(srcdir)/../../move-if-change tmp-semantics.c l_semantics.c - $(srcdir)/../../move-if-change tmp-model.h l_model.h - $(srcdir)/../../move-if-change tmp-model.c l_model.c - $(srcdir)/../../move-if-change tmp-support.h l_support.h - $(srcdir)/../../move-if-change tmp-support.c l_support.c - @echo "Generating instruction database ..." - ../igen/igen \ - -G field-widths \ - -F short,long,emul \ - -B 64 \ - -o $(srcdir)/dc-short \ - -k $(srcdir)/ic-d30v \ - -i tmp-insns \ - -n itable.h -ht tmp-itable.h \ - -n itable.c -t tmp-itable.c $(FILTER) - $(srcdir)/../../move-if-change tmp-itable.h itable.h - $(srcdir)/../../move-if-change tmp-itable.c itable.c - touch tmp-igen - -ENGINE_H = \ - sim-main.h \ - $(srcdir)/../common/sim-basics.h \ - config.h \ - $(srcdir)/../common/sim-config.h \ - $(srcdir)/../common/sim-inline.h \ - $(srcdir)/../common/sim-types.h \ - $(srcdir)/../common/sim-bits.h \ - $(srcdir)/../common/sim-endian.h \ - itable.h \ - l_idecode.h s_idecode.h \ - cpu.h \ - alu.h \ - $(srcdir)/../common/sim-alu.h \ - $(srcdir)/../common/sim-core.h \ - $(srcdir)/../common/sim-events.h \ - -engine.o: engine.c $(ENGINE_H) -sim-calls.o: sim-calls.c $(ENGINE_H) $(srcdir)/../common/sim-utils.h $(srcdir)/../common/sim-options.h -cpu.o: cpu.c $(ENGINE_H) -s_support.o: s_support.c $(ENGINE_H) -l_support.o: l_support.c $(ENGINE_H) -s_semantics.o: s_semantics.c $(ENGINE_H) -l_semantics.o: l_semantics.c $(ENGINE_H) +# OBSOLETE # Mitsubishi Electric Corp. D30V Simulator. +# OBSOLETE # Copyright (C) 1997, Free Software Foundation, Inc. +# OBSOLETE # Contributed by Cygnus Support. +# OBSOLETE # +# OBSOLETE # This file is part of GDB, the GNU debugger. +# OBSOLETE # +# OBSOLETE # This program is free software; you can redistribute it and/or modify +# OBSOLETE # it under the terms of the GNU General Public License as published by +# OBSOLETE # the Free Software Foundation; either version 2, or (at your option) +# OBSOLETE # any later version. +# OBSOLETE # +# OBSOLETE # This program is distributed in the hope that it will be useful, +# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of +# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# OBSOLETE # GNU General Public License for more details. +# OBSOLETE # +# OBSOLETE # You should have received a copy of the GNU General Public License along +# OBSOLETE # with this program; if not, write to the Free Software Foundation, Inc., +# OBSOLETE # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +# OBSOLETE +# OBSOLETE M4= @M4@ +# OBSOLETE +# OBSOLETE +# OBSOLETE ## COMMON_PRE_CONFIG_FRAG +# OBSOLETE +# OBSOLETE # These variables are given default values in COMMON_PRE_CONFIG_FRAG. +# OBSOLETE # We override the ones we need to here. +# OBSOLETE # Not all of these need to be mentioned, only the necessary ones. +# OBSOLETE +# OBSOLETE # List of object files, less common parts. +# OBSOLETE SIM_OBJS = \ +# OBSOLETE $(SIM_NEW_COMMON_OBJS) \ +# OBSOLETE engine.o cpu.o \ +# OBSOLETE s_support.o l_support.o \ +# OBSOLETE s_idecode.o l_idecode.o \ +# OBSOLETE s_semantics.o l_semantics.o \ +# OBSOLETE sim-calls.o itable.o \ +# OBSOLETE sim-hload.o \ +# OBSOLETE sim-hrw.o \ +# OBSOLETE sim-engine.o \ +# OBSOLETE sim-stop.o \ +# OBSOLETE sim-reason.o \ +# OBSOLETE sim-resume.o +# OBSOLETE +# OBSOLETE # List of extra dependencies. +# OBSOLETE # Generally this consists of simulator specific files included by sim-main.h. +# OBSOLETE SIM_EXTRA_DEPS = itable.h s_idecode.h l_idecode.h cpu.h alu.h +# OBSOLETE +# OBSOLETE # List of generators +# OBSOLETE SIM_GEN=tmp-igen +# OBSOLETE +# OBSOLETE # List of extra flags to always pass to $(CC). +# OBSOLETE SIM_EXTRA_CFLAGS = @sim_trapdump@ +# OBSOLETE +# OBSOLETE # List of main object files for `run'. +# OBSOLETE SIM_RUN_OBJS = nrun.o +# OBSOLETE +# OBSOLETE # Dependency of `clean' to clean any extra files. +# OBSOLETE SIM_EXTRA_CLEAN = clean-igen +# OBSOLETE +# OBSOLETE # This selects the d30v newlib/libgloss syscall definitions. +# OBSOLETE NL_TARGET=-DNL_TARGET_d30v +# OBSOLETE +# OBSOLETE ## COMMON_POST_CONFIG_FRAG +# OBSOLETE +# OBSOLETE MAIN_INCLUDE_DEPS = tconfig.h +# OBSOLETE INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) +# OBSOLETE +# OBSOLETE # Rules need to build $(SIM_OBJS), plus whatever else the target wants. +# OBSOLETE +# OBSOLETE # ... target specific rules ... +# OBSOLETE +# OBSOLETE # Filter to eliminate known warnings +# OBSOLETE FILTER = 2>&1 | egrep -v "Discarding instruction|instruction field of type \`compute\' changed to \`cache\'|Instruction format is not 64 bits wide" +# OBSOLETE +# OBSOLETE BUILT_SRC_FROM_IGEN = \ +# OBSOLETE s_icache.h \ +# OBSOLETE s_icache.c \ +# OBSOLETE s_idecode.h \ +# OBSOLETE s_idecode.c \ +# OBSOLETE s_semantics.h \ +# OBSOLETE s_semantics.c \ +# OBSOLETE s_model.h \ +# OBSOLETE s_model.c \ +# OBSOLETE s_support.h \ +# OBSOLETE s_support.c \ +# OBSOLETE l_icache.h \ +# OBSOLETE l_icache.c \ +# OBSOLETE l_idecode.h \ +# OBSOLETE l_idecode.c \ +# OBSOLETE l_semantics.h \ +# OBSOLETE l_semantics.c \ +# OBSOLETE l_model.h \ +# OBSOLETE l_model.c \ +# OBSOLETE l_support.h \ +# OBSOLETE l_support.c \ +# OBSOLETE itable.h itable.c +# OBSOLETE $(BUILT_SRC_FROM_IGEN): tmp-igen +# OBSOLETE # +# OBSOLETE +# OBSOLETE .PHONY: clean-igen +# OBSOLETE clean-igen: +# OBSOLETE rm -f $(BUILT_SRC_FROM_IGEN) +# OBSOLETE rm -f tmp-igen tmp-insns +# OBSOLETE +# OBSOLETE ../igen/igen: +# OBSOLETE cd ../igen && $(MAKE) +# OBSOLETE +# OBSOLETE tmp-igen: $(srcdir)/dc-short $(srcdir)/d30v-insns $(srcdir)/ic-d30v ../igen/igen +# OBSOLETE cd ../igen && $(MAKE) +# OBSOLETE echo "# 1 \"$(srcdir)/d30v-insns\"" > tmp-insns +# OBSOLETE $(M4) < $(srcdir)/d30v-insns >> tmp-insns +# OBSOLETE @echo "Generating short version ..." +# OBSOLETE ../igen/igen \ +# OBSOLETE -G gen-zero-r0 \ +# OBSOLETE -G direct-access \ +# OBSOLETE -G default-nia-minus-one \ +# OBSOLETE -G conditional-issue \ +# OBSOLETE -G verify-slot \ +# OBSOLETE -G field-widths \ +# OBSOLETE -F short,emul \ +# OBSOLETE -B 32 \ +# OBSOLETE -P "s_" \ +# OBSOLETE -o $(srcdir)/dc-short \ +# OBSOLETE -k $(srcdir)/ic-d30v \ +# OBSOLETE -n $(srcdir)/d30v-insns -i tmp-insns \ +# OBSOLETE -n s_icache.h -hc tmp-icache.h \ +# OBSOLETE -n s_icache.c -c tmp-icache.c \ +# OBSOLETE -n s_semantics.h -hs tmp-semantics.h \ +# OBSOLETE -n s_semantics.c -s tmp-semantics.c \ +# OBSOLETE -n s_idecode.h -hd tmp-idecode.h \ +# OBSOLETE -n s_idecode.c -d tmp-idecode.c \ +# OBSOLETE -n s_model.h -hm tmp-model.h \ +# OBSOLETE -n s_model.c -m tmp-model.c \ +# OBSOLETE -n s_support.h -hf tmp-support.h \ +# OBSOLETE -n s_support.c -f tmp-support.c $(FILTER) +# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.h s_icache.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.c s_icache.c +# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.h s_idecode.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.c s_idecode.c +# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.h s_semantics.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.c s_semantics.c +# OBSOLETE $(srcdir)/../../move-if-change tmp-model.h s_model.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-model.c s_model.c +# OBSOLETE $(srcdir)/../../move-if-change tmp-support.h s_support.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-support.c s_support.c +# OBSOLETE @echo "Generating long version ..." +# OBSOLETE ../igen/igen \ +# OBSOLETE -G gen-zero-r0 \ +# OBSOLETE -G direct-access \ +# OBSOLETE -G default-nia-minus-one \ +# OBSOLETE -G conditional-issue \ +# OBSOLETE -G field-widths \ +# OBSOLETE -F long,emul \ +# OBSOLETE -B 64 \ +# OBSOLETE -P "l_" \ +# OBSOLETE -o $(srcdir)/dc-short \ +# OBSOLETE -k $(srcdir)/ic-d30v \ +# OBSOLETE -i tmp-insns \ +# OBSOLETE -n l_icache.h -hc tmp-icache.h \ +# OBSOLETE -n l_icache.c -c tmp-icache.c \ +# OBSOLETE -n l_semantics.h -hs tmp-semantics.h \ +# OBSOLETE -n l_semantics.c -s tmp-semantics.c \ +# OBSOLETE -n l_idecode.h -hd tmp-idecode.h \ +# OBSOLETE -n l_idecode.c -d tmp-idecode.c \ +# OBSOLETE -n l_model.h -hm tmp-model.h \ +# OBSOLETE -n l_model.c -m tmp-model.c \ +# OBSOLETE -n l_support.h -hf tmp-support.h \ +# OBSOLETE -n l_support.c -f tmp-support.c $(FILTER) +# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.h l_icache.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.c l_icache.c +# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.h l_idecode.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.c l_idecode.c +# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.h l_semantics.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.c l_semantics.c +# OBSOLETE $(srcdir)/../../move-if-change tmp-model.h l_model.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-model.c l_model.c +# OBSOLETE $(srcdir)/../../move-if-change tmp-support.h l_support.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-support.c l_support.c +# OBSOLETE @echo "Generating instruction database ..." +# OBSOLETE ../igen/igen \ +# OBSOLETE -G field-widths \ +# OBSOLETE -F short,long,emul \ +# OBSOLETE -B 64 \ +# OBSOLETE -o $(srcdir)/dc-short \ +# OBSOLETE -k $(srcdir)/ic-d30v \ +# OBSOLETE -i tmp-insns \ +# OBSOLETE -n itable.h -ht tmp-itable.h \ +# OBSOLETE -n itable.c -t tmp-itable.c $(FILTER) +# OBSOLETE $(srcdir)/../../move-if-change tmp-itable.h itable.h +# OBSOLETE $(srcdir)/../../move-if-change tmp-itable.c itable.c +# OBSOLETE touch tmp-igen +# OBSOLETE +# OBSOLETE ENGINE_H = \ +# OBSOLETE sim-main.h \ +# OBSOLETE $(srcdir)/../common/sim-basics.h \ +# OBSOLETE config.h \ +# OBSOLETE $(srcdir)/../common/sim-config.h \ +# OBSOLETE $(srcdir)/../common/sim-inline.h \ +# OBSOLETE $(srcdir)/../common/sim-types.h \ +# OBSOLETE $(srcdir)/../common/sim-bits.h \ +# OBSOLETE $(srcdir)/../common/sim-endian.h \ +# OBSOLETE itable.h \ +# OBSOLETE l_idecode.h s_idecode.h \ +# OBSOLETE cpu.h \ +# OBSOLETE alu.h \ +# OBSOLETE $(srcdir)/../common/sim-alu.h \ +# OBSOLETE $(srcdir)/../common/sim-core.h \ +# OBSOLETE $(srcdir)/../common/sim-events.h \ +# OBSOLETE +# OBSOLETE engine.o: engine.c $(ENGINE_H) +# OBSOLETE sim-calls.o: sim-calls.c $(ENGINE_H) $(srcdir)/../common/sim-utils.h $(srcdir)/../common/sim-options.h +# OBSOLETE cpu.o: cpu.c $(ENGINE_H) +# OBSOLETE s_support.o: s_support.c $(ENGINE_H) +# OBSOLETE l_support.o: l_support.c $(ENGINE_H) +# OBSOLETE s_semantics.o: s_semantics.c $(ENGINE_H) +# OBSOLETE l_semantics.o: l_semantics.c $(ENGINE_H) diff --git a/sim/d30v/alu.h b/sim/d30v/alu.h index d39ee3f..5605ce2 100644 --- a/sim/d30v/alu.h +++ b/sim/d30v/alu.h @@ -1,106 +1,106 @@ -/* Mitsubishi Electric Corp. D30V Simulator. - Copyright (C) 1997, Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - - -#ifndef _D30V_ALU_H_ -#define _D30V_ALU_H_ - -#define ALU_CARRY (PSW_VAL(PSW_C) != 0) - -#include "sim-alu.h" - -#define ALU16_END(TARG, HIGH) \ -{ \ - unsigned32 mask, value; \ - if (ALU16_HAD_OVERFLOW) { \ - mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C); \ - value = BIT32 (PSW_V) | BIT32 (PSW_VA); \ - } \ - else { \ - mask = BIT32 (PSW_V) | BIT32 (PSW_C); \ - value = 0; \ - } \ - if (ALU16_HAD_CARRY_BORROW) \ - value |= BIT32 (PSW_C); \ - if (HIGH) \ - WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT<<16, 0xffff0000); \ - else \ - WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT, 0x0000ffff); \ - WRITE32_QUEUE_MASK (&PSW, value, mask); \ -} - -#define ALU32_END(TARG) \ -{ \ - unsigned32 mask, value; \ - if (ALU32_HAD_OVERFLOW) { \ - mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C); \ - value = BIT32 (PSW_V) | BIT32 (PSW_VA); \ - } \ - else { \ - mask = BIT32 (PSW_V) | BIT32 (PSW_C); \ - value = 0; \ - } \ - if (ALU32_HAD_CARRY_BORROW) \ - value |= BIT32 (PSW_C); \ - WRITE32_QUEUE (TARG, ALU32_OVERFLOW_RESULT); \ - WRITE32_QUEUE_MASK (&PSW, value, mask); \ -} - -#define ALU_END(TARG) ALU32_END(TARG) - - -/* PSW & Flag manipulation */ - -#define PSW_SET(BIT,VAL) BLIT32(PSW, (BIT), (VAL)) -#define PSW_VAL(BIT) EXTRACTED32(PSW, (BIT), (BIT)) - -#define PSW_F(FLAG) (17 + ((FLAG) % 8) * 2) -#define PSW_FLAG_SET(FLAG,VAL) PSW_SET(PSW_F(FLAG), VAL) -#define PSW_FLAG_VAL(FLAG) PSW_VAL(PSW_F(FLAG)) - -#define PSW_SET_QUEUE(BIT,VAL) \ -do { \ - unsigned32 mask = BIT32 (BIT); \ - unsigned32 bitval = (VAL) ? mask : 0; \ - WRITE32_QUEUE_MASK (&PSW, bitval, mask); \ -} while (0) - -#define PSW_FLAG_SET_QUEUE(FLAG,VAL) \ -do { \ - unsigned32 mask = BIT32 (PSW_F (FLAG)); \ - unsigned32 bitval = (VAL) ? mask : 0; \ - WRITE32_QUEUE_MASK (&PSW, bitval, mask); \ -} while (0) - -/* Bring data in from the cold */ - -#define IMEM(EA) \ -(sim_core_read_8(STATE_CPU (sd, 0), cia, exec_map, (EA))) - -#define MEM(SIGN, EA, NR_BYTES) \ -((SIGN##_##NR_BYTES) sim_core_read_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, read_map, (EA))) - -#define STORE(EA, NR_BYTES, VAL) \ -do { \ - sim_core_write_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, write_map, (EA), (VAL)); \ -} while (0) - - -#endif +/* OBSOLETE /* Mitsubishi Electric Corp. D30V Simulator. */ +/* OBSOLETE Copyright (C) 1997, Free Software Foundation, Inc. */ +/* OBSOLETE Contributed by Cygnus Support. */ +/* OBSOLETE */ +/* OBSOLETE This file is part of GDB, the GNU debugger. */ +/* OBSOLETE */ +/* OBSOLETE This program is free software; you can redistribute it and/or modify */ +/* OBSOLETE it under the terms of the GNU General Public License as published by */ +/* OBSOLETE the Free Software Foundation; either version 2, or (at your option) */ +/* OBSOLETE any later version. */ +/* OBSOLETE */ +/* OBSOLETE This program is distributed in the hope that it will be useful, */ +/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ +/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ +/* OBSOLETE GNU General Public License for more details. */ +/* OBSOLETE */ +/* OBSOLETE You should have received a copy of the GNU General Public License along */ +/* OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., */ +/* OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #ifndef _D30V_ALU_H_ */ +/* OBSOLETE #define _D30V_ALU_H_ */ +/* OBSOLETE */ +/* OBSOLETE #define ALU_CARRY (PSW_VAL(PSW_C) != 0) */ +/* OBSOLETE */ +/* OBSOLETE #include "sim-alu.h" */ +/* OBSOLETE */ +/* OBSOLETE #define ALU16_END(TARG, HIGH) \ */ +/* OBSOLETE { \ */ +/* OBSOLETE unsigned32 mask, value; \ */ +/* OBSOLETE if (ALU16_HAD_OVERFLOW) { \ */ +/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C); \ */ +/* OBSOLETE value = BIT32 (PSW_V) | BIT32 (PSW_VA); \ */ +/* OBSOLETE } \ */ +/* OBSOLETE else { \ */ +/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_C); \ */ +/* OBSOLETE value = 0; \ */ +/* OBSOLETE } \ */ +/* OBSOLETE if (ALU16_HAD_CARRY_BORROW) \ */ +/* OBSOLETE value |= BIT32 (PSW_C); \ */ +/* OBSOLETE if (HIGH) \ */ +/* OBSOLETE WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT<<16, 0xffff0000); \ */ +/* OBSOLETE else \ */ +/* OBSOLETE WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT, 0x0000ffff); \ */ +/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, value, mask); \ */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE #define ALU32_END(TARG) \ */ +/* OBSOLETE { \ */ +/* OBSOLETE unsigned32 mask, value; \ */ +/* OBSOLETE if (ALU32_HAD_OVERFLOW) { \ */ +/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C); \ */ +/* OBSOLETE value = BIT32 (PSW_V) | BIT32 (PSW_VA); \ */ +/* OBSOLETE } \ */ +/* OBSOLETE else { \ */ +/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_C); \ */ +/* OBSOLETE value = 0; \ */ +/* OBSOLETE } \ */ +/* OBSOLETE if (ALU32_HAD_CARRY_BORROW) \ */ +/* OBSOLETE value |= BIT32 (PSW_C); \ */ +/* OBSOLETE WRITE32_QUEUE (TARG, ALU32_OVERFLOW_RESULT); \ */ +/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, value, mask); \ */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE #define ALU_END(TARG) ALU32_END(TARG) */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE /* PSW & Flag manipulation */ */ +/* OBSOLETE */ +/* OBSOLETE #define PSW_SET(BIT,VAL) BLIT32(PSW, (BIT), (VAL)) */ +/* OBSOLETE #define PSW_VAL(BIT) EXTRACTED32(PSW, (BIT), (BIT)) */ +/* OBSOLETE */ +/* OBSOLETE #define PSW_F(FLAG) (17 + ((FLAG) % 8) * 2) */ +/* OBSOLETE #define PSW_FLAG_SET(FLAG,VAL) PSW_SET(PSW_F(FLAG), VAL) */ +/* OBSOLETE #define PSW_FLAG_VAL(FLAG) PSW_VAL(PSW_F(FLAG)) */ +/* OBSOLETE */ +/* OBSOLETE #define PSW_SET_QUEUE(BIT,VAL) \ */ +/* OBSOLETE do { \ */ +/* OBSOLETE unsigned32 mask = BIT32 (BIT); \ */ +/* OBSOLETE unsigned32 bitval = (VAL) ? mask : 0; \ */ +/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, bitval, mask); \ */ +/* OBSOLETE } while (0) */ +/* OBSOLETE */ +/* OBSOLETE #define PSW_FLAG_SET_QUEUE(FLAG,VAL) \ */ +/* OBSOLETE do { \ */ +/* OBSOLETE unsigned32 mask = BIT32 (PSW_F (FLAG)); \ */ +/* OBSOLETE unsigned32 bitval = (VAL) ? mask : 0; \ */ +/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, bitval, mask); \ */ +/* OBSOLETE } while (0) */ +/* OBSOLETE */ +/* OBSOLETE /* Bring data in from the cold */ */ +/* OBSOLETE */ +/* OBSOLETE #define IMEM(EA) \ */ +/* OBSOLETE (sim_core_read_8(STATE_CPU (sd, 0), cia, exec_map, (EA))) */ +/* OBSOLETE */ +/* OBSOLETE #define MEM(SIGN, EA, NR_BYTES) \ */ +/* OBSOLETE ((SIGN##_##NR_BYTES) sim_core_read_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, read_map, (EA))) */ +/* OBSOLETE */ +/* OBSOLETE #define STORE(EA, NR_BYTES, VAL) \ */ +/* OBSOLETE do { \ */ +/* OBSOLETE sim_core_write_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, write_map, (EA), (VAL)); \ */ +/* OBSOLETE } while (0) */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #endif */ diff --git a/sim/d30v/cpu.c b/sim/d30v/cpu.c index c14a951..32d8829 100644 --- a/sim/d30v/cpu.c +++ b/sim/d30v/cpu.c @@ -1,172 +1,172 @@ -/* Mitsubishi Electric Corp. D30V Simulator. - Copyright (C) 1997, Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - - -#ifndef _CPU_C_ -#define _CPU_C_ - -#include "sim-main.h" - - -int -is_wrong_slot (SIM_DESC sd, - address_word cia, - itable_index index) -{ - switch (STATE_CPU (sd, 0)->unit) - { - case memory_unit: - return !itable[index].option[itable_option_mu]; - case integer_unit: - return !itable[index].option[itable_option_iu]; - case any_unit: - return 0; - default: - sim_engine_abort (sd, STATE_CPU (sd, 0), cia, - "internal error - is_wrong_slot - bad switch"); - return -1; - } -} - -int -is_condition_ok (SIM_DESC sd, - address_word cia, - int cond) -{ - switch (cond) - { - case 0x0: - return 1; - case 0x1: - return PSW_VAL(PSW_F0); - case 0x2: - return !PSW_VAL(PSW_F0); - case 0x3: - return PSW_VAL(PSW_F1); - case 0x4: - return !PSW_VAL(PSW_F1); - case 0x5: - return PSW_VAL(PSW_F0) && PSW_VAL(PSW_F1); - case 0x6: - return PSW_VAL(PSW_F0) && !PSW_VAL(PSW_F1); - case 0x7: - sim_engine_abort (sd, STATE_CPU (sd, 0), cia, - "is_condition_ok - bad instruction condition bits"); - return 0; - default: - sim_engine_abort (sd, STATE_CPU (sd, 0), cia, - "internal error - is_condition_ok - bad switch"); - return -1; - } -} - -/* If --trace-call, trace calls, remembering the current state of - registers. */ - -typedef struct _call_stack { - struct _call_stack *prev; - registers regs; -} call_stack; - -static call_stack *call_stack_head = (call_stack *)0; -static int call_depth = 0; - -void call_occurred (SIM_DESC sd, - sim_cpu *cpu, - address_word cia, - address_word nia) -{ - call_stack *ptr = ZALLOC (call_stack); - ptr->regs = cpu->regs; - ptr->prev = call_stack_head; - call_stack_head = ptr; - - trace_one_insn (sd, cpu, nia, 1, "", 0, "call", - "Depth %3d, Return 0x%.8lx, Args 0x%.8lx 0x%.8lx", - ++call_depth, (unsigned long)cia+8, (unsigned long)GPR[2], - (unsigned long)GPR[3]); -} - -/* If --trace-call, trace returns, checking if any saved register was changed. */ - -void return_occurred (SIM_DESC sd, - sim_cpu *cpu, - address_word cia, - address_word nia) -{ - char buffer[1024]; - char *buf_ptr = buffer; - call_stack *ptr = call_stack_head; - int regno; - char *prefix = ", Registers that differ: "; - - *buf_ptr = '\0'; - for (regno = 34; regno <= 63; regno++) { - if (cpu->regs.general_purpose[regno] != ptr->regs.general_purpose[regno]) { - sprintf (buf_ptr, "%sr%d", prefix, regno); - buf_ptr += strlen (buf_ptr); - prefix = " "; - } - } - - if (cpu->regs.accumulator[1] != ptr->regs.accumulator[1]) { - sprintf (buf_ptr, "%sa1", prefix); - buf_ptr += strlen (buf_ptr); - prefix = " "; - } - - trace_one_insn (sd, cpu, cia, 1, "", 0, "return", - "Depth %3d, Return 0x%.8lx, Ret. 0x%.8lx 0x%.8lx%s", - call_depth--, (unsigned long)nia, (unsigned long)GPR[2], - (unsigned long)GPR[3], buffer); - - call_stack_head = ptr->prev; - zfree (ptr); -} - - -/* Read/write functions for system call interface. */ -int -d30v_read_mem (host_callback *cb, - struct cb_syscall *sc, - unsigned long taddr, - char *buf, - int bytes) -{ - SIM_DESC sd = (SIM_DESC) sc->p1; - sim_cpu *cpu = STATE_CPU (sd, 0); - - return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); -} - -int -d30v_write_mem (host_callback *cb, - struct cb_syscall *sc, - unsigned long taddr, - const char *buf, - int bytes) -{ - SIM_DESC sd = (SIM_DESC) sc->p1; - sim_cpu *cpu = STATE_CPU (sd, 0); - - return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); -} - -#endif /* _CPU_C_ */ +/* OBSOLETE /* Mitsubishi Electric Corp. D30V Simulator. */ +/* OBSOLETE Copyright (C) 1997, Free Software Foundation, Inc. */ +/* OBSOLETE Contributed by Cygnus Support. */ +/* OBSOLETE */ +/* OBSOLETE This file is part of GDB, the GNU debugger. */ +/* OBSOLETE */ +/* OBSOLETE This program is free software; you can redistribute it and/or modify */ +/* OBSOLETE it under the terms of the GNU General Public License as published by */ +/* OBSOLETE the Free Software Foundation; either version 2, or (at your option) */ +/* OBSOLETE any later version. */ +/* OBSOLETE */ +/* OBSOLETE This program is distributed in the hope that it will be useful, */ +/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ +/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ +/* OBSOLETE GNU General Public License for more details. */ +/* OBSOLETE */ +/* OBSOLETE You should have received a copy of the GNU General Public License along */ +/* OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., */ +/* OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #ifndef _CPU_C_ */ +/* OBSOLETE #define _CPU_C_ */ +/* OBSOLETE */ +/* OBSOLETE #include "sim-main.h" */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE int */ +/* OBSOLETE is_wrong_slot (SIM_DESC sd, */ +/* OBSOLETE address_word cia, */ +/* OBSOLETE itable_index index) */ +/* OBSOLETE { */ +/* OBSOLETE switch (STATE_CPU (sd, 0)->unit) */ +/* OBSOLETE { */ +/* OBSOLETE case memory_unit: */ +/* OBSOLETE return !itable[index].option[itable_option_mu]; */ +/* OBSOLETE case integer_unit: */ +/* OBSOLETE return !itable[index].option[itable_option_iu]; */ +/* OBSOLETE case any_unit: */ +/* OBSOLETE return 0; */ +/* OBSOLETE default: */ +/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */ +/* OBSOLETE "internal error - is_wrong_slot - bad switch"); */ +/* OBSOLETE return -1; */ +/* OBSOLETE } */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE int */ +/* OBSOLETE is_condition_ok (SIM_DESC sd, */ +/* OBSOLETE address_word cia, */ +/* OBSOLETE int cond) */ +/* OBSOLETE { */ +/* OBSOLETE switch (cond) */ +/* OBSOLETE { */ +/* OBSOLETE case 0x0: */ +/* OBSOLETE return 1; */ +/* OBSOLETE case 0x1: */ +/* OBSOLETE return PSW_VAL(PSW_F0); */ +/* OBSOLETE case 0x2: */ +/* OBSOLETE return !PSW_VAL(PSW_F0); */ +/* OBSOLETE case 0x3: */ +/* OBSOLETE return PSW_VAL(PSW_F1); */ +/* OBSOLETE case 0x4: */ +/* OBSOLETE return !PSW_VAL(PSW_F1); */ +/* OBSOLETE case 0x5: */ +/* OBSOLETE return PSW_VAL(PSW_F0) && PSW_VAL(PSW_F1); */ +/* OBSOLETE case 0x6: */ +/* OBSOLETE return PSW_VAL(PSW_F0) && !PSW_VAL(PSW_F1); */ +/* OBSOLETE case 0x7: */ +/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */ +/* OBSOLETE "is_condition_ok - bad instruction condition bits"); */ +/* OBSOLETE return 0; */ +/* OBSOLETE default: */ +/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */ +/* OBSOLETE "internal error - is_condition_ok - bad switch"); */ +/* OBSOLETE return -1; */ +/* OBSOLETE } */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* If --trace-call, trace calls, remembering the current state of */ +/* OBSOLETE registers. */ */ +/* OBSOLETE */ +/* OBSOLETE typedef struct _call_stack { */ +/* OBSOLETE struct _call_stack *prev; */ +/* OBSOLETE registers regs; */ +/* OBSOLETE } call_stack; */ +/* OBSOLETE */ +/* OBSOLETE static call_stack *call_stack_head = (call_stack *)0; */ +/* OBSOLETE static int call_depth = 0; */ +/* OBSOLETE */ +/* OBSOLETE void call_occurred (SIM_DESC sd, */ +/* OBSOLETE sim_cpu *cpu, */ +/* OBSOLETE address_word cia, */ +/* OBSOLETE address_word nia) */ +/* OBSOLETE { */ +/* OBSOLETE call_stack *ptr = ZALLOC (call_stack); */ +/* OBSOLETE ptr->regs = cpu->regs; */ +/* OBSOLETE ptr->prev = call_stack_head; */ +/* OBSOLETE call_stack_head = ptr; */ +/* OBSOLETE */ +/* OBSOLETE trace_one_insn (sd, cpu, nia, 1, "", 0, "call", */ +/* OBSOLETE "Depth %3d, Return 0x%.8lx, Args 0x%.8lx 0x%.8lx", */ +/* OBSOLETE ++call_depth, (unsigned long)cia+8, (unsigned long)GPR[2], */ +/* OBSOLETE (unsigned long)GPR[3]); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* If --trace-call, trace returns, checking if any saved register was changed. */ */ +/* OBSOLETE */ +/* OBSOLETE void return_occurred (SIM_DESC sd, */ +/* OBSOLETE sim_cpu *cpu, */ +/* OBSOLETE address_word cia, */ +/* OBSOLETE address_word nia) */ +/* OBSOLETE { */ +/* OBSOLETE char buffer[1024]; */ +/* OBSOLETE char *buf_ptr = buffer; */ +/* OBSOLETE call_stack *ptr = call_stack_head; */ +/* OBSOLETE int regno; */ +/* OBSOLETE char *prefix = ", Registers that differ: "; */ +/* OBSOLETE */ +/* OBSOLETE *buf_ptr = '\0'; */ +/* OBSOLETE for (regno = 34; regno <= 63; regno++) { */ +/* OBSOLETE if (cpu->regs.general_purpose[regno] != ptr->regs.general_purpose[regno]) { */ +/* OBSOLETE sprintf (buf_ptr, "%sr%d", prefix, regno); */ +/* OBSOLETE buf_ptr += strlen (buf_ptr); */ +/* OBSOLETE prefix = " "; */ +/* OBSOLETE } */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE if (cpu->regs.accumulator[1] != ptr->regs.accumulator[1]) { */ +/* OBSOLETE sprintf (buf_ptr, "%sa1", prefix); */ +/* OBSOLETE buf_ptr += strlen (buf_ptr); */ +/* OBSOLETE prefix = " "; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "", 0, "return", */ +/* OBSOLETE "Depth %3d, Return 0x%.8lx, Ret. 0x%.8lx 0x%.8lx%s", */ +/* OBSOLETE call_depth--, (unsigned long)nia, (unsigned long)GPR[2], */ +/* OBSOLETE (unsigned long)GPR[3], buffer); */ +/* OBSOLETE */ +/* OBSOLETE call_stack_head = ptr->prev; */ +/* OBSOLETE zfree (ptr); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE /* Read/write functions for system call interface. */ */ +/* OBSOLETE int */ +/* OBSOLETE d30v_read_mem (host_callback *cb, */ +/* OBSOLETE struct cb_syscall *sc, */ +/* OBSOLETE unsigned long taddr, */ +/* OBSOLETE char *buf, */ +/* OBSOLETE int bytes) */ +/* OBSOLETE { */ +/* OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1; */ +/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */ +/* OBSOLETE */ +/* OBSOLETE return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE int */ +/* OBSOLETE d30v_write_mem (host_callback *cb, */ +/* OBSOLETE struct cb_syscall *sc, */ +/* OBSOLETE unsigned long taddr, */ +/* OBSOLETE const char *buf, */ +/* OBSOLETE int bytes) */ +/* OBSOLETE { */ +/* OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1; */ +/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */ +/* OBSOLETE */ +/* OBSOLETE return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE #endif /* _CPU_C_ */ */ diff --git a/sim/d30v/cpu.h b/sim/d30v/cpu.h index 56f749c..1e9f3d8 100644 --- a/sim/d30v/cpu.h +++ b/sim/d30v/cpu.h @@ -1,249 +1,249 @@ -/* Mitsubishi Electric Corp. D30V Simulator. - Copyright (C) 1997, Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - - -#ifndef _CPU_H_ -#define _CPU_H_ - -enum { - NR_GENERAL_PURPOSE_REGISTERS = 64, - NR_CONTROL_REGISTERS = 64, - NR_ACCUMULATORS = 2, - STACK_POINTER_GPR = 63, - NR_STACK_POINTERS = 2, -}; - -enum { - processor_status_word_cr = 0, - backup_processor_status_word_cr = 1, - program_counter_cr = 2, - backup_program_counter_cr = 3, - debug_backup_processor_status_word_cr = 4, - debug_backup_program_counter_cr = 5, - reserved_6_cr = 6, - repeat_count_cr = 7, - repeat_start_address_cr = 8, - repeat_end_address_cr = 9, - modulo_start_address_cr = 10, - modulo_end_address_cr = 11, - instruction_break_address_cr = 14, - eit_vector_base_cr = 15, -}; - - -enum { - PSW_SM = 0, - PSW_EA = 2, - PSW_DB = 3, - PSW_DS = 4, - PSW_IE = 5, - PSW_RP = 6, - PSW_MD = 7, - PSW_F0 = 17, - PSW_F1 = 19, - PSW_F2 = 21, - PSW_F3 = 23, - PSW_S = 25, - PSW_V = 27, - PSW_VA = 29, - PSW_C = 31, -}; - -/* aliases for PSW flag numbers (F0..F7) */ -enum -{ - PSW_S_FLAG = 4, -}; - -typedef struct _registers { - unsigned32 general_purpose[NR_GENERAL_PURPOSE_REGISTERS]; - /* keep track of the stack pointer */ - unsigned32 sp[NR_STACK_POINTERS]; /* swap with SP */ - unsigned32 current_sp; - unsigned32 control[NR_CONTROL_REGISTERS]; - unsigned64 accumulator[NR_ACCUMULATORS]; -} registers; - -typedef enum _cpu_units { - memory_unit, - integer_unit, - any_unit, -} cpu_units; - -/* In order to support parallel instructions, which one instruction can be - writing to a register that is used as input to another, queue up the - writes to the end of the instruction boundaries. */ - -#define MAX_WRITE32 16 -#define MAX_WRITE64 2 - -struct _write32 { - int num; /* # of 32-bit writes queued up */ - unsigned32 value[MAX_WRITE32]; /* value to write */ - unsigned32 mask[MAX_WRITE32]; /* mask to use */ - unsigned32 *ptr[MAX_WRITE32]; /* address to write to */ -}; - -struct _write64 { - int num; /* # of 64-bit writes queued up */ - unsigned64 value[MAX_WRITE64]; /* value to write */ - unsigned64 *ptr[MAX_WRITE64]; /* address to write to */ -}; - -struct _sim_cpu { - cpu_units unit; - registers regs; - sim_cpu_base base; - int trace_call_p; /* Whether to do call tracing. */ - int trace_trap_p; /* If unknown traps dump out the regs */ - int trace_action; /* trace bits at end of instructions */ - int left_kills_right_p; /* left insn kills insn in right slot of -> */ - int mvtsys_left_p; /* left insn was mvtsys */ - int did_trap; /* we did a trap & need to finish it */ - struct _write32 write32; /* queued up 32-bit writes */ - struct _write64 write64; /* queued up 64-bit writes */ -}; - -#define PC (STATE_CPU (sd, 0)->regs.control[program_counter_cr]) -#define PSW (STATE_CPU (sd, 0)->regs.control[processor_status_word_cr]) -#define PSWL (*AL2_4(&PSW)) -#define PSWH (*AH2_4(&PSW)) -#define DPSW (STATE_CPU (sd, 0)->regs.control[debug_backup_processor_status_word_cr]) -#define DPC (STATE_CPU (sd, 0)->regs.control[debug_backup_program_counter_cr]) -#define bPC (STATE_CPU (sd, 0)->regs.control[backup_program_counter_cr]) -#define bPSW (STATE_CPU (sd, 0)->regs.control[backup_processor_status_word_cr]) -#define RPT_C (STATE_CPU (sd, 0)->regs.control[repeat_count_cr]) -#define RPT_S (STATE_CPU (sd, 0)->regs.control[repeat_start_address_cr]) -#define RPT_E (STATE_CPU (sd, 0)->regs.control[repeat_end_address_cr]) -#define MOD_S (STATE_CPU (sd, 0)->regs.control[modulo_start_address_cr]) -#define MOD_E (STATE_CPU (sd, 0)->regs.control[modulo_end_address_cr]) -#define IBA (STATE_CPU (sd, 0)->regs.control[instruction_break_address_cr]) -#define EIT_VB (STATE_CPU (sd, 0)->regs.control[eit_vector_base_cr]) -#define GPR (STATE_CPU (sd, 0)->regs.general_purpose) -#define GPR_CLEAR(N) (GPR[(N)] = 0) -#define ACC (STATE_CPU (sd, 0)->regs.accumulator) -#define CREG (STATE_CPU (sd, 0)->regs.control) -#define SP (GPR[STACK_POINTER_GPR]) -#define TRACE_CALL_P (STATE_CPU (sd, 0)->trace_call_p) -#define TRACE_TRAP_P (STATE_CPU (sd, 0)->trace_trap_p) -#define TRACE_ACTION (STATE_CPU (sd, 0)->trace_action) -#define TRACE_ACTION_CALL 0x00000001 /* call occurred */ -#define TRACE_ACTION_RETURN 0x00000002 /* return occurred */ - -#define WRITE32 (STATE_CPU (sd, 0)->write32) -#define WRITE32_NUM (WRITE32.num) -#define WRITE32_PTR(N) (WRITE32.ptr[N]) -#define WRITE32_MASK(N) (WRITE32.mask[N]) -#define WRITE32_VALUE(N) (WRITE32.value[N]) -#define WRITE32_QUEUE(PTR, VALUE) WRITE32_QUEUE_MASK (PTR, VALUE, 0xffffffff) - -#define WRITE32_QUEUE_MASK(PTR, VALUE, MASK) \ -do { \ - int _num = WRITE32_NUM; \ - if (_num >= MAX_WRITE32) \ - sim_engine_abort (sd, STATE_CPU (sd, 0), cia, \ - "Too many queued 32-bit writes"); \ - WRITE32_PTR(_num) = PTR; \ - WRITE32_VALUE(_num) = VALUE; \ - WRITE32_MASK(_num) = MASK; \ - WRITE32_NUM = _num+1; \ -} while (0) - -#define DID_TRAP (STATE_CPU (sd, 0)->did_trap) - -#define WRITE64 (STATE_CPU (sd, 0)->write64) -#define WRITE64_NUM (WRITE64.num) -#define WRITE64_PTR(N) (WRITE64.ptr[N]) -#define WRITE64_VALUE(N) (WRITE64.value[N]) -#define WRITE64_QUEUE(PTR, VALUE) \ -do { \ - int _num = WRITE64_NUM; \ - if (_num >= MAX_WRITE64) \ - sim_engine_abort (sd, STATE_CPU (sd, 0), cia, \ - "Too many queued 64-bit writes"); \ - WRITE64_PTR(_num) = PTR; \ - WRITE64_VALUE(_num) = VALUE; \ - WRITE64_NUM = _num+1; \ -} while (0) - -#define DPSW_VALID 0xbf005555 -#define PSW_VALID 0xb7005555 -#define EIT_VALID 0xfffff000 /* From page 7-4 of D30V/MPEG arch. manual */ -#define EIT_VB_DEFAULT 0xfffff000 /* Value of the EIT_VB register after reset */ - -/* Verify that the instruction is in the correct slot */ - -#define IS_WRONG_SLOT is_wrong_slot(sd, cia, MY_INDEX) -extern int is_wrong_slot -(SIM_DESC sd, - address_word cia, - itable_index index); - -#define IS_CONDITION_OK is_condition_ok(sd, cia, CCC) -extern int is_condition_ok -(SIM_DESC sd, - address_word cia, - int cond); - -#define SIM_HAVE_BREAKPOINTS /* Turn on internal breakpoint module */ - -/* Internal breakpoint instruction is syscall 5 */ -#define SIM_BREAKPOINT {0x0e, 0x00, 0x00, 0x05} -#define SIM_BREAKPOINT_SIZE (4) - -/* Call occurred */ -extern void call_occurred -(SIM_DESC sd, - sim_cpu *cpu, - address_word cia, - address_word nia); - -/* Return occurred */ -extern void return_occurred -(SIM_DESC sd, - sim_cpu *cpu, - address_word cia, - address_word nia); - -/* Whether to do call tracing. */ -extern int d30v_call_trace_p; - -/* Read/write functions for system call interface. */ -extern int d30v_read_mem -(host_callback *cb, - struct cb_syscall *sc, - unsigned long taddr, - char *buf, - int bytes); - -extern int d30v_write_mem -(host_callback *cb, - struct cb_syscall *sc, - unsigned long taddr, - const char *buf, - int bytes); - -/* Process all of the queued up writes in order now */ -void unqueue_writes -(SIM_DESC sd, - sim_cpu *cpu, - address_word cia); - -#endif /* _CPU_H_ */ +/* OBSOLETE /* Mitsubishi Electric Corp. D30V Simulator. */ +/* OBSOLETE Copyright (C) 1997, Free Software Foundation, Inc. */ +/* OBSOLETE Contributed by Cygnus Support. */ +/* OBSOLETE */ +/* OBSOLETE This file is part of GDB, the GNU debugger. */ +/* OBSOLETE */ +/* OBSOLETE This program is free software; you can redistribute it and/or modify */ +/* OBSOLETE it under the terms of the GNU General Public License as published by */ +/* OBSOLETE the Free Software Foundation; either version 2, or (at your option) */ +/* OBSOLETE any later version. */ +/* OBSOLETE */ +/* OBSOLETE This program is distributed in the hope that it will be useful, */ +/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ +/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ +/* OBSOLETE GNU General Public License for more details. */ +/* OBSOLETE */ +/* OBSOLETE You should have received a copy of the GNU General Public License along */ +/* OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., */ +/* OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #ifndef _CPU_H_ */ +/* OBSOLETE #define _CPU_H_ */ +/* OBSOLETE */ +/* OBSOLETE enum { */ +/* OBSOLETE NR_GENERAL_PURPOSE_REGISTERS = 64, */ +/* OBSOLETE NR_CONTROL_REGISTERS = 64, */ +/* OBSOLETE NR_ACCUMULATORS = 2, */ +/* OBSOLETE STACK_POINTER_GPR = 63, */ +/* OBSOLETE NR_STACK_POINTERS = 2, */ +/* OBSOLETE }; */ +/* OBSOLETE */ +/* OBSOLETE enum { */ +/* OBSOLETE processor_status_word_cr = 0, */ +/* OBSOLETE backup_processor_status_word_cr = 1, */ +/* OBSOLETE program_counter_cr = 2, */ +/* OBSOLETE backup_program_counter_cr = 3, */ +/* OBSOLETE debug_backup_processor_status_word_cr = 4, */ +/* OBSOLETE debug_backup_program_counter_cr = 5, */ +/* OBSOLETE reserved_6_cr = 6, */ +/* OBSOLETE repeat_count_cr = 7, */ +/* OBSOLETE repeat_start_address_cr = 8, */ +/* OBSOLETE repeat_end_address_cr = 9, */ +/* OBSOLETE modulo_start_address_cr = 10, */ +/* OBSOLETE modulo_end_address_cr = 11, */ +/* OBSOLETE instruction_break_address_cr = 14, */ +/* OBSOLETE eit_vector_base_cr = 15, */ +/* OBSOLETE }; */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE enum { */ +/* OBSOLETE PSW_SM = 0, */ +/* OBSOLETE PSW_EA = 2, */ +/* OBSOLETE PSW_DB = 3, */ +/* OBSOLETE PSW_DS = 4, */ +/* OBSOLETE PSW_IE = 5, */ +/* OBSOLETE PSW_RP = 6, */ +/* OBSOLETE PSW_MD = 7, */ +/* OBSOLETE PSW_F0 = 17, */ +/* OBSOLETE PSW_F1 = 19, */ +/* OBSOLETE PSW_F2 = 21, */ +/* OBSOLETE PSW_F3 = 23, */ +/* OBSOLETE PSW_S = 25, */ +/* OBSOLETE PSW_V = 27, */ +/* OBSOLETE PSW_VA = 29, */ +/* OBSOLETE PSW_C = 31, */ +/* OBSOLETE }; */ +/* OBSOLETE */ +/* OBSOLETE /* aliases for PSW flag numbers (F0..F7) */ */ +/* OBSOLETE enum */ +/* OBSOLETE { */ +/* OBSOLETE PSW_S_FLAG = 4, */ +/* OBSOLETE }; */ +/* OBSOLETE */ +/* OBSOLETE typedef struct _registers { */ +/* OBSOLETE unsigned32 general_purpose[NR_GENERAL_PURPOSE_REGISTERS]; */ +/* OBSOLETE /* keep track of the stack pointer */ */ +/* OBSOLETE unsigned32 sp[NR_STACK_POINTERS]; /* swap with SP */ */ +/* OBSOLETE unsigned32 current_sp; */ +/* OBSOLETE unsigned32 control[NR_CONTROL_REGISTERS]; */ +/* OBSOLETE unsigned64 accumulator[NR_ACCUMULATORS]; */ +/* OBSOLETE } registers; */ +/* OBSOLETE */ +/* OBSOLETE typedef enum _cpu_units { */ +/* OBSOLETE memory_unit, */ +/* OBSOLETE integer_unit, */ +/* OBSOLETE any_unit, */ +/* OBSOLETE } cpu_units; */ +/* OBSOLETE */ +/* OBSOLETE /* In order to support parallel instructions, which one instruction can be */ +/* OBSOLETE writing to a register that is used as input to another, queue up the */ +/* OBSOLETE writes to the end of the instruction boundaries. */ */ +/* OBSOLETE */ +/* OBSOLETE #define MAX_WRITE32 16 */ +/* OBSOLETE #define MAX_WRITE64 2 */ +/* OBSOLETE */ +/* OBSOLETE struct _write32 { */ +/* OBSOLETE int num; /* # of 32-bit writes queued up */ */ +/* OBSOLETE unsigned32 value[MAX_WRITE32]; /* value to write */ */ +/* OBSOLETE unsigned32 mask[MAX_WRITE32]; /* mask to use */ */ +/* OBSOLETE unsigned32 *ptr[MAX_WRITE32]; /* address to write to */ */ +/* OBSOLETE }; */ +/* OBSOLETE */ +/* OBSOLETE struct _write64 { */ +/* OBSOLETE int num; /* # of 64-bit writes queued up */ */ +/* OBSOLETE unsigned64 value[MAX_WRITE64]; /* value to write */ */ +/* OBSOLETE unsigned64 *ptr[MAX_WRITE64]; /* address to write to */ */ +/* OBSOLETE }; */ +/* OBSOLETE */ +/* OBSOLETE struct _sim_cpu { */ +/* OBSOLETE cpu_units unit; */ +/* OBSOLETE registers regs; */ +/* OBSOLETE sim_cpu_base base; */ +/* OBSOLETE int trace_call_p; /* Whether to do call tracing. */ */ +/* OBSOLETE int trace_trap_p; /* If unknown traps dump out the regs */ */ +/* OBSOLETE int trace_action; /* trace bits at end of instructions */ */ +/* OBSOLETE int left_kills_right_p; /* left insn kills insn in right slot of -> */ */ +/* OBSOLETE int mvtsys_left_p; /* left insn was mvtsys */ */ +/* OBSOLETE int did_trap; /* we did a trap & need to finish it */ */ +/* OBSOLETE struct _write32 write32; /* queued up 32-bit writes */ */ +/* OBSOLETE struct _write64 write64; /* queued up 64-bit writes */ */ +/* OBSOLETE }; */ +/* OBSOLETE */ +/* OBSOLETE #define PC (STATE_CPU (sd, 0)->regs.control[program_counter_cr]) */ +/* OBSOLETE #define PSW (STATE_CPU (sd, 0)->regs.control[processor_status_word_cr]) */ +/* OBSOLETE #define PSWL (*AL2_4(&PSW)) */ +/* OBSOLETE #define PSWH (*AH2_4(&PSW)) */ +/* OBSOLETE #define DPSW (STATE_CPU (sd, 0)->regs.control[debug_backup_processor_status_word_cr]) */ +/* OBSOLETE #define DPC (STATE_CPU (sd, 0)->regs.control[debug_backup_program_counter_cr]) */ +/* OBSOLETE #define bPC (STATE_CPU (sd, 0)->regs.control[backup_program_counter_cr]) */ +/* OBSOLETE #define bPSW (STATE_CPU (sd, 0)->regs.control[backup_processor_status_word_cr]) */ +/* OBSOLETE #define RPT_C (STATE_CPU (sd, 0)->regs.control[repeat_count_cr]) */ +/* OBSOLETE #define RPT_S (STATE_CPU (sd, 0)->regs.control[repeat_start_address_cr]) */ +/* OBSOLETE #define RPT_E (STATE_CPU (sd, 0)->regs.control[repeat_end_address_cr]) */ +/* OBSOLETE #define MOD_S (STATE_CPU (sd, 0)->regs.control[modulo_start_address_cr]) */ +/* OBSOLETE #define MOD_E (STATE_CPU (sd, 0)->regs.control[modulo_end_address_cr]) */ +/* OBSOLETE #define IBA (STATE_CPU (sd, 0)->regs.control[instruction_break_address_cr]) */ +/* OBSOLETE #define EIT_VB (STATE_CPU (sd, 0)->regs.control[eit_vector_base_cr]) */ +/* OBSOLETE #define GPR (STATE_CPU (sd, 0)->regs.general_purpose) */ +/* OBSOLETE #define GPR_CLEAR(N) (GPR[(N)] = 0) */ +/* OBSOLETE #define ACC (STATE_CPU (sd, 0)->regs.accumulator) */ +/* OBSOLETE #define CREG (STATE_CPU (sd, 0)->regs.control) */ +/* OBSOLETE #define SP (GPR[STACK_POINTER_GPR]) */ +/* OBSOLETE #define TRACE_CALL_P (STATE_CPU (sd, 0)->trace_call_p) */ +/* OBSOLETE #define TRACE_TRAP_P (STATE_CPU (sd, 0)->trace_trap_p) */ +/* OBSOLETE #define TRACE_ACTION (STATE_CPU (sd, 0)->trace_action) */ +/* OBSOLETE #define TRACE_ACTION_CALL 0x00000001 /* call occurred */ */ +/* OBSOLETE #define TRACE_ACTION_RETURN 0x00000002 /* return occurred */ */ +/* OBSOLETE */ +/* OBSOLETE #define WRITE32 (STATE_CPU (sd, 0)->write32) */ +/* OBSOLETE #define WRITE32_NUM (WRITE32.num) */ +/* OBSOLETE #define WRITE32_PTR(N) (WRITE32.ptr[N]) */ +/* OBSOLETE #define WRITE32_MASK(N) (WRITE32.mask[N]) */ +/* OBSOLETE #define WRITE32_VALUE(N) (WRITE32.value[N]) */ +/* OBSOLETE #define WRITE32_QUEUE(PTR, VALUE) WRITE32_QUEUE_MASK (PTR, VALUE, 0xffffffff) */ +/* OBSOLETE */ +/* OBSOLETE #define WRITE32_QUEUE_MASK(PTR, VALUE, MASK) \ */ +/* OBSOLETE do { \ */ +/* OBSOLETE int _num = WRITE32_NUM; \ */ +/* OBSOLETE if (_num >= MAX_WRITE32) \ */ +/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, \ */ +/* OBSOLETE "Too many queued 32-bit writes"); \ */ +/* OBSOLETE WRITE32_PTR(_num) = PTR; \ */ +/* OBSOLETE WRITE32_VALUE(_num) = VALUE; \ */ +/* OBSOLETE WRITE32_MASK(_num) = MASK; \ */ +/* OBSOLETE WRITE32_NUM = _num+1; \ */ +/* OBSOLETE } while (0) */ +/* OBSOLETE */ +/* OBSOLETE #define DID_TRAP (STATE_CPU (sd, 0)->did_trap) */ +/* OBSOLETE */ +/* OBSOLETE #define WRITE64 (STATE_CPU (sd, 0)->write64) */ +/* OBSOLETE #define WRITE64_NUM (WRITE64.num) */ +/* OBSOLETE #define WRITE64_PTR(N) (WRITE64.ptr[N]) */ +/* OBSOLETE #define WRITE64_VALUE(N) (WRITE64.value[N]) */ +/* OBSOLETE #define WRITE64_QUEUE(PTR, VALUE) \ */ +/* OBSOLETE do { \ */ +/* OBSOLETE int _num = WRITE64_NUM; \ */ +/* OBSOLETE if (_num >= MAX_WRITE64) \ */ +/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, \ */ +/* OBSOLETE "Too many queued 64-bit writes"); \ */ +/* OBSOLETE WRITE64_PTR(_num) = PTR; \ */ +/* OBSOLETE WRITE64_VALUE(_num) = VALUE; \ */ +/* OBSOLETE WRITE64_NUM = _num+1; \ */ +/* OBSOLETE } while (0) */ +/* OBSOLETE */ +/* OBSOLETE #define DPSW_VALID 0xbf005555 */ +/* OBSOLETE #define PSW_VALID 0xb7005555 */ +/* OBSOLETE #define EIT_VALID 0xfffff000 /* From page 7-4 of D30V/MPEG arch. manual */ */ +/* OBSOLETE #define EIT_VB_DEFAULT 0xfffff000 /* Value of the EIT_VB register after reset */ */ +/* OBSOLETE */ +/* OBSOLETE /* Verify that the instruction is in the correct slot */ */ +/* OBSOLETE */ +/* OBSOLETE #define IS_WRONG_SLOT is_wrong_slot(sd, cia, MY_INDEX) */ +/* OBSOLETE extern int is_wrong_slot */ +/* OBSOLETE (SIM_DESC sd, */ +/* OBSOLETE address_word cia, */ +/* OBSOLETE itable_index index); */ +/* OBSOLETE */ +/* OBSOLETE #define IS_CONDITION_OK is_condition_ok(sd, cia, CCC) */ +/* OBSOLETE extern int is_condition_ok */ +/* OBSOLETE (SIM_DESC sd, */ +/* OBSOLETE address_word cia, */ +/* OBSOLETE int cond); */ +/* OBSOLETE */ +/* OBSOLETE #define SIM_HAVE_BREAKPOINTS /* Turn on internal breakpoint module */ */ +/* OBSOLETE */ +/* OBSOLETE /* Internal breakpoint instruction is syscall 5 */ */ +/* OBSOLETE #define SIM_BREAKPOINT {0x0e, 0x00, 0x00, 0x05} */ +/* OBSOLETE #define SIM_BREAKPOINT_SIZE (4) */ +/* OBSOLETE */ +/* OBSOLETE /* Call occurred */ */ +/* OBSOLETE extern void call_occurred */ +/* OBSOLETE (SIM_DESC sd, */ +/* OBSOLETE sim_cpu *cpu, */ +/* OBSOLETE address_word cia, */ +/* OBSOLETE address_word nia); */ +/* OBSOLETE */ +/* OBSOLETE /* Return occurred */ */ +/* OBSOLETE extern void return_occurred */ +/* OBSOLETE (SIM_DESC sd, */ +/* OBSOLETE sim_cpu *cpu, */ +/* OBSOLETE address_word cia, */ +/* OBSOLETE address_word nia); */ +/* OBSOLETE */ +/* OBSOLETE /* Whether to do call tracing. */ */ +/* OBSOLETE extern int d30v_call_trace_p; */ +/* OBSOLETE */ +/* OBSOLETE /* Read/write functions for system call interface. */ */ +/* OBSOLETE extern int d30v_read_mem */ +/* OBSOLETE (host_callback *cb, */ +/* OBSOLETE struct cb_syscall *sc, */ +/* OBSOLETE unsigned long taddr, */ +/* OBSOLETE char *buf, */ +/* OBSOLETE int bytes); */ +/* OBSOLETE */ +/* OBSOLETE extern int d30v_write_mem */ +/* OBSOLETE (host_callback *cb, */ +/* OBSOLETE struct cb_syscall *sc, */ +/* OBSOLETE unsigned long taddr, */ +/* OBSOLETE const char *buf, */ +/* OBSOLETE int bytes); */ +/* OBSOLETE */ +/* OBSOLETE /* Process all of the queued up writes in order now */ */ +/* OBSOLETE void unqueue_writes */ +/* OBSOLETE (SIM_DESC sd, */ +/* OBSOLETE sim_cpu *cpu, */ +/* OBSOLETE address_word cia); */ +/* OBSOLETE */ +/* OBSOLETE #endif /* _CPU_H_ */ */ diff --git a/sim/d30v/d30v-insns b/sim/d30v/d30v-insns index 7b7c3c8..10ce868 100644 --- a/sim/d30v/d30v-insns +++ b/sim/d30v/d30v-insns @@ -1,2424 +1,2421 @@ -// -*- C -*- -// Mitsubishi Electric Corp. D30V Simulator. -// Copyright (C) 1997, Free Software Foundation, Inc. -// Contributed by Cygnus Solutions Inc. -// -// This file is part of GDB, the GNU debugger. -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -// - - -define( _BRA, `1.*,CCC,000') -define( _LOGIC, `1.*,CCC,001') -define( _IMEM, `1.*,CCC,010') -define( _IALU1, `1.*,CCC,100') -define(_IALU2, `1.*,CCC,101') - - - -define(_IMM6, `6.IMM_6S') -define(_IMM12, `12.IMM_12S') -define(_IMM18, `18.IMM_18S') -define(_IMM32, `6.IMM_6L,*,000,8.IMM_8L,00,18.IMM_18L') - - - -// The following is called when ever an illegal instruction is -// encountered -::internal::illegal - sim_io_eprintf (sd, "illegal instruction at 0x%lx\n", (long) cia); - sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL); - -// The following is called when ever an instruction in the wrong -// slot is encountered. -::internal::wrong_slot - sim_io_eprintf (sd, "wrong slot at 0x%lx\n", (long) cia); - sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL); - - - -// Something illegal that can be used to contact the simulator emul -// library. -define(_EMUL, `1.*,CCC,111') - -void::function::do_emul:int imm - /* temp hack - later replace with real interface */ - enum { - param1 = 2, param2, param3, param4 - }; - switch (imm) { - case 0: - { - sim_engine_abort (SD, CPU, cia, "UNIX call emulation unsupported"); - break; - } - case 1: - /* Trap 1 - prints a string */ - { - address_word str = GPR[param1]; - char chr; - while (1) { - chr = MEM (unsigned, str, 1); - if (chr == '\0') break; - sim_io_write_stdout (sd, &chr, sizeof chr); - str++; - } - break; - } - case 3: - /* Trap 3 - writes a character */ - { - char chr = GPR[param1]; - sim_io_write_stdout (sd, &chr, sizeof chr); - break; - } - case 4: - /* Trap 4 exits with status in [param1] */ - { - sim_engine_halt (SD, CPU, NULL, cia, sim_exited, GPR[param1]); - break; - } - case 5: - /* Trap 5 breakpoints. If the breakpoint system knows about this, it - won't return. Otherwise, we fall through to treat this as an - unknown instruction. */ - { - sim_handle_breakpoint (SD, CPU, cia); - /* Fall through to default case.*/ - } - default: - sim_engine_abort (SD, CPU, cia, "Unknown monitor call %d", imm); - } - -_EMUL,00000,00,6.*,6.*,IMM_6S:EMUL:short,emul:iu,mu:EMUL -"syscall <imm>" - do_emul (_SD, imm); -_BRA,00000,00,6.**,6.**,_IMM32:BRA:long:iu,mu:EMUL long -"syscall <imm>" - do_emul (_SD, imm); - -// ABS - -_IALU1,01000,00,6.RA,6.RB,6.**:IALU1:short:iu,mu:ABS -"abs r<RA>, r<RB>" - WRITE32_QUEUE (Ra, abs(Rb)); - - - -// ADD - -void::function::do_add:unsigned32 *ra, unsigned32 rb, unsigned32 imm - ALU_BEGIN(rb); - ALU_ADDC(imm); - ALU_END(ra); - -_IALU1,00000,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD -"add r<RA>, r<RB>, r<RC>" - do_add (_SD, Ra, Rb, Rc); -_IALU1,00000,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD imm -"add r<RA>, r<RB>, <imm>" - do_add (_SD, Ra, Rb, imm); -_IALU1,00000,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD imm long -"add r<RA>, r<RB>, <imm>" - do_add (_SD, Ra, Rb, imm); - - - -// ADD2H - -void::function::do_add2h:signed32 *ra, signed32 rb, signed32 imm - unsigned16 ah2 = VH2_4(rb) + VH2_4(imm); - unsigned16 al2 = VL2_4(rb) + VL2_4(imm); - WRITE32_QUEUE (ra, (ah2 << 16) | al2); - -_IALU1,00001,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD2H -"add2h r<RA>, r<RB>, r<RC>" - do_add2h (_SD, Ra, Rb, Rc); -_IALU1,00001,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD2H imm -"add2h r<RA>, r<RB>, <imm>" - do_add2h (_SD, Ra, Rb, immHL); -_IALU1,00001,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD2H imm long -"add2h r<RA>, r<RB>, <imm>" - do_add2h (_SD, Ra, Rb, imm); - - - -// ADDC - -void::function::do_addc:unsigned32 *ra, unsigned32 rb, unsigned32 imm - ALU_BEGIN(rb); - ALU_ADDC_C(imm, ALU_CARRY); - ALU_END(ra); - -_IALU1,00100,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDC -"addc r<RA>, r<RB>, r<RC>" - do_addc (_SD, Ra, Rb, Rc); -_IALU1,00100,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDC imm -"addc r<RA>, r<RB>, <imm>" - do_addc (_SD, Ra, Rb, imm); -_IALU1,00100,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDC imm long -"addc r<RA>, r<RB>, <imm>" - do_addc (_SD, Ra, Rb, imm); - - - -// ADDHppp - -void::function::do_addh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src - switch (ppp) { - case 0x0: /* LLL */ - { - ALU16_BEGIN(VL2_4(rb)); - ALU16_ADDC(VL2_4(src)); - ALU16_END(ra, 0); - } - break; - case 0x1: /* LLH */ - { - ALU16_BEGIN(VL2_4(rb)); - ALU16_ADDC(VH2_4(src)); - ALU16_END(ra, 0); - } - break; - case 0x2: /* LHL */ - { - ALU16_BEGIN(VH2_4(rb)); - ALU16_ADDC(VL2_4(src)); - ALU16_END(ra, 0); - } - break; - case 0x3: /* LHH */ - { - ALU16_BEGIN(VH2_4(rb)); - ALU16_ADDC(VH2_4(src)); - ALU16_END(ra, 0); - } - break; - case 0x4: /* HLL */ - { - ALU16_BEGIN(VL2_4(rb)); - ALU16_ADDC(VL2_4(src)); - ALU16_END(ra, 1); - } - break; - case 0x5: /* HLH */ - { - ALU16_BEGIN(VL2_4(rb)); - ALU16_ADDC(VH2_4(src)); - ALU16_END(ra, 1); - } - break; - case 0x6: /* HHL */ - { - ALU16_BEGIN(VH2_4(rb)); - ALU16_ADDC(VL2_4(src)); - ALU16_END(ra, 1); - } - break; - case 0x7: /* HHH */ - { - ALU16_BEGIN(VH2_4(rb)); - ALU16_ADDC(VH2_4(src)); - ALU16_END(ra, 1); - } - break; - default: - sim_engine_abort (SD, CPU, cia, "do_addh_ppp - internal error - bad switch"); - } -::%s::ppp:int ppp - switch (ppp) - { - case 0x0: return "lll"; - case 0x1: return "llh"; - case 0x2: return "lhl"; - case 0x3: return "lhh"; - case 0x4: return "hll"; - case 0x5: return "hlh"; - case 0x6: return "hhl"; - case 0x7: return "hhh"; - default: return "?"; - } - -_IALU1,10,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDHppp -"addh%s<ppp> r<RA>, r<RB>, r<RC>" - do_addh_ppp(_SD, ppp, Ra, Rb, Rc); -_IALU1,10,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDHppp imm -"addh%s<ppp> r<RA>, r<RB>, <imm>" - do_addh_ppp(_SD, ppp, Ra, Rb, immHL); -_IALU1,10,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDHppp imm long -"addh%s<ppp> r<RA>, r<RB>, <imm>" - do_addh_ppp(_SD, ppp, Ra, Rb, imm); - - - -// ADDS - -void::function::do_adds:unsigned32 *ra, unsigned32 rb, unsigned32 imm - ALU_BEGIN(rb); - ALU_ADDC(EXTRACTED32(imm, 0, 0)); - ALU_END(ra); - -_IALU1,00110,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS -"adds r<RA>, r<RB>, r<RC>" - do_adds (_SD, Ra, Rb, Rc); -_IALU1,00110,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS imm -"adds r<RA>, r<RB>, <imm>" - do_adds (_SD, Ra, Rb, imm); -_IALU1,00110,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS imm long -"adds r<RA>, r<RB>, <imm>" - do_adds (_SD, Ra, Rb, imm); - - - -// ADDS2H - -void::function::do_adds2h:unsigned32 *ra, unsigned32 rb, unsigned32 immHL - unsigned16 high = VH2_4(rb) + EXTRACTED32(immHL, 0, 0); - unsigned16 low = VL2_4(rb) + EXTRACTED32(immHL, 16, 16); - WRITE32_QUEUE (ra, (high << 16) | low); - -_IALU1,00111,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS2H -"adds2h r<RA>, r<RB>, r<RC>" - do_adds2h (_SD, Ra, Rb, Rc); -_IALU1,00111,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS2H imm -"adds2h r<RA>, r<RB>, <imm>" - do_adds2h (_SD, Ra, Rb, immHL); -_IALU1,00111,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS2H imm long -"adds2h r<RA>, r<RB>, <imm>" - do_adds2h (_SD, Ra, Rb, imm); - - - -// AND - -_LOGIC,11000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:AND -"and r<RA>, r<RB>, r<RC>" - WRITE32_QUEUE (Ra, Rb & Rc); -_LOGIC,11000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:AND imm -"and r<RA>, r<RB>, <imm>" - WRITE32_QUEUE (Ra, Rb & imm); -_LOGIC,11000,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:AND imm long -"and r<RA>, r<RB>, <imm>" - WRITE32_QUEUE (Ra, Rb & imm); - - -// ANDFG - -_LOGIC,01000,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:Logical AND Flags -"andfg f<FA>, f<FB>, f<FC>" - PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & PSW_FLAG_VAL(FC)); -_LOGIC,01000,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:Logical AND Flags imm -"andfg f<FA>, f<FB>, <imm_6>" - PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & (imm_6 & 1)); - - - -// AVG - -void::function::do_avg:unsigned32 *ra, unsigned32 rb, unsigned32 imm - WRITE32_QUEUE (ra, ((signed64)(signed32)rb + (signed64)(signed32)imm + 1) >> 1); - -_IALU1,01010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG -"avg r<RA>, r<RB>, r<RC>" - do_avg (_SD, Ra, Rb, Rc); -_IALU1,01010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG imm -"avg r<RA>, r<RB>, <imm>" - do_avg (_SD, Ra, Rb, imm); -_IALU1,01010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG imm long -"avg r<RA>, r<RB>, <imm>" - do_avg (_SD, Ra, Rb, imm); - - - -// AVG2H - -void::function::do_avg2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm - unsigned16 high = ((signed32)(signed16)VH2_4(rb) + (signed32)(signed16)VH2_4(imm) + 1) >> 1; - unsigned16 low = ((signed32)(signed16)VL2_4(rb) + (signed32)(signed16)VL2_4(imm) + 1) >> 1; - WRITE32_QUEUE (ra, (high << 16) | low); - -_IALU1,01011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG2H -"avg2h r<RA>, r<RB>, r<RC>" - do_avg2h (_SD, Ra, Rb, Rc); -_IALU1,01011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG2H imm -"avg2h r<RA>, r<RB>, <imm>" - do_avg2h (_SD, Ra, Rb, immHL); -_IALU1,01011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG2H imm long -"avg2h r<RA>, r<RB>, <imm>" - do_avg2h (_SD, Ra, Rb, imm); - - - -// BCLR - -_LOGIC,00011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BCLR -"bclr r<RA>, r<RB>, r<RC>" - WRITE32_QUEUE(Ra, Rb & ~BIT32((Rc) % 32)); -_LOGIC,00011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BCLR imm -"bclr r<RA>, r<RB>, <imm>" - WRITE32_QUEUE(Ra, Rb & ~BIT32((imm) % 32)); - - - -// BNOT - -_LOGIC,00001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BNOT -"bnot r<RA>, r<RB>, r<RC>" - WRITE32_QUEUE (Ra, Rb ^ BIT32((Rc) % 32)); -_LOGIC,00001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BNOT imm -"bnot r<RA>, r<RB>, <imm>" - WRITE32_QUEUE (Ra, Rb ^ BIT32((imm) % 32)); - - - -// BRA - -_BRA,00000,00,6.**,6.**,6.RC:BRA:short:mu:BRA -"bra r<RC>" - nia = cia + pcdisp; -_BRA,00000,10,_IMM18:BRA:short:mu:BRA imm -"bra <pcdisp>" - nia = cia + pcdisp; -_BRA,00000,10,6.**,6.**,_IMM32:BRA:long:mu:BRA imm long -"bra <pcdisp>" - nia = cia + pcdisp; - - - -// BRATNZ - -_BRA,00100,01,6.RA,6.**,6.RC:BRA:short:mu:BRATNZ -"bratnz r<RC>" - if (*Ra != 0) - nia = cia + pcdisp; -_BRA,00100,11,6.RA,_IMM12:BRA:short:mu:BRATNZ imm -"bratnz <pcdisp>" - if (*Ra != 0) - nia = cia + pcdisp; -_BRA,00100,11,6.RA,6.**,_IMM32:BRA:long:mu:BRATNZ imm long -"bratnz <pcdisp>" - if (*Ra != 0) - nia = cia + pcdisp; - - - -// BRATZR - -_BRA,00100,00,6.RA,6.**,6.RC:BRA:short:mu:BRATZR -"bratzr r<RC>" - if (val_Ra == 0) - nia = cia + pcdisp; -_BRA,00100,10,6.RA,_IMM12:BRA:short:mu:BRATZR imm -"bratzr <pcdisp>" - if (val_Ra == 0) - nia = cia + pcdisp; -_BRA,00100,10,6.RA,6.**,_IMM32:BRA:long:mu:BRATZR imm long -"bratzr <pcdisp>" - if (val_Ra == 0) - nia = cia + pcdisp; - - - -// BSET - -_LOGIC,00010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BSET -"bset r<RA>, r<RB>, r<RC>" - WRITE32_QUEUE (Ra, Rb | BIT32((Rc) % 32)); -_LOGIC,00010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BSET imm -"bset r<RA>, r<RB>, <imm>" - WRITE32_QUEUE (Ra, Rb | BIT32((imm) % 32)); - - - -// BSR - -_BRA,00010,00,6.**,6.**,6.RC:BRA:short:mu:BSR -"bsr r<RC>" - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = cia + pcdisp; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; -_BRA,00010,10,_IMM18:BRA:short:mu:BSR imm -"bsr <pcdisp>" - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = cia + pcdisp; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; -_BRA,00010,10,6.**,6.**,_IMM32:BRA:long:mu:BSR imm long -"bsr <pcdisp>" - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = cia + pcdisp; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - - -// BSRTNZ - -_BRA,00110,01,6.RA,6.**,6.RC:BRA:short:mu:BSRTNZ -"bsrtnz r<RC>" - if (val_Ra != 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = cia + pcdisp; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } - -_BRA,00110,11,6.RA,_IMM12:BRA:short:mu:BSRTNZ imm -"bsrtnz <pcdisp>" - if (val_Ra != 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = cia + pcdisp; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } - -_BRA,00110,11,6.RA,6.**,_IMM32:BRA:long:mu:BSRTNZ imm long -"bsrtnz <pcdisp>" - if (val_Ra != 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = cia + pcdisp; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } - - -// BSRTZR - -_BRA,00110,00,6.RA,6.**,6.RC:BRA:short:mu:BSRTZR -"bsrtzr r<RC>" - if (val_Ra == 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = cia + pcdisp; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } - -_BRA,00110,10,6.RA,_IMM12:BRA:short:mu:BSRTZR imm -"bsrtzr <pcdisp>" - if (val_Ra == 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = cia + pcdisp; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } - -_BRA,00110,10,6.RA,6.**,_IMM32:BRA:long:mu:BSRTZR imm long -"bsrtzr <pcdisp>" - if (val_Ra == 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = cia + pcdisp; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } - - -// BTST - -_LOGIC,00000,00,***,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:BTST -"btst f<FA>, r<RB>, r<RC>" - int bit = (Rc) % 32; - PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit)); -_LOGIC,00000,10,***,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:BTST imm -"btst f<FA>, r<RB>, <imm>" - int bit = imm % 32; - PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit)); - - - -// CMPcc - -void::function::do_cmp_cc:int cc, int fa, signed32 rb, signed32 rc - int value = 0; - switch (cc) { - case 0: /* EQ */ - value = (rb == rc); - break; - case 1: /* NE */ - value = (rb != rc); - break; - case 2: /* GT */ - value = (rb > rc); - break; - case 3: /* GE */ - value = (rb >= rc); - break; - case 4: /* LT */ - value = (rb < rc); - break; - case 5: /* LE */ - value = (rb <= rc); - break; - case 6: /* PS */ - value = ((rb >= 0) && (rc >= 0)); - break; - case 7: /* NG */ - value = ((rb < 0) && (rc < 0)); - break; - default: - sim_engine_abort (SD, CPU, cia, "do_cmp_cc - internal error - bad switch (%d)", cc); - } - PSW_FLAG_SET_QUEUE(fa, value); - -::%s::ccc:int ccc - switch (ccc) - { - case 0: return "eq"; - case 1: return "ne"; - case 2: return "gt"; - case 3: return "ge"; - case 4: return "lt"; - case 5: return "le"; - case 6: return "ps"; - case 7: return "ng"; - default: return "?"; - } - -_LOGIC,01100,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPcc -"cmp%s<ccc> f<FA>, r<RB>, r<RC>" - do_cmp_cc(_SD, ccc, FA, Rb, Rc); -_LOGIC,01100,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPcc imm -"cmp%s<ccc> f<FA>, r<RB>, <imm>" - do_cmp_cc(_SD, ccc, FA, Rb, imm); -_LOGIC,01100,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPcc imm long -"cmp%s<ccc> f<FA>, r<RB>, <imm>" - do_cmp_cc(_SD, ccc, FA, Rb, imm); - - - -// CMPUcc - -void::function::do_cmpu_cc:int cc, int fa, unsigned32 rb, unsigned32 rc - int value = 0; - switch (cc) { - case 2: /* GT */ - value = (rb > rc); - break; - case 3: /* GE */ - value = (rb >= rc); - break; - case 4: /* LT */ - value = (rb < rc); - break; - case 5: /* LE */ - value = (rb <= rc); - break; - default: - sim_engine_abort (SD, CPU, cia, "do_cmpu_cc - internal error - bad switch (%d)", cc); - } - PSW_FLAG_SET_QUEUE(fa, value); - -_LOGIC,01101,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPUcc -"cmpu%s<ccc> f<FA>, r<RB>, r<RC>" - do_cmpu_cc(_SD, ccc, FA, Rb, Rc); -_LOGIC,01101,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPUcc imm -"cmpu%s<ccc> f<FA>, r<RB>, <imm>" - do_cmpu_cc(_SD, ccc, FA, Rb, imm_6u); -_LOGIC,01101,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPUcc imm long -"cmpu%s<ccc> f<FA>, r<RB>, <imm>" - do_cmpu_cc(_SD, ccc, FA, Rb, imm); - - - -// DBRA - -void::function::do_dbra:address_word pcdisp, unsigned32 ra - PSW_SET_QUEUE (PSW_RP, 1); - WRITE32_QUEUE (&RPT_C, 1); - WRITE32_QUEUE (&RPT_S, cia + pcdisp); - WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7)); - -_BRA,10000,00,6.RA,6.**,6.RC:BRA:short:mu:DBRA -"dbra r<RA>, r<RC>" - do_dbra(_SD, pcdisp, val_Ra); -_BRA,10000,10,6.RA,_IMM12:BRA:short:mu:DBRA imm -"dbra r<RA>, <pcdisp>" - do_dbra(_SD, pcdisp, val_Ra); -_BRA,10000,10,6.RA,6.**,_IMM32:BRA:long:mu:DBRA imm long -"dbra r<RA>, <pcdisp>" - do_dbra(_SD, pcdisp, val_Ra); - - - -// DBRAI - -void::function::do_dbrai:address_word pcdisp, unsigned32 imm - PSW_SET_QUEUE (PSW_RP, 1); - WRITE32_QUEUE (&RPT_C, 1); - WRITE32_QUEUE (&RPT_S, cia + pcdisp); - WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); - -_BRA,10100,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBRAI -"dbrai <IMM_6>, r<RC>" - do_dbrai(_SD, pcdisp, IMM_6); -_BRA,10100,10,6.IMM_6,_IMM12:BRA:short:mu:DBRAI imm -"dbrai <IMM_6>, <pcdisp>" - do_dbrai(_SD, pcdisp, IMM_6); -_BRA,10100,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBRAI imm long -"dbrai <IMM_6>, <pcdisp>" - do_dbrai(_SD, pcdisp, IMM_6); - - - -// DBSR - -void::function::do_dbsr:address_word pcdisp, unsigned32 ra - PSW_SET_QUEUE (PSW_RP, 1); - WRITE32_QUEUE (&RPT_C, 1); - WRITE32_QUEUE (&RPT_S, cia + pcdisp); - WRITE32_QUEUE (&RPT_E, cia + ra); - WRITE32_QUEUE (&GPR[62], cia + ra + 8); - -_BRA,10010,00,6.RA,6.**,6.RC:BRA:short:mu:DBSR -"dbsr r<RA>, r<RC>" - do_dbsr(_SD, pcdisp, val_Ra); -_BRA,10010,10,6.RA,_IMM12:BRA:short:mu:DBSR imm -"dbsr r<RA>, <pcdisp>" - do_dbsr(_SD, pcdisp, val_Ra); -_BRA,10010,10,6.RA,6.**,_IMM32:BRA:long:mu:DBSR imm long -"dbsr r<RA>, <pcdisp>" - do_dbsr(_SD, pcdisp, val_Ra); - - - -// DBSRI - -void::function::do_dbsri:address_word pcdisp, unsigned32 imm - PSW_SET_QUEUE (PSW_RP, 1); - WRITE32_QUEUE (&RPT_C, 1); - WRITE32_QUEUE (&RPT_S, cia + pcdisp); - WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); - WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8); - -_BRA,10110,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBSRI -"dbsri <IMM_6>, r<RC>" - do_dbsri(_SD, pcdisp, IMM_6); -_BRA,10110,10,6.IMM_6,_IMM12:BRA:short:mu:DBSRI imm -"dbsri <IMM_6>, <pcdisp>" - do_dbsri(_SD, pcdisp, IMM_6); -_BRA,10110,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBSRI imm long -"dbsri <IMM_6>, <pcdisp>" - do_dbsri(_SD, pcdisp, IMM_6); - - - -// DBT - - -_BRA,01011,00,6.**,6.**,6.**:BRA:short:mu:DBT -"dbt" - if (cia == RPT_E && PSW_VAL (PSW_RP)) - { - WRITE32_QUEUE (&DPC, RPT_S); - if (RPT_C == 0) - PSW_SET (PSW_RP, 0); - } - else - WRITE32_QUEUE (&DPC, cia + 8); - DID_TRAP = 2; - nia = 0xfffff120; /* debug_trap_address */ - -// DJMP - -void::function::do_djmp:address_word pcdisp, unsigned32 ra - PSW_SET_QUEUE (PSW_RP, 1); - WRITE32_QUEUE (&RPT_C, 1); - WRITE32_QUEUE (&RPT_S, pcdisp); - WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7)); - -_BRA,10001,00,6.RA,6.**,6.RC:BRA:short:mu:DJMP -"djmp r<RA>, r<RC>" - do_djmp(_SD, pcdisp, val_Ra); -_BRA,10001,10,6.RA,_IMM12:BRA:short:mu:DJMP imm -"djmp r<RA>, <pcdisp>" - do_djmp(_SD, pcdisp, val_Ra); -_BRA,10001,10,6.RA,6.**,_IMM32:BRA:long:mu:DJMP imm long -"djmp r<RA>, <pcdisp>" - do_djmp(_SD, pcdisp, val_Ra); - - - -// DJMPI - -void::function::do_djmpi:address_word pcdisp, unsigned32 imm - PSW_SET_QUEUE (PSW_RP, 1); - WRITE32_QUEUE (&RPT_C, 1); - WRITE32_QUEUE (&RPT_S, pcdisp); - WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); - -_BRA,10101,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJMPI -"djmpi <IMM_6>, r<RC>" - do_djmpi(_SD, pcdisp, IMM_6); -_BRA,10101,10,6.IMM_6,_IMM12:BRA:short:mu:DJMPI imm -"djmpi <IMM_6>, <pcdisp>" - do_djmpi(_SD, pcdisp, IMM_6); -_BRA,10101,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJMPI imm long -"djmpi <IMM_6>, <pcdisp>" - do_djmpi(_SD, pcdisp, IMM_6); - - - -// DJSR - -void::function::do_djsr:address_word pcdisp, unsigned32 ra - PSW_SET_QUEUE (PSW_RP, 1); - WRITE32_QUEUE (&RPT_C, 1); - WRITE32_QUEUE (&RPT_S, pcdisp); - WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7)); - WRITE32_QUEUE (&GPR[62], cia + (ra & ~0x7) + 8); - -_BRA,10011,00,6.RA,6.**,6.RC:BRA:short:mu:DJSR -"djsr r<RA>, r<RC>" - do_djsr(_SD, pcdisp, val_Ra); -_BRA,10011,10,6.RA,_IMM12:BRA:short:mu:DJSR imm -"djsr r<RA>, <pcdisp>" - do_djsr(_SD, pcdisp, val_Ra); -_BRA,10011,10,6.RA,6.**,_IMM32:BRA:long:mu:DJSR imm long -"djsr r<RA>, <pcdisp>" - do_djsr(_SD, pcdisp, val_Ra); - - - -// DJSRI - -void::function::do_djsri:address_word pcdisp, unsigned32 imm - PSW_SET_QUEUE (PSW_RP, 1); - WRITE32_QUEUE (&RPT_C, 1); - WRITE32_QUEUE (&RPT_S, pcdisp); - WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); - WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8); - -_BRA,10111,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJSRI -"djsri <IMM_6>, r<RC>" - do_djsri(_SD, pcdisp, IMM_6); -_BRA,10111,10,6.IMM_6,_IMM12:BRA:short:mu:DJSRI imm -"djsri <IMM_6>, <pcdisp>" - do_djsri(_SD, pcdisp, IMM_6); -_BRA,10111,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJSRI imm long -"djsri <IMM_6>, <pcdisp>" - do_djsri(_SD, pcdisp, IMM_6); - - - -// JMP - -_BRA,00001,00,6.**,6.**,6.RC:BRA:short:mu:JMP -"jmp r<RC>" - nia = pcaddr; - if (RC == 62 && TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_RETURN; -_BRA,00001,10,_IMM18:BRA:short:mu:JMP imm -"jmp <pcdisp>" - nia = pcaddr; -_BRA,00001,10,6.**,6.**,_IMM32:BRA:long:mu:JMP imm long -"jmp <pcdisp>" - nia = pcaddr; - - - -// JMPTNZ - -_BRA,00101,01,6.RA,6.**,6.RC:BRA:short:mu:JMPTNZ -"jmptnz r<RC>" - if (val_Ra != 0) - nia = pcaddr; -_BRA,00101,11,6.RA,_IMM12:BRA:short:mu:JMPTNZ imm -"jmptnz <pcdisp>" - if (val_Ra != 0) - nia = pcaddr; -_BRA,00101,11,6.RA,6.**,_IMM32:BRA:long:mu:JMPTNZ imm long -"jmptnz <pcdisp>" - if (val_Ra != 0) - nia = pcaddr; - - - -// JMPTZR - -_BRA,00101,00,6.RA,6.**,6.RC:BRA:short:mu:JMPTZR -"jmptzr r<RC>" - if (val_Ra == 0) - nia = pcaddr; -_BRA,00101,10,6.RA,_IMM12:BRA:short:mu:JMPTZR imm -"jmptzr <pcdisp>" - if (val_Ra == 0) - nia = pcaddr; -_BRA,00101,10,6.RA,6.**,_IMM32:BRA:long:mu:JMPTZR imm long -"jmptzr <pcdisp>" - if (val_Ra == 0) - nia = pcaddr; - - - -// JOINpp - -void::function::do_join_pp:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src - switch (pp) { - case 0x0: /* LL */ - WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VL2_4(src)); - break; - case 0x1: /* LH */ - WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VH2_4(src)); - break; - case 0x2: /* HL */ - WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VL2_4(src)); - break; - case 0x3: /* HH */ - WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VH2_4(src)); - break; - } - -::%s::pp:int pp - switch (pp) - { - case 0x0: return "ll"; - case 0x1: return "lh"; - case 0x2: return "hl"; - case 0x3: return "hh"; - default: return "?"; - } - -_IALU1,011,pp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:JOINpp -"join%s<pp> r<RA>, r<RB>, r<RC>" - do_join_pp(_SD, pp, Ra, Rb, Rc); -_IALU1,011,pp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:JOINpp imm -"join%s<pp> r<RA>, r<RB>, <imm>" - do_join_pp(_SD, pp, Ra, Rb, immHL); -_IALU1,011,pp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:JOINpp imm long -"join%s<pp> r<RA>, r<RB>, <imm>" - do_join_pp(_SD, pp, Ra, Rb, immHL); - - - -// JSR - -_BRA,00011,00,6.**,6.**,6.RC:BRA:short:mu:JSR -"jsr r<RC>" - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - return pcaddr; -_BRA,00011,10,_IMM18:BRA:short:mu:JSR imm -"jsr <pcdisp>" - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - return pcaddr; -_BRA,00011,10,6.**,6.**,_IMM32:BRA:long:mu:JSR imm long -"jsr <pcdisp>" - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - return pcaddr; - - -// JSRTNZ - -_BRA,00111,01,6.RA,6.**,6.RC:BRA:short:mu:JSRTNZ -"jsrtnz r<RC>" - if (val_Ra != 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = pcaddr; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } -_BRA,00111,11,6.RA,_IMM12:BRA:short:mu:JSRTNZ imm -"jsrtnz <pcdisp>" - if (val_Ra != 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = pcaddr; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } -_BRA,00111,11,6.RA,6.**,_IMM32:BRA:long:mu:JSRTNZ imm long -"jsrtnz <pcdisp>" - if (val_Ra != 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = pcaddr; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } - - - -// JSRTZR - -_BRA,00111,00,6.RA,6.**,6.RC:BRA:short:mu:JSRTZR -"jsrtzr r<RC>" - if (val_Ra == 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = pcaddr; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } -_BRA,00111,10,6.RA,_IMM12:BRA:short:mu:JSRTZR imm -"jsrtzr <pcdisp>" - if (val_Ra == 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = pcaddr; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } -_BRA,00111,10,6.RA,6.**,_IMM32:BRA:long:mu:JSRTZR imm long -"jsrtzr <pcdisp>" - if (val_Ra == 0) { - if (cia == RPT_E && PSW_VAL (PSW_RP)) - WRITE32_QUEUE (&GPR[62], RPT_S); - else - WRITE32_QUEUE (&GPR[62], cia + 8); - nia = pcaddr; - if (TRACE_CALL_P) - TRACE_ACTION |= TRACE_ACTION_CALL; - } - - - -// Post increment - -void::function::do_incr:int x, unsigned32 *rb, int delta - unsigned32 next_rb; - if (x == 1) - next_rb = *rb + delta; - else if (x == 3) - next_rb = *rb - delta; - else - next_rb = *rb; /* value not used */ - /* HW erratum: check value after incrementing */ - if (next_rb == MOD_E - && (x == 1 || x == 3) - && (PSW_VAL(PSW_MD))) { - WRITE32_QUEUE (rb, MOD_S); - } - else if (x == 1 || x == 3) - WRITE32_QUEUE (rb, next_rb); - -// LD2H - -int::function::make_even_reg:int reg, const char *name - if (reg & 1) - sim_engine_abort (SD, CPU, cia, - "0x%lx:%s odd register (r%d) used in multi-word load/mulx2h", - (long) cia, name, reg); - return reg; - -void::function::do_ld2h:int ra, unsigned32 rb, unsigned32 src - signed32 mem; - ra = make_even_reg(_SD, ra, "LD2H"); - mem = MEM(signed, rb + src, 4); - if (ra != 0) - { - WRITE32_QUEUE (&GPR[ra + 0], SEXT32(EXTRACTED32(mem, 0, 15), 16)); - WRITE32_QUEUE (&GPR[ra + 1], SEXT32(EXTRACTED32(mem, 16, 31), 16)); - } - -::%s::XX:int XX - switch (XX) - { - case 0: return ""; - case 1: return "+"; - case 3: return "-"; - default: return "?"; - } - -_IMEM,00011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD2H -"ld2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"ld2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_ld2h(_SD, RA, Rb, src); - do_incr(_SD, XX, &GPR[RB], 4); -_IMEM,00011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD2H long -"ld2h r<RA>, @(r<RB>, <imm>)" - do_ld2h(_SD, RA, Rb, imm); - - - -// LD2W - -void::function::do_ld2w:int ra, unsigned32 rb, unsigned32 src - unsigned64 mem; - ra = make_even_reg(_SD, ra, "LD2W"); - mem = MEM(unsigned, rb + src, 8); - if (ra != 0) - { - WRITE32_QUEUE (&GPR[ra + 0], EXTRACTED64 (mem, 0, 31)); - WRITE32_QUEUE (&GPR[ra + 1], EXTRACTED64 (mem, 32, 63)); - } - -_IMEM,00110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:L2W -"ld2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"ld2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_ld2w(_SD, RA, Rb, src); - do_incr(_SD, XX, &GPR[RB], 8); -_IMEM,00110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:L2W long -"ld2w r<RA>, @(r<RB>, <imm>)" - do_ld2w(_SD, RA, Rb, imm); - - - -// LD4BH - -void::function::do_ld4bh:unsigned32 ra, unsigned32 rb, unsigned32 src - unsigned16 l1, l2, h1, h2; - unsigned32 mem; - ra = make_even_reg(_SD, ra, "LD4BH"); - mem = MEM(unsigned, rb + src, 4); - h1 = SEXT16(EXTRACTED32(mem, 0, 7), 8); - l1 = SEXT16(EXTRACTED32(mem, 8, 15), 8); - h2 = SEXT16(EXTRACTED32(mem, 16, 23), 8); - l2 = SEXT16(EXTRACTED32(mem, 24, 31), 8); - if (ra != 0) - { - WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1); - WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2); - } - -_IMEM,00101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BH -"ld4bh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"ld4bh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_ld4bh(_SD, RA, Rb, src); - do_incr(_SD, XX, &GPR[RB], 4); -_IMEM,00101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BH long -"ld4bh r<RA>, @(r<RB>, <imm>)" - do_ld4bh(_SD, RA, Rb, imm); - - - -// LD4BHU - -void::function::do_ld4bhu:unsigned32 ra, unsigned32 rb, unsigned32 src - unsigned16 l1, l2, h1, h2; - unsigned32 mem; - ra = make_even_reg(_SD, ra, "LD4BH"); - mem = MEM(signed, rb + src, 4); - h1 = EXTRACTED32(mem, 0, 7); - l1 = EXTRACTED32(mem, 8, 15); - h2 = EXTRACTED32(mem, 16, 23); - l2 = EXTRACTED32(mem, 24, 31); - if (ra != 0) - { - WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1); - WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2); - } - -_IMEM,01101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BHU -"ld4hbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"ld4hbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_ld4bhu(_SD, RA, Rb, src); - do_incr(_SD, XX, &GPR[RB], 4); -_IMEM,01101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BHU long -"ld4hbu r<RA>, @(r<RB>, <imm>)" - do_ld4bhu(_SD, RA, Rb, imm); - - - -// LDB - -void::function::do_ldb:unsigned32 *ra, unsigned32 rb, unsigned32 src - WRITE32_QUEUE (ra, MEM(signed, rb + src, 1)); - -_IMEM,00000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDB -"ldb r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"ldb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_ldb(_SD, Ra, Rb, src); - do_incr(_SD, XX, &GPR[RB], 1); -_IMEM,00000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDB long -"ldb r<RA>, @(r<RB>, <imm>)" - do_ldb(_SD, Ra, Rb, imm); - - - -// LDBU - -void::function::do_ldbu:unsigned32 *ra, unsigned32 rb, unsigned32 src - WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 1)); - -_IMEM,01001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDBU -"ldbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"ldbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_ldbu(_SD, Ra, Rb, src); - do_incr(_SD, XX, &GPR[RB], 1); -_IMEM,01001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDBU long -"ldbu r<RA>, @(r<RB>, <imm>)" - do_ldbu(_SD, Ra, Rb, imm); - - - -// LDH - -void::function::do_ldh:unsigned32 *ra, unsigned32 rb, unsigned32 src - WRITE32_QUEUE (ra, MEM(signed, rb + src, 2)); - -_IMEM,00010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDH -"ldh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"ldh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_ldh(_SD, Ra, Rb, src); - do_incr(_SD, XX, &GPR[RB], 2); -_IMEM,00010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDH long -"ldh r<RA>, @(r<RB>, <imm>)" - do_ldh(_SD, Ra, Rb, imm); - - - -// LDHH - -void::function::do_ldhh:unsigned32 *ra, unsigned32 rb, unsigned32 src - WRITE32_QUEUE (ra, MEM(signed, rb + src, 2) << 16); - -_IMEM,00001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHH -"ldhh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"ldhh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_ldhh(_SD, Ra, Rb, src); - do_incr(_SD, XX, &GPR[RB], 2); -_IMEM,00001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHH long -"ldhh r<RA>, @(r<RB>, <imm>)" - do_ldhh(_SD, Ra, Rb, imm); - - - -// LDHU - -void::function::do_ldhu:unsigned32 *ra, unsigned32 rb, unsigned32 src - WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 2)); - -_IMEM,01010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHU -"ldhu r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"ldhu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_ldhu(_SD, Ra, Rb, src); - do_incr(_SD, XX, &GPR[RB], 2); -_IMEM,01010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHU long -"ldhu r<RA>, @(r<RB>, <imm>)" - do_ldhu(_SD, Ra, Rb, imm); - - - -// LDW - -void::function::do_ldw:unsigned32 *ra, unsigned32 rb, unsigned32 src - WRITE32_QUEUE (ra, MEM(signed, rb + src, 4)); - -_IMEM,00100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDW -"ldw r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"ldw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_ldw(_SD, Ra, Rb, src); - do_incr(_SD, XX, &GPR[RB], 4); -_IMEM,00100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDW long -"ldw r<RA>, @(r<RB>, <imm>)" - do_ldw(_SD, Ra, Rb, imm); - - - -// MACa - -void::function::do_mac:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src - unsigned64 accum = *aa; - accum += (signed64) (rb) * (signed64) (src); - WRITE64_QUEUE (aa, accum); - WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63)); - -_IALU2,10100,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACa -"mac<AA> r<RA>, r<RB>, r<RC>" - do_mac(_SD, Aa, Ra, Rb, Rc); -_IALU2,10100,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACa imm -"mac<AA> r<RA>, r<RB>, <imm>" - do_mac(_SD, Aa, Ra, Rb, imm); - - - -// MACSa - -void::function::do_macs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src - unsigned64 accum = *aa; - accum += ((signed64) (rb) * (signed64) (src)) << 1; - WRITE64_QUEUE (aa, accum); - WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31)); - -_IALU2,10101,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACSa -"macs<AA> r<RA>, r<RB>, r<RC>" - do_macs(_SD, Aa, Ra, Rb, Rc); -_IALU2,10101,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACSa imm -"macs<AA> r<RA>, r<RB>, <imm>" - do_macs(_SD, Aa, Ra, Rb, imm); - - - -// MODDEC | MODINC - -_IMEM,00111,11,6.**,6.RB,_IMM6:IMEM:short:mu:MODDEC -"moddec r<RB>, <imm>" - do_incr(_SD, 3/*0b11*/, &GPR[RB], imm_5); -_IMEM,00111,01,6.**,6.RB,_IMM6:IMEM:short:mu:MODINC -"modinc r<RB>, <imm>" - do_incr(_SD, 1/*0b01*/, &GPR[RB], imm_5); - - - -// MSUBa - -void::function::do_msub:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src - unsigned64 accum = *aa; - accum -= (signed64) (rb) * (signed64) (src); - WRITE64_QUEUE (aa, accum); - WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63)); - -_IALU2,10110,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBa -"msub<AA> r<RA>, r<RB>, r<RC>" - do_msub(_SD, Aa, Ra, Rb, Rc); -_IALU2,10110,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBa imm -"msub<AA> r<RA>, r<RB>, <imm>" - do_msub(_SD, Aa, Ra, Rb, imm); - - - -// MSUBSa - -void::function::do_msubs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src - unsigned64 accum = *aa; - accum -= ((signed64) (rb) * (signed64) (src)) << 1; - WRITE64_QUEUE (aa, accum); - WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31)); - -_IALU2,10111,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBSa -"msubs<AA> r<RA>, r<RB>, r<RC>" - do_msubs(_SD, Aa, Ra, Rb, Rc); -_IALU2,10111,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBSa imm -"msubs<AA> r<RA>, r<RB>, <imm>" - do_msubs(_SD, Aa, Ra, Rb, imm); - - - -// MUL - -void::function::do_mul:unsigned32 *ra, unsigned32 rb, unsigned32 src - WRITE32_QUEUE (ra, rb * src); - -_IALU2,10000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL -"mul r<RA>, r<RB>, r<RC>" - do_mul(_SD, Ra, Rb, Rc); -_IALU2,10000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL imm -"mul r<RA>, r<RB>, <imm>" - do_mul(_SD, Ra, Rb, imm); - - - -// MUL2H - -void::function::do_mul2h:unsigned32 *ra, unsigned32 rb, unsigned32 src - unsigned16 high = VH2_4(rb) * VH2_4(src); - unsigned16 low = VL2_4(rb) * VL2_4(src); - WRITE32_QUEUE (ra, (high << 16) | low); - -_IALU2,00000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL2H -"mul2h r<RA>, r<RB>, r<RC>" - do_mul2h(_SD, Ra, Rb, Rc); -_IALU2,00000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL2H imm -"mul2h r<RA>, r<RB>, <imm>" - do_mul2h(_SD, Ra, Rb, immHL); - - - -// MULX - -void::function::do_mulx:unsigned64 *aa, signed32 rb, signed32 src - WRITE64_QUEUE (aa, (signed64) (rb) * (signed64) (src)); - -_IALU2,11000,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULX -"mulx a<AA>, r<RB>, r<RC>" - do_mulx(_SD, Aa, Rb, Rc); -_IALU2,11000,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULX imm -"mulx a<AA>, r<RB>, <imm>" - do_mulx(_SD, Aa, Rb, imm); - - -// MULX2H - -void::function::do_mulx2h:int ra, signed32 rb, signed32 src, int high - signed32 result = rb * src; - if (!high) - { - ra = make_even_reg(_SD, ra, "MULX2H"); - if (ra != 0) - WRITE32_QUEUE (&GPR[ra+1], result); - } - else if (ra != 0) - { - WRITE32_QUEUE (&GPR[ra+0], result); - } - -_IALU2,00001,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULX2H -"mul2h r<RA>, r<RB>, r<RC>" - do_mulx2h(_SD, RA, RbH, RcH, 1); - do_mulx2h(_SD, RA, RbL, RcL, 0); -_IALU2,00001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULX2H imm -"mul2h r<RA>, r<RB>, <imm>" - do_mulx2h(_SD, RA, RbH, imm, 1); - do_mulx2h(_SD, RA, RbL, imm, 0); - -// MULHXpp - -void::function::do_mulhx:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src - signed32 value = 0; - switch (pp) { - case 0: /* LL */ - value = SEXT32(VL2_4(rb), 16) * SEXT32(VL2_4(src), 16); - break; - case 1: /* LH */ - value = SEXT32(VL2_4(rb), 16) * SEXT32(VH2_4(src), 16); - break; - case 2: /* HL */ - value = SEXT32(VH2_4(rb), 16) * SEXT32(VL2_4(src), 16); - break; - case 3: /* HH */ - value = SEXT32(VH2_4(rb), 16) * SEXT32(VH2_4(src), 16); - break; - default: - sim_engine_abort (SD, CPU, cia, "do_mulhx - internal error - bad switch"); - } - WRITE32_QUEUE (ra, value); - -_IALU2,001,pp,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULHXpp -"mulhx%s<pp> r<RA>, r<RB>, r<RC>" - do_mulhx(_SD, pp, Ra, Rb, Rc); -_IALU2,001,pp,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULHXpp imm -"mulhx%s<pp> r<RA>, r<RB>, <imm>" - do_mulhx(_SD, pp, Ra, Rb, immHL); - - - -// MULXS - -void::function::do_mulxs:unsigned64 *aa, signed32 rb, signed32 src - WRITE64_QUEUE (aa, ((signed64) (rb) * (signed64) (src)) << 1); - -_IALU2,11001,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULXS -"mulxs a<AA>, r<RB>, r<RC>" - do_mulxs(_SD, Aa, Rb, Rc); -_IALU2,11001,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULXS imm -"mulxs a<AA>, r<RB>, <imm>" - do_mulxs(_SD, Aa, Rb, imm); - - - -// MVFACC - -void::function::do_mvfacc:unsigned32 *ra, unsigned64 ab, unsigned32 src - while (src > 63) src -= 64; - WRITE32_QUEUE (ra, ((signed64)ab) >> src); - -_IALU2,11111,00,6.RA,5.*,1.AB,6.RC:IALU2:short:iu:MVFACC -"mvfacc r<RA>, a<AB>, r<RC>" - do_mvfacc(_SD, Ra, *Ab, Rc); -_IALU2,11111,10,6.RA,5.*,1.AB,_IMM6:IALU2:short:iu:MVFACC imm -"mvfacc r<RA>, a<AB>, <imm>" - do_mvfacc(_SD, Ra, *Ab, imm_6u); - - - -// MVFSYS - -_BRA,11110,00,6.RA,6.CR,6.ID:BRA:short:mu:MVFSYS -"mvfsys r<RA>, cr<CR>" - switch (ID) { - case 0: - if (CR >= NR_CONTROL_REGISTERS) - sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR"); - else - WRITE32_QUEUE (Ra, (CPU)->regs.control[CR]); - break; - case 1: - WRITE32_QUEUE (Ra, PSWL); - break; - case 2: - WRITE32_QUEUE (Ra, EXTRACTED32(PSWH, 16, 31)); - break; - case 3: - WRITE32_QUEUE (Ra, PSW_FLAG_VAL(CR)); - break; - default: - sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID"); - } - - - -// MVTACC - -_IALU2,01111,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MVTACC -"mvtacc a<AA>, r<RB>, r<RC>" - WRITE64_QUEUE (Aa, INSERTED64(RbU, 0, 31) | (RcU)); - - - -// MVTSYS - -_BRA,01110,00,6.CR,6.RB,6.ID:BRA:short:mu:MVTSYS -"mvtsys cr<CR>, r<RB>" - switch (ID) { - case 0: /* control register */ - if (CR >= NR_CONTROL_REGISTERS) - sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR"); - else - { - unsigned32 value = Rb; - CPU->mvtsys_left_p = 1; - if (CR == processor_status_word_cr) - { - unsigned32 ds = PSW & BIT32 (PSW_DS); /* preserve ds */ - value = ds | (value & PSW_VALID); - } - else if (CR == backup_processor_status_word_cr - || CR == debug_backup_processor_status_word_cr) - value &= DPSW_VALID; - else if (CR == eit_vector_base_cr) - value &= EIT_VALID; - WRITE32_QUEUE (&(CPU)->regs.control[CR], value); - } - break; - case 1: /* PSWL */ - WRITE32_QUEUE_MASK (&PSW, EXTRACTED32(Rb, 16, 31), - PSW_VALID & 0x0000ffff); - break; - case 2: /* PSWH */ - { - unsigned32 ds = PSW & BIT32 (PSW_DS); /* preserve ds */ - WRITE32_QUEUE_MASK (&PSW, (EXTRACTED32(Rb, 16, 31) << 16) | ds, - (PSW_VALID | ds) & 0xffff0000); - } - break; - case 3: /* FLAG */ - PSW_FLAG_SET_QUEUE(CR, Rb & 1); - break; - default: - sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID"); - } - - - -// NOP - -_BRA,01111,00,6.**,6.**,6.**:BRA:short:iu,mu:NOP -"nop" - /* NOP */; - - -// NOT - -_LOGIC,11001,00,6.RA,6.RB,6.*:LOGIC:short:iu,mu:NOT -"not r<RA>, r<RB>" - WRITE32_QUEUE (Ra, ~Rb); - - - -// NOTFG - -_LOGIC,01001,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:NOTFG -"notfg f<FA>, f<FB>" - PSW_FLAG_SET_QUEUE(FA, !PSW_FLAG_VAL(FB)); - - -// OR - -_LOGIC,11010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:OR -"or r<RA>, r<RB>, r<RC>" - WRITE32_QUEUE (Ra, Rb | Rc); -_LOGIC,11010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:OR imm -"or r<RA>, r<RB>, <imm>" - WRITE32_QUEUE (Ra, Rb | imm); -_LOGIC,11010,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:OR imm long -"or r<RA>, r<RB>, <imm>" - WRITE32_QUEUE (Ra, Rb | imm); - - - -// ORFG - -_LOGIC,01010,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:ORFG -"orfg f<FA>, f<FB>, f<FC>" - PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | PSW_FLAG_VAL(FC)); -_LOGIC,01010,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:ORFG imm -"orfg f<FA>, f<FB>, <imm>" - PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | (imm_6 & 1)); - - - -// REIT - -_BRA,01000,00,6.**,6.**,6.**:BRA:short:mu:REIT -"reit" - WRITE32_QUEUE (&PSW, bPSW); - nia = bPC; - - - - -// REPEAT - -void::function::do_repeat:unsigned32 count, address_word pcaddr - address_word rpt_s = cia + 8; - address_word rpt_e = cia + pcaddr; - - if (count == 0) - sim_engine_abort (SD, CPU, cia, "REPEAT with ra=0 and REPEATI with imm = 0 is forbidden."); - if (count > 1) - PSW_SET_QUEUE (PSW_RP, 1); - if (rpt_e < rpt_s + 0x10) - sim_io_eprintf (sd, "warning: 0x%lx: REPEAT or REPEATI loop is too small\n", (long) cia); - WRITE32_QUEUE (&RPT_C, count - 1); - WRITE32_QUEUE (&RPT_S, rpt_s); - WRITE32_QUEUE (&RPT_E, rpt_e); - -_BRA,11000,00,6.RA,6.**,6.RC:BRA:short:mu:REPEAT -"repeat r<RA>, r<RC>" - do_repeat(_SD, val_Ra, pcaddr); -_BRA,11000,10,6.RA,_IMM12:BRA:short:mu:REPEAT imm -"repeat r<RA>, <pcaddr>" - do_repeat(_SD, val_Ra, pcaddr); -_BRA,11000,10,6.RA,6.**,_IMM32:BRA:long:mu:REPEAT imm long -"repeat r<RA>, <pcaddr>" - do_repeat(_SD, val_Ra, pcaddr); - - - - -// REPEATI - -_BRA,11010,00,6.IMM_6,6.**,6.RC:BRA:short:mu:REPEATI -"repeati <IMM_6>, r<RC>" - do_repeat(_SD, IMM_6, pcaddr); -_BRA,11010,10,6.IMM_6,_IMM12:BRA:short:mu:REPEATI imm -"repeati <IMM_6>, <pcaddr>" - do_repeat(_SD, IMM_6, pcaddr); -_BRA,11010,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:REPEATI imm long -"repeati <IMM_6>, <pcaddr>" - do_repeat(_SD, IMM_6, pcaddr); - - - - -// RTD - -_BRA,01010,00,6.*,6.*,6.*:BRA:short:mu:RTD -"rtd" - WRITE32_QUEUE (&PSW, DPSW); - nia = DPC; - - - - -// ROT - -_LOGIC,10100,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT -"rot r<RA>, r<RB>, r<RC>" - WRITE32_QUEUE (Ra, ROT32(Rb, Rc & 0x1f)); -_LOGIC,10100,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT imm -"rot r<RA>, r<RB>, <imm>" - WRITE32_QUEUE (Ra, ROT32(Rb, imm & 0x1f)); - - - - -// ROT2H - -void::function::do_rot2h:unsigned32 *ra, unsigned32 rb, signed32 src - unsigned16 high = ROTR16(VH2_4(rb), VH2_4(src) & 0xf); - unsigned16 low = ROTR16(VL2_4(rb), VL2_4(src) & 0xf); - WRITE32_QUEUE (ra, (high << 16) | low); - -_LOGIC,10101,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT2H -"rot2h r<RA>, r<RB>, r<RC>" - do_rot2h(_SD, Ra, Rb, Rc); -_LOGIC,10101,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT2H imm -"rot2h r<RA>, r<RB>, <imm>" - do_rot2h(_SD, Ra, Rb, immHL); - - - - -// SAT - -void::function::do_sat:signed32 *ra, signed32 rb, signed32 src - int bits = LSMASKED32(src, 4, 0); /* 5 */ - signed32 sat = LSMASK32(bits, 0) >> 2; - signed32 nsat = ~sat; - signed32 value; - if (bits != src) - sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", (long) cia); - if (bits == 0) - value = rb; - else if (rb >= sat) - value = sat; - else if (rb <= nsat) - value = nsat; - else - value = rb; - WRITE32_QUEUE (ra, value); - -_IALU2,01000,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT -"sat r<RA>, r<RB>, r<RC>" - do_sat(_SD, Ra, Rb, Rc); -_IALU2,01000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT imm -"sat r<RA>, r<RB>, <imm>" - do_sat(_SD, Ra, Rb, imm_5); - - - - -// SAT2H - -void::function::do_sath:signed32 *ra, signed32 rb, signed32 src, int high, int updates_f4 - int bits = LSMASKED32(src, 4, 0); /* 5 */ - signed32 sat = LSMASK32(bits, 0) >> 2; - signed32 nsat = ~sat; - signed32 value; - if (bits != src) - sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", (long) cia); - if (bits == 0) - value = rb; - else if (rb >= sat) - value = sat; - else if (rb <= nsat) - value = nsat; - else - value = rb; - if (high) - WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); - else - WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); - if (updates_f4) - { - /* if MU instruction was a MVTSYS (lkr), unqueue register writes now */ - if(STATE_CPU (sd, 0)->mvtsys_left_p) - unqueue_writes (sd, STATE_CPU (sd, 0), cia); - PSW_FLAG_SET_QUEUE(PSW_S_FLAG, PSW_FLAG_VAL(PSW_S_FLAG) ^ (value & 1)); - } - -_IALU2,01001,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT2H -"sat2h r<RA>, r<RB>, r<RC>" - do_sath(_SD, Ra, RbH, RcH, 1, 0); - do_sath(_SD, Ra, RbL, RcL, 0, 0); -_IALU2,01001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT2H imm -"sat2h r<RA>, r<RB>, <imm>" - do_sath(_SD, Ra, RbH, imm_5, 1, 0); - do_sath(_SD, Ra, RbL, imm_5, 0, 0); - - - - -// SATHp - -::%s::p:int p - switch (p) - { - case 0: return "l"; - case 1: return "h"; - default: return "?"; - } - -_IALU2,1110,p,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATHP -"sath%s<p> r<RA>, r<RB>, r<RC>" - do_sath(_SD, Ra, Rb, Rc, p, 1); -_IALU2,1110,p,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATHP imm -"sath%s<p> r<RA>, r<RB>, <imm>" - do_sath(_SD, Ra, Rb, imm_5, p, 1); - - - -// SATZ - -void::function::do_satz:signed32 *ra, signed32 rb, signed32 src - if (rb < 0) - WRITE32_QUEUE (ra, 0); - else - do_sat (_SD, ra, rb, src); - -_IALU2,01010,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ -"satz r<RA>, r<RB>, r<RC>" - do_satz(_SD, Ra, Rb, Rc); -_IALU2,01010,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ imm -"satz r<RA>, r<RB>, <imm>" - do_satz(_SD, Ra, Rb, imm_5); - - - - -// SATZ2H - -void::function::do_satzh:signed32 *ra, signed16 rb, signed32 src, int high - int bits = LSMASKED32(src, 3, 0); /*4*/ - signed16 sat = LSMASK16(bits, 0) >> 2; - signed16 nsat = 0; - signed16 value; - if (bits != src) - sim_io_eprintf (sd, "warning: 0x%lx:SATZ2H bit overflow\n", (long) cia); - if (bits == 0 && rb > sat) - value = rb; - else if (rb > sat) - value = sat; - else if (rb < nsat) - value = nsat; - else - value = rb; - if (high) - WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); - else - WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); - - -_IALU2,01011,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ2H -"satz2h r<RA>, r<RB>, r<RC>" - do_satzh(_SD, Ra, RbH, RcH, 1); - do_satzh(_SD, Ra, RbL, RcL, 0); -_IALU2,01011,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ2H imm -"satz2h r<RA>, r<RB>, <imm>" - do_satzh(_SD, Ra, RbH, imm, 1); - do_satzh(_SD, Ra, RbL, imm, 0); - - - - -// SRA - -void::function::do_sra:unsigned32 *ra, unsigned32 rb, signed32 src - unsigned32 value; - while (src > 31) src -= 32; - while (src < -32) src += 32; - if (src >= 0) - value = (signed32)rb >> src; - else if (src == -32) - value = 0; - else - value = rb << -src; - WRITE32_QUEUE (ra, value); - -_LOGIC,10000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA -"sra r<RA>, r<RB>, r<RC>" - do_sra(_SD, Ra, Rb, Rc); -_LOGIC,10000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA imm -"sra r<RA>, r<RB>, <imm>" - do_sra(_SD, Ra, Rb, imm); - - - - -// SRAHp - -void::function::do_srah:unsigned32 *ra, unsigned32 rb, int src, int high - unsigned32 value; - while (src > 31) src -= 32; - while (src < -32) src += 32; - if (src >= 0) - value = (signed32)rb >> src; - else if (src == -32) - value = 0; - else - value = rb << -src; - if (high) - WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); - else - WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); - -_LOGIC,0010,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRAHP -"srah%s<p> r<RA>, r<RB>, r<RC>" - do_srah(_SD, Ra, Rb, Rc, p); -_LOGIC,0010,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRAHP imm -"srah%s<p> r<RA>, r<RB>, <imm>" - do_srah(_SD, Ra, Rb, imm, p); - - - - -// SRA2H - -_LOGIC,10001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA2H -"sra2h r<RA>, r<RB>, r<RC>" - signed32 srcH = RcH; - signed32 srcL = RcL; - while (srcH > 15) srcH -= 16; - while (srcH < -16) srcH += 16; - while (srcL > 15) srcL -= 16; - while (srcL < -16) srcL += 16; - do_srah(_SD, Ra, RbH, srcH, 1); - do_srah(_SD, Ra, RbL, srcL, 0); -_LOGIC,10001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA2H imm -"sra2h r<RA>, r<RB>, <imm>" - signed32 src = imm; - while (src > 15) src -= 16; - while (src < -16) src += 16; - do_srah(_SD, Ra, RbH, src, 1); - do_srah(_SD, Ra, RbL, src, 0); - - - - -// SRC - -void::function::do_src:unsigned32 *ra, unsigned32 rb, int src - unsigned32 value; - unsigned64 operand; - unsigned64 shifted; - while (src > 31) src -= 32; - while (src < -32) src += 32; - if (src >= 0) - { - operand = (INSERTED64(rb, 0, 31) | INSERTED64(*ra, 32, 63)); - shifted = operand >> src; - value = EXTRACTED64(shifted, 32, 63); - } - else - { - operand = (INSERTED64(*ra, 0, 31) | INSERTED64(rb, 32, 63)); - shifted = operand << -src; - value = EXTRACTED64(shifted, 0, 31); - } - WRITE32_QUEUE (ra, value); - -_LOGIC,10110,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRC -"src r<RA>, r<RB>, r<RC>" - do_src(_SD, Ra, Rb, Rc); -_LOGIC,10110,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRC imm -"src r<RA>, r<RB>, <imm>" - do_src(_SD, Ra, Rb, imm); - - - - -// SRL - -void::function::do_srl:unsigned32 *ra, unsigned32 rb, int src - unsigned32 value; - while (src > 31) src -= 32; - while (src < -32) src += 32; - if (src >= 0) - value = (unsigned32)rb >> src; - else if (src == -32) - value = 0; - else - value = (unsigned32)rb << -src; - WRITE32_QUEUE (ra, value); - -_LOGIC,10010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL -"srl r<RA>, r<RB>, r<RC>" - do_srl(_SD, Ra, Rb, Rc); -_LOGIC,10010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL imm -"srl r<RA>, r<RB>, <imm>" - do_srl(_SD, Ra, Rb, imm); - - - - -// SRLHp - -void::function::do_srlh:unsigned32 *ra, unsigned32 rb, int src, int high - unsigned32 value; - while (src > 31) src -= 32; - while (src < -32) src += 32; - if (src >= 0) - value = rb >> src; - else if (src == -32) - value = 0; - else - value = rb << -src; - if (high) - WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); - else - WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); - -_LOGIC,0011,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRLHP -"srlh%s<p> r<RA>, r<RB>, r<RC>" - do_srlh(_SD, Ra, Rb, Rc, p); -_LOGIC,0011,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRLHP imm -"srlh%s<p> r<RA>, r<RB>, <imm>" - do_srlh(_SD, Ra, Rb, imm, p); - - -// SRL2H - -_LOGIC,10011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL2H -"srl2h r<RA>, r<RB>, r<RC>" - signed32 srcH = RcH; - signed32 srcL = RcL; - while (srcH > 15) srcH -= 16; - while (srcH < -16) srcH += 16; - while (srcL > 15) srcL -= 16; - while (srcL < -16) srcL += 16; - do_srlh(_SD, Ra, RbHU, srcH, 1); - do_srlh(_SD, Ra, RbLU, srcL, 0); -_LOGIC,10011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL2H imm -"srl2h r<RA>, r<RB>, <imm>" - signed32 src = imm; - while (src > 15) src -= 16; - while (src < -16) src += 16; - do_srlh(_SD, Ra, RbHU, src, 1); - do_srlh(_SD, Ra, RbLU, src, 0); - - - - -// ST2H - -void::function::get_even_reg:int *reg, unsigned32 *r0, const char *name - if (*reg & 1) - sim_engine_abort (SD, CPU, cia, - "0x%lx:%s odd register (r%d) used in multi-word store", - (long) cia, name, *reg); - if (*reg == 0) - *r0 = 0; - else - *r0 = GPR[*reg]; - -void::function::do_st2h:int ra, unsigned32 rb, unsigned32 src - unsigned32 val_ra; - unsigned32 mem; - get_even_reg(_SD, &ra, &val_ra, "ST2H"); - mem = INSERTED32(val_ra, 0, 15) | - INSERTED32(GPR[ra + 1], 16, 31); - STORE(rb + src, 4, mem); - -_IMEM,10011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2H -"st2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"st2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_st2h(_SD, RA, Rb, src); - do_incr(_SD, XX, &GPR[RB], 4); -_IMEM,10011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2H long -"st2h r<RA>, @(r<RB>, <imm>)" - do_st2h(_SD, RA, Rb, imm); - - - -// ST2W - -void::function::do_st2w:int ra, unsigned32 rb, unsigned32 src - unsigned32 val_ra; - unsigned64 mem; - get_even_reg(_SD, &ra, &val_ra, "ST2W"); - mem = INSERTED64(val_ra, 0, 31) | INSERTED64(GPR[ra + 1], 32, 63); - STORE(rb + src, 8, mem); - -_IMEM,10110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2W -"st2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"st2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_st2w(_SD, RA, Rb, src); - do_incr(_SD, XX, &GPR[RB], 8); -_IMEM,10110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2W long -"st2w r<RA>, @(r<RB>, <imm>)" - do_st2w(_SD, RA, Rb, imm); - - - -// ST4HB - -void::function::do_st4hb:int ra, unsigned32 rb, unsigned32 src - unsigned32 val_ra; - unsigned32 mem; - get_even_reg(_SD, &ra, &val_ra, "ST4HB"); - mem = INSERTED32(EXTRACTED32(val_ra, 8, 15), 0, 7) | - INSERTED32(EXTRACTED32(val_ra, 24, 31), 8, 15) | - INSERTED32(EXTRACTED32(GPR[ra + 1], 8, 15), 16, 23) | - INSERTED32(EXTRACTED32(GPR[ra + 1], 24, 31), 24, 31); - STORE(rb + src, 4, mem); - -_IMEM,10101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST4HB -"st4hb r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"st4hb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_st4hb(_SD, RA, Rb, src); - do_incr(_SD, XX, &GPR[RB], 4); -_IMEM,10101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST4HB long -"st4hb r<RA>, @(r<RB>, <imm>)" - do_st4hb(_SD, RA, Rb, imm); - - - -// STB - -void::function::do_stb:unsigned32 ra, unsigned32 rb, unsigned32 src - STORE(rb + src, 1, EXTRACTED32(ra, 24, 31)); - -_IMEM,10000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STB -"stb r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"stb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_stb(_SD, val_Ra, Rb, src); - do_incr(_SD, XX, &GPR[RB], 1); -_IMEM,10000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STB long -"stb r<RA>, @(r<RB>, <imm>)" - do_stb(_SD, val_Ra, Rb, imm); - - - -// STH - -void::function::do_sth:unsigned32 ra, unsigned32 rb, unsigned32 src - STORE(rb + src, 2, EXTRACTED32(ra, 16, 31)); - -_IMEM,10010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STH -"sth r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"sth r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_sth(_SD, val_Ra, Rb, src); - do_incr(_SD, XX, &GPR[RB], 2); -_IMEM,10010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STH long -"sth r<RA>, @(r<RB>, <imm>)" - do_sth(_SD, val_Ra, Rb, imm); - - - -// STHH - -void::function::do_sthh:unsigned32 ra, unsigned32 rb, unsigned32 src - STORE(rb + src, 2, EXTRACTED32(ra, 0, 15)); - -_IMEM,10001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STHH -"sthh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"sthh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_sthh(_SD, val_Ra, Rb, src); - do_incr(_SD, XX, &GPR[RB], 2); -_IMEM,10001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STHH long -"sthh r<RA>, @(r<RB>, <imm>)" - do_sthh(_SD, val_Ra, Rb, imm); - - - -// STW - -void::function::do_stw:unsigned32 ra, unsigned32 rb, unsigned32 src - STORE(rb + src, 4, ra); - -_IMEM,10100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STW -"stw r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -"stw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" - do_stw(_SD, val_Ra, Rb, src); - do_incr(_SD, XX, &GPR[RB], 4); -_IMEM,10100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STW long -"stw r<RA>, @(r<RB>, <imm>)" - do_stw(_SD, val_Ra, Rb, imm); - - - -// SUB - -void::function::do_sub:unsigned32 *ra, unsigned32 rb, unsigned32 imm - ALU_BEGIN(rb); - ALU_SUBB(imm); - ALU_END(ra); - -_IALU1,00010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB -"sub r<RA>, r<RB>, r<RC>" - do_sub (_SD, Ra, Rb, Rc); -_IALU1,00010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB imm -"sub r<RA>, r<RB>, <imm>" - do_sub (_SD, Ra, Rb, imm); -_IALU1,00010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB imm long -"sub r<RA>, r<RB>, <imm>" - do_sub (_SD, Ra, Rb, imm); - - - -// SUB2H - -void::function::do_sub2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm - unsigned16 high = VH2_4(rb) - VH2_4(imm); - unsigned16 low = VL2_4(rb) - VL2_4(imm); - WRITE32_QUEUE (ra, (high << 16) | low); - -_IALU1,00011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB2H -"sub2h r<RA>, r<RB>, r<RC>" - do_sub2h (_SD, Ra, Rb, Rc); -_IALU1,00011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB2H imm -"sub2h r<RA>, r<RB>, <imm>" - do_sub2h (_SD, Ra, Rb, immHL); -_IALU1,00011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB2H imm long -"sub2h r<RA>, r<RB>, <imm>" - do_sub2h (_SD, Ra, Rb, imm); - - - -// SUBB - -void::function::do_subb:unsigned32 *ra, unsigned32 rb, unsigned32 imm - ALU_BEGIN(rb); - ALU_SUBB_B(imm, ALU_CARRY); - ALU_END(ra); - -_IALU1,00101,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBB -"subb r<RA>, r<RB>, r<RC>" - do_subb (_SD, Ra, Rb, Rc); -_IALU1,00101,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBB imm -"subb r<RA>, r<RB>, <imm>" - do_subb (_SD, Ra, Rb, imm); -_IALU1,00101,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBB imm long -"subb r<RA>, r<RB>, <imm>" - do_subb (_SD, Ra, Rb, imm); - - - -// SUBHppp - -void::function::do_subh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src - switch (ppp) { - case 0x0: /* LLL */ - { - ALU16_BEGIN(VL2_4(rb)); - ALU16_SUBB(VL2_4(src)); - ALU16_END(ra, 0); - } - break; - case 0x1: /* LLH */ - { - ALU16_BEGIN(VL2_4(rb)); - ALU16_SUBB(VH2_4(src)); - ALU16_END(ra, 0); - } - break; - case 0x2: /* LHL */ - { - ALU16_BEGIN(VH2_4(rb)); - ALU16_SUBB(VL2_4(src)); - ALU16_END(ra, 0); - } - break; - case 0x3: /* LHH */ - { - ALU16_BEGIN(VH2_4(rb)); - ALU16_SUBB(VH2_4(src)); - ALU16_END(ra, 0); - } - break; - case 0x4: /* HLL */ - { - ALU16_BEGIN(VL2_4(rb)); - ALU16_SUBB(VL2_4(src)); - ALU16_END(ra, 1); - } - break; - case 0x5: /* HLH */ - { - ALU16_BEGIN(VL2_4(rb)); - ALU16_SUBB(VH2_4(src)); - ALU16_END(ra, 1); - } - break; - case 0x6: /* HHL */ - { - ALU16_BEGIN(VH2_4(rb)); - ALU16_SUBB(VL2_4(src)); - ALU16_END(ra, 1); - } - break; - case 0x7: /* HHH */ - { - ALU16_BEGIN(VH2_4(rb)); - ALU16_SUBB(VH2_4(src)); - ALU16_END(ra, 1); - } - break; - default: - sim_engine_abort (SD, CPU, cia, "do_subh_ppp - internal error - bad switch"); - } - -_IALU1,11,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBHppp -"subh%s<ppp> r<RA>, r<RB>, r<RC>" - do_subh_ppp(_SD, ppp, Ra, Rb, Rc); -_IALU1,11,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBHppp imm -"subh%s<ppp> r<RA>, r<RB>, <imm>" - do_subh_ppp(_SD, ppp, Ra, Rb, immHL); -_IALU1,11,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBHppp imm long -"subh%s<ppp> r<RA>, r<RB>, <imm>" - do_subh_ppp(_SD, ppp, Ra, Rb, imm); - - - -// TRAP - -address_word::function::do_trap:address_word trap_vector, address_word nia - /* Steal trap 31 for doing system calls */ - /* System calls are defined in libgloss/d30v/syscall.h. */ - if (trap_vector == EIT_VB + 0x20 + (31 << 3)) - { - enum { PARM1 = 2, PARM2, PARM3, PARM4, FUNC }; - if (GPR[FUNC] == 1) /* exit */ - { - sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, cia, sim_exited, - GPR[PARM1]); - return -1; /* dummy */ - } - else - { - CB_SYSCALL syscall; - - CB_SYSCALL_INIT (&syscall); - syscall.arg1 = GPR[PARM1]; - syscall.arg2 = GPR[PARM2]; - syscall.arg3 = GPR[PARM3]; - syscall.arg4 = GPR[PARM4]; - syscall.func = GPR[FUNC]; - syscall.p1 = (PTR) SD; - syscall.read_mem = d30v_read_mem; - syscall.write_mem = d30v_write_mem; - - WRITE32_QUEUE (&GPR[PARM1], - ((cb_syscall (STATE_CALLBACK (SD), &syscall) - == CB_RC_OK) - ? syscall.result - : -syscall.errcode)); - return nia; - } - } - else if (TRACE_TRAP_P) - { - int reg, i; - sim_io_eprintf (sd, "\nTrap %ld:\n", (long) ((trap_vector - (EIT_VB + 0x20)) >> 3)); - for (reg = 0; reg < NR_GENERAL_PURPOSE_REGISTERS; reg += 8) - { - sim_io_eprintf (sd, "r%.2d - r%.2d: ", reg, reg+7); - for (i = 0; i < 8; i++) - sim_io_eprintf (sd, " 0x%.8lx", (long) GPR[reg+i]); - sim_io_eprintf (sd, "\n"); - } - - for (reg = 0; reg < 16; reg += 8) - { - sim_io_eprintf (sd, "cr%.2d - cr%.2d:", reg, reg+7); - for (i = 0; i < 8; i++) - sim_io_eprintf (sd, " 0x%.8lx", (long) CREG[reg+i]); - sim_io_eprintf (sd, "\n"); - } - - sim_io_eprintf (sd, "a0 - a1: "); - for (reg = 0; reg < NR_ACCUMULATORS; reg++) - sim_io_eprintf (sd, " 0x%.8lx 0x%.8lx", - (long)EXTRACTED64(ACC[reg], 0, 31), - (long)EXTRACTED64(ACC[reg], 32, 63)); - sim_io_eprintf (sd, "\n"); - - sim_io_eprintf (sd, "f0 - f7: "); - sim_io_eprintf (sd, " (f0) %d", (int) PSW_VAL(PSW_F0)); - sim_io_eprintf (sd, " (f1) %d", (int) PSW_VAL(PSW_F1)); - sim_io_eprintf (sd, " (f2) %d", (int) PSW_VAL(PSW_F2)); - sim_io_eprintf (sd, " (f3) %d", (int) PSW_VAL(PSW_F3)); - sim_io_eprintf (sd, " (s) %d", (int) PSW_VAL(PSW_S)); - sim_io_eprintf (sd, " (v) %d", (int) PSW_VAL(PSW_V)); - sim_io_eprintf (sd, " (va) %d", (int) PSW_VAL(PSW_VA)); - sim_io_eprintf (sd, " (c) %d\n", (int) PSW_VAL(PSW_C)); - - sim_io_eprintf (sd, "pswh: "); - sim_io_eprintf (sd, " (sm) %d", (int) PSW_VAL(PSW_SM)); - sim_io_eprintf (sd, " (ea) %d", (int) PSW_VAL(PSW_EA)); - sim_io_eprintf (sd, " (ie) %d", (int) PSW_VAL(PSW_IE)); - sim_io_eprintf (sd, " (rp) %d", (int) PSW_VAL(PSW_RP)); - sim_io_eprintf (sd, " (md) %d", (int) PSW_VAL(PSW_MD)); - - if (PSW_VAL(PSW_DB)) - sim_io_eprintf (sd, " (db) %d", (int) PSW_VAL(PSW_DB)); - - if (PSW_VAL(PSW_DS)) - sim_io_eprintf (sd, " (ds) %d", (int) PSW_VAL(PSW_DS)); - - sim_io_eprintf (sd, "\n"); - return nia; - } - else - { - if(PSW_VAL(PSW_RP) && RPT_E == cia) - { - WRITE32_QUEUE (&bPC, RPT_S); - if (RPT_C == 0) - PSW_SET (PSW_RP, 0); - } - else - WRITE32_QUEUE (&bPC, cia + 8); - DID_TRAP = 1; - return trap_vector; - } - -_BRA,01001,00,6.**,6.**,6.RC:BRA:short:mu:TRAP -"trap r<RC>" - nia = do_trap (_SD, EIT_VB + 0x20 + MASKED32(Rc, 24, 28), nia); -_BRA,01001,10,6.**,6.**,_IMM6:BRA:short:mu:TRAP imm -"trap <imm>" - nia = do_trap (_SD, EIT_VB + 0x20 + (imm_5 << 3), nia); - - - -// XOR - -_LOGIC,11011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:XOR -"xor r<RA>, r<RB>, r<RC>" - WRITE32_QUEUE (Ra, Rb ^ Rc); -_LOGIC,11011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:XOR imm -"xor r<RA>, r<RB>, <imm>" - WRITE32_QUEUE (Ra, Rb ^ imm); -_LOGIC,11011,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:XOR imm long -"xor r<RA>, r<RB>, <imm>" - WRITE32_QUEUE (Ra, Rb ^ imm); - - - -// XORFG - -_LOGIC,01011,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:XORFG -"xorfg f<FA>, f<FB>, f<FC>" - PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ PSW_FLAG_VAL(FC)); -_LOGIC,01011,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:XORFG imm -"xorfg f<FA>, f<FB>, <imm_6>" - PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ (imm_6 & 1)); - - - +# OBSOLETE // -*- C -*- +# OBSOLETE // Mitsubishi Electric Corp. D30V Simulator. +# OBSOLETE // Copyright (C) 1997, Free Software Foundation, Inc. +# OBSOLETE // Contributed by Cygnus Solutions Inc. +# OBSOLETE // +# OBSOLETE // This file is part of GDB, the GNU debugger. +# OBSOLETE // +# OBSOLETE // This program is free software; you can redistribute it and/or modify +# OBSOLETE // it under the terms of the GNU General Public License as published by +# OBSOLETE // the Free Software Foundation; either version 2 of the License, or +# OBSOLETE // (at your option) any later version. +# OBSOLETE // +# OBSOLETE // This program is distributed in the hope that it will be useful, +# OBSOLETE // but WITHOUT ANY WARRANTY; without even the implied warranty of +# OBSOLETE // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# OBSOLETE // GNU General Public License for more details. +# OBSOLETE // +# OBSOLETE // You should have received a copy of the GNU General Public License +# OBSOLETE // along with this program; if not, write to the Free Software +# OBSOLETE // Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# OBSOLETE // +# OBSOLETE +# OBSOLETE +# OBSOLETE define( _BRA, `1.*,CCC,000') +# OBSOLETE define( _LOGIC, `1.*,CCC,001') +# OBSOLETE define( _IMEM, `1.*,CCC,010') +# OBSOLETE define( _IALU1, `1.*,CCC,100') +# OBSOLETE define(_IALU2, `1.*,CCC,101') +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE define(_IMM6, `6.IMM_6S') +# OBSOLETE define(_IMM12, `12.IMM_12S') +# OBSOLETE define(_IMM18, `18.IMM_18S') +# OBSOLETE define(_IMM32, `6.IMM_6L,*,000,8.IMM_8L,00,18.IMM_18L') +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // The following is called when ever an illegal instruction is +# OBSOLETE // encountered +# OBSOLETE ::internal::illegal +# OBSOLETE sim_io_eprintf (sd, "illegal instruction at 0x%lx\n", (long) cia); +# OBSOLETE sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL); +# OBSOLETE +# OBSOLETE // The following is called when ever an instruction in the wrong +# OBSOLETE // slot is encountered. +# OBSOLETE ::internal::wrong_slot +# OBSOLETE sim_io_eprintf (sd, "wrong slot at 0x%lx\n", (long) cia); +# OBSOLETE sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // Something illegal that can be used to contact the simulator emul +# OBSOLETE // library. +# OBSOLETE define(_EMUL, `1.*,CCC,111') +# OBSOLETE +# OBSOLETE void::function::do_emul:int imm +# OBSOLETE /* temp hack - later replace with real interface */ +# OBSOLETE enum { +# OBSOLETE param1 = 2, param2, param3, param4 +# OBSOLETE }; +# OBSOLETE switch (imm) { +# OBSOLETE case 0: +# OBSOLETE { +# OBSOLETE sim_engine_abort (SD, CPU, cia, "UNIX call emulation unsupported"); +# OBSOLETE break; +# OBSOLETE } +# OBSOLETE case 1: +# OBSOLETE /* Trap 1 - prints a string */ +# OBSOLETE { +# OBSOLETE address_word str = GPR[param1]; +# OBSOLETE char chr; +# OBSOLETE while (1) { +# OBSOLETE chr = MEM (unsigned, str, 1); +# OBSOLETE if (chr == '\0') break; +# OBSOLETE sim_io_write_stdout (sd, &chr, sizeof chr); +# OBSOLETE str++; +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE } +# OBSOLETE case 3: +# OBSOLETE /* Trap 3 - writes a character */ +# OBSOLETE { +# OBSOLETE char chr = GPR[param1]; +# OBSOLETE sim_io_write_stdout (sd, &chr, sizeof chr); +# OBSOLETE break; +# OBSOLETE } +# OBSOLETE case 4: +# OBSOLETE /* Trap 4 exits with status in [param1] */ +# OBSOLETE { +# OBSOLETE sim_engine_halt (SD, CPU, NULL, cia, sim_exited, GPR[param1]); +# OBSOLETE break; +# OBSOLETE } +# OBSOLETE case 5: +# OBSOLETE /* Trap 5 breakpoints. If the breakpoint system knows about this, it +# OBSOLETE won't return. Otherwise, we fall through to treat this as an +# OBSOLETE unknown instruction. */ +# OBSOLETE { +# OBSOLETE sim_handle_breakpoint (SD, CPU, cia); +# OBSOLETE /* Fall through to default case.*/ +# OBSOLETE } +# OBSOLETE default: +# OBSOLETE sim_engine_abort (SD, CPU, cia, "Unknown monitor call %d", imm); +# OBSOLETE } +# OBSOLETE +# OBSOLETE _EMUL,00000,00,6.*,6.*,IMM_6S:EMUL:short,emul:iu,mu:EMUL +# OBSOLETE "syscall <imm>" +# OBSOLETE do_emul (_SD, imm); +# OBSOLETE _BRA,00000,00,6.**,6.**,_IMM32:BRA:long:iu,mu:EMUL long +# OBSOLETE "syscall <imm>" +# OBSOLETE do_emul (_SD, imm); +# OBSOLETE +# OBSOLETE // ABS +# OBSOLETE +# OBSOLETE _IALU1,01000,00,6.RA,6.RB,6.**:IALU1:short:iu,mu:ABS +# OBSOLETE "abs r<RA>, r<RB>" +# OBSOLETE WRITE32_QUEUE (Ra, abs(Rb)); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ADD +# OBSOLETE +# OBSOLETE void::function::do_add:unsigned32 *ra, unsigned32 rb, unsigned32 imm +# OBSOLETE ALU_BEGIN(rb); +# OBSOLETE ALU_ADDC(imm); +# OBSOLETE ALU_END(ra); +# OBSOLETE +# OBSOLETE _IALU1,00000,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD +# OBSOLETE "add r<RA>, r<RB>, r<RC>" +# OBSOLETE do_add (_SD, Ra, Rb, Rc); +# OBSOLETE _IALU1,00000,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD imm +# OBSOLETE "add r<RA>, r<RB>, <imm>" +# OBSOLETE do_add (_SD, Ra, Rb, imm); +# OBSOLETE _IALU1,00000,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD imm long +# OBSOLETE "add r<RA>, r<RB>, <imm>" +# OBSOLETE do_add (_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ADD2H +# OBSOLETE +# OBSOLETE void::function::do_add2h:signed32 *ra, signed32 rb, signed32 imm +# OBSOLETE unsigned16 ah2 = VH2_4(rb) + VH2_4(imm); +# OBSOLETE unsigned16 al2 = VL2_4(rb) + VL2_4(imm); +# OBSOLETE WRITE32_QUEUE (ra, (ah2 << 16) | al2); +# OBSOLETE +# OBSOLETE _IALU1,00001,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD2H +# OBSOLETE "add2h r<RA>, r<RB>, r<RC>" +# OBSOLETE do_add2h (_SD, Ra, Rb, Rc); +# OBSOLETE _IALU1,00001,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD2H imm +# OBSOLETE "add2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_add2h (_SD, Ra, Rb, immHL); +# OBSOLETE _IALU1,00001,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD2H imm long +# OBSOLETE "add2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_add2h (_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ADDC +# OBSOLETE +# OBSOLETE void::function::do_addc:unsigned32 *ra, unsigned32 rb, unsigned32 imm +# OBSOLETE ALU_BEGIN(rb); +# OBSOLETE ALU_ADDC_C(imm, ALU_CARRY); +# OBSOLETE ALU_END(ra); +# OBSOLETE +# OBSOLETE _IALU1,00100,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDC +# OBSOLETE "addc r<RA>, r<RB>, r<RC>" +# OBSOLETE do_addc (_SD, Ra, Rb, Rc); +# OBSOLETE _IALU1,00100,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDC imm +# OBSOLETE "addc r<RA>, r<RB>, <imm>" +# OBSOLETE do_addc (_SD, Ra, Rb, imm); +# OBSOLETE _IALU1,00100,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDC imm long +# OBSOLETE "addc r<RA>, r<RB>, <imm>" +# OBSOLETE do_addc (_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ADDHppp +# OBSOLETE +# OBSOLETE void::function::do_addh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE switch (ppp) { +# OBSOLETE case 0x0: /* LLL */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VL2_4(rb)); +# OBSOLETE ALU16_ADDC(VL2_4(src)); +# OBSOLETE ALU16_END(ra, 0); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x1: /* LLH */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VL2_4(rb)); +# OBSOLETE ALU16_ADDC(VH2_4(src)); +# OBSOLETE ALU16_END(ra, 0); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x2: /* LHL */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VH2_4(rb)); +# OBSOLETE ALU16_ADDC(VL2_4(src)); +# OBSOLETE ALU16_END(ra, 0); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x3: /* LHH */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VH2_4(rb)); +# OBSOLETE ALU16_ADDC(VH2_4(src)); +# OBSOLETE ALU16_END(ra, 0); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x4: /* HLL */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VL2_4(rb)); +# OBSOLETE ALU16_ADDC(VL2_4(src)); +# OBSOLETE ALU16_END(ra, 1); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x5: /* HLH */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VL2_4(rb)); +# OBSOLETE ALU16_ADDC(VH2_4(src)); +# OBSOLETE ALU16_END(ra, 1); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x6: /* HHL */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VH2_4(rb)); +# OBSOLETE ALU16_ADDC(VL2_4(src)); +# OBSOLETE ALU16_END(ra, 1); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x7: /* HHH */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VH2_4(rb)); +# OBSOLETE ALU16_ADDC(VH2_4(src)); +# OBSOLETE ALU16_END(ra, 1); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE default: +# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_addh_ppp - internal error - bad switch"); +# OBSOLETE } +# OBSOLETE ::%s::ppp:int ppp +# OBSOLETE switch (ppp) +# OBSOLETE { +# OBSOLETE case 0x0: return "lll"; +# OBSOLETE case 0x1: return "llh"; +# OBSOLETE case 0x2: return "lhl"; +# OBSOLETE case 0x3: return "lhh"; +# OBSOLETE case 0x4: return "hll"; +# OBSOLETE case 0x5: return "hlh"; +# OBSOLETE case 0x6: return "hhl"; +# OBSOLETE case 0x7: return "hhh"; +# OBSOLETE default: return "?"; +# OBSOLETE } +# OBSOLETE +# OBSOLETE _IALU1,10,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDHppp +# OBSOLETE "addh%s<ppp> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_addh_ppp(_SD, ppp, Ra, Rb, Rc); +# OBSOLETE _IALU1,10,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDHppp imm +# OBSOLETE "addh%s<ppp> r<RA>, r<RB>, <imm>" +# OBSOLETE do_addh_ppp(_SD, ppp, Ra, Rb, immHL); +# OBSOLETE _IALU1,10,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDHppp imm long +# OBSOLETE "addh%s<ppp> r<RA>, r<RB>, <imm>" +# OBSOLETE do_addh_ppp(_SD, ppp, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ADDS +# OBSOLETE +# OBSOLETE void::function::do_adds:unsigned32 *ra, unsigned32 rb, unsigned32 imm +# OBSOLETE ALU_BEGIN(rb); +# OBSOLETE ALU_ADDC(EXTRACTED32(imm, 0, 0)); +# OBSOLETE ALU_END(ra); +# OBSOLETE +# OBSOLETE _IALU1,00110,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS +# OBSOLETE "adds r<RA>, r<RB>, r<RC>" +# OBSOLETE do_adds (_SD, Ra, Rb, Rc); +# OBSOLETE _IALU1,00110,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS imm +# OBSOLETE "adds r<RA>, r<RB>, <imm>" +# OBSOLETE do_adds (_SD, Ra, Rb, imm); +# OBSOLETE _IALU1,00110,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS imm long +# OBSOLETE "adds r<RA>, r<RB>, <imm>" +# OBSOLETE do_adds (_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ADDS2H +# OBSOLETE +# OBSOLETE void::function::do_adds2h:unsigned32 *ra, unsigned32 rb, unsigned32 immHL +# OBSOLETE unsigned16 high = VH2_4(rb) + EXTRACTED32(immHL, 0, 0); +# OBSOLETE unsigned16 low = VL2_4(rb) + EXTRACTED32(immHL, 16, 16); +# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low); +# OBSOLETE +# OBSOLETE _IALU1,00111,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS2H +# OBSOLETE "adds2h r<RA>, r<RB>, r<RC>" +# OBSOLETE do_adds2h (_SD, Ra, Rb, Rc); +# OBSOLETE _IALU1,00111,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS2H imm +# OBSOLETE "adds2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_adds2h (_SD, Ra, Rb, immHL); +# OBSOLETE _IALU1,00111,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS2H imm long +# OBSOLETE "adds2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_adds2h (_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // AND +# OBSOLETE +# OBSOLETE _LOGIC,11000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:AND +# OBSOLETE "and r<RA>, r<RB>, r<RC>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb & Rc); +# OBSOLETE _LOGIC,11000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:AND imm +# OBSOLETE "and r<RA>, r<RB>, <imm>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb & imm); +# OBSOLETE _LOGIC,11000,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:AND imm long +# OBSOLETE "and r<RA>, r<RB>, <imm>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb & imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE // ANDFG +# OBSOLETE +# OBSOLETE _LOGIC,01000,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:Logical AND Flags +# OBSOLETE "andfg f<FA>, f<FB>, f<FC>" +# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & PSW_FLAG_VAL(FC)); +# OBSOLETE _LOGIC,01000,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:Logical AND Flags imm +# OBSOLETE "andfg f<FA>, f<FB>, <imm_6>" +# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & (imm_6 & 1)); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // AVG +# OBSOLETE +# OBSOLETE void::function::do_avg:unsigned32 *ra, unsigned32 rb, unsigned32 imm +# OBSOLETE WRITE32_QUEUE (ra, ((signed64)(signed32)rb + (signed64)(signed32)imm + 1) >> 1); +# OBSOLETE +# OBSOLETE _IALU1,01010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG +# OBSOLETE "avg r<RA>, r<RB>, r<RC>" +# OBSOLETE do_avg (_SD, Ra, Rb, Rc); +# OBSOLETE _IALU1,01010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG imm +# OBSOLETE "avg r<RA>, r<RB>, <imm>" +# OBSOLETE do_avg (_SD, Ra, Rb, imm); +# OBSOLETE _IALU1,01010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG imm long +# OBSOLETE "avg r<RA>, r<RB>, <imm>" +# OBSOLETE do_avg (_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // AVG2H +# OBSOLETE +# OBSOLETE void::function::do_avg2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm +# OBSOLETE unsigned16 high = ((signed32)(signed16)VH2_4(rb) + (signed32)(signed16)VH2_4(imm) + 1) >> 1; +# OBSOLETE unsigned16 low = ((signed32)(signed16)VL2_4(rb) + (signed32)(signed16)VL2_4(imm) + 1) >> 1; +# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low); +# OBSOLETE +# OBSOLETE _IALU1,01011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG2H +# OBSOLETE "avg2h r<RA>, r<RB>, r<RC>" +# OBSOLETE do_avg2h (_SD, Ra, Rb, Rc); +# OBSOLETE _IALU1,01011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG2H imm +# OBSOLETE "avg2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_avg2h (_SD, Ra, Rb, immHL); +# OBSOLETE _IALU1,01011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG2H imm long +# OBSOLETE "avg2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_avg2h (_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // BCLR +# OBSOLETE +# OBSOLETE _LOGIC,00011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BCLR +# OBSOLETE "bclr r<RA>, r<RB>, r<RC>" +# OBSOLETE WRITE32_QUEUE(Ra, Rb & ~BIT32((Rc) % 32)); +# OBSOLETE _LOGIC,00011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BCLR imm +# OBSOLETE "bclr r<RA>, r<RB>, <imm>" +# OBSOLETE WRITE32_QUEUE(Ra, Rb & ~BIT32((imm) % 32)); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // BNOT +# OBSOLETE +# OBSOLETE _LOGIC,00001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BNOT +# OBSOLETE "bnot r<RA>, r<RB>, r<RC>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ BIT32((Rc) % 32)); +# OBSOLETE _LOGIC,00001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BNOT imm +# OBSOLETE "bnot r<RA>, r<RB>, <imm>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ BIT32((imm) % 32)); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // BRA +# OBSOLETE +# OBSOLETE _BRA,00000,00,6.**,6.**,6.RC:BRA:short:mu:BRA +# OBSOLETE "bra r<RC>" +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE _BRA,00000,10,_IMM18:BRA:short:mu:BRA imm +# OBSOLETE "bra <pcdisp>" +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE _BRA,00000,10,6.**,6.**,_IMM32:BRA:long:mu:BRA imm long +# OBSOLETE "bra <pcdisp>" +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // BRATNZ +# OBSOLETE +# OBSOLETE _BRA,00100,01,6.RA,6.**,6.RC:BRA:short:mu:BRATNZ +# OBSOLETE "bratnz r<RC>" +# OBSOLETE if (*Ra != 0) +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE _BRA,00100,11,6.RA,_IMM12:BRA:short:mu:BRATNZ imm +# OBSOLETE "bratnz <pcdisp>" +# OBSOLETE if (*Ra != 0) +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE _BRA,00100,11,6.RA,6.**,_IMM32:BRA:long:mu:BRATNZ imm long +# OBSOLETE "bratnz <pcdisp>" +# OBSOLETE if (*Ra != 0) +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // BRATZR +# OBSOLETE +# OBSOLETE _BRA,00100,00,6.RA,6.**,6.RC:BRA:short:mu:BRATZR +# OBSOLETE "bratzr r<RC>" +# OBSOLETE if (val_Ra == 0) +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE _BRA,00100,10,6.RA,_IMM12:BRA:short:mu:BRATZR imm +# OBSOLETE "bratzr <pcdisp>" +# OBSOLETE if (val_Ra == 0) +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE _BRA,00100,10,6.RA,6.**,_IMM32:BRA:long:mu:BRATZR imm long +# OBSOLETE "bratzr <pcdisp>" +# OBSOLETE if (val_Ra == 0) +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // BSET +# OBSOLETE +# OBSOLETE _LOGIC,00010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BSET +# OBSOLETE "bset r<RA>, r<RB>, r<RC>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb | BIT32((Rc) % 32)); +# OBSOLETE _LOGIC,00010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BSET imm +# OBSOLETE "bset r<RA>, r<RB>, <imm>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb | BIT32((imm) % 32)); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // BSR +# OBSOLETE +# OBSOLETE _BRA,00010,00,6.**,6.**,6.RC:BRA:short:mu:BSR +# OBSOLETE "bsr r<RC>" +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE _BRA,00010,10,_IMM18:BRA:short:mu:BSR imm +# OBSOLETE "bsr <pcdisp>" +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE _BRA,00010,10,6.**,6.**,_IMM32:BRA:long:mu:BSR imm long +# OBSOLETE "bsr <pcdisp>" +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE +# OBSOLETE +# OBSOLETE // BSRTNZ +# OBSOLETE +# OBSOLETE _BRA,00110,01,6.RA,6.**,6.RC:BRA:short:mu:BSRTNZ +# OBSOLETE "bsrtnz r<RC>" +# OBSOLETE if (val_Ra != 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE +# OBSOLETE _BRA,00110,11,6.RA,_IMM12:BRA:short:mu:BSRTNZ imm +# OBSOLETE "bsrtnz <pcdisp>" +# OBSOLETE if (val_Ra != 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE +# OBSOLETE _BRA,00110,11,6.RA,6.**,_IMM32:BRA:long:mu:BSRTNZ imm long +# OBSOLETE "bsrtnz <pcdisp>" +# OBSOLETE if (val_Ra != 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE +# OBSOLETE +# OBSOLETE // BSRTZR +# OBSOLETE +# OBSOLETE _BRA,00110,00,6.RA,6.**,6.RC:BRA:short:mu:BSRTZR +# OBSOLETE "bsrtzr r<RC>" +# OBSOLETE if (val_Ra == 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE +# OBSOLETE _BRA,00110,10,6.RA,_IMM12:BRA:short:mu:BSRTZR imm +# OBSOLETE "bsrtzr <pcdisp>" +# OBSOLETE if (val_Ra == 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE +# OBSOLETE _BRA,00110,10,6.RA,6.**,_IMM32:BRA:long:mu:BSRTZR imm long +# OBSOLETE "bsrtzr <pcdisp>" +# OBSOLETE if (val_Ra == 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = cia + pcdisp; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE +# OBSOLETE +# OBSOLETE // BTST +# OBSOLETE +# OBSOLETE _LOGIC,00000,00,***,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:BTST +# OBSOLETE "btst f<FA>, r<RB>, r<RC>" +# OBSOLETE int bit = (Rc) % 32; +# OBSOLETE PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit)); +# OBSOLETE _LOGIC,00000,10,***,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:BTST imm +# OBSOLETE "btst f<FA>, r<RB>, <imm>" +# OBSOLETE int bit = imm % 32; +# OBSOLETE PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit)); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // CMPcc +# OBSOLETE +# OBSOLETE void::function::do_cmp_cc:int cc, int fa, signed32 rb, signed32 rc +# OBSOLETE int value = 0; +# OBSOLETE switch (cc) { +# OBSOLETE case 0: /* EQ */ +# OBSOLETE value = (rb == rc); +# OBSOLETE break; +# OBSOLETE case 1: /* NE */ +# OBSOLETE value = (rb != rc); +# OBSOLETE break; +# OBSOLETE case 2: /* GT */ +# OBSOLETE value = (rb > rc); +# OBSOLETE break; +# OBSOLETE case 3: /* GE */ +# OBSOLETE value = (rb >= rc); +# OBSOLETE break; +# OBSOLETE case 4: /* LT */ +# OBSOLETE value = (rb < rc); +# OBSOLETE break; +# OBSOLETE case 5: /* LE */ +# OBSOLETE value = (rb <= rc); +# OBSOLETE break; +# OBSOLETE case 6: /* PS */ +# OBSOLETE value = ((rb >= 0) && (rc >= 0)); +# OBSOLETE break; +# OBSOLETE case 7: /* NG */ +# OBSOLETE value = ((rb < 0) && (rc < 0)); +# OBSOLETE break; +# OBSOLETE default: +# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_cmp_cc - internal error - bad switch (%d)", cc); +# OBSOLETE } +# OBSOLETE PSW_FLAG_SET_QUEUE(fa, value); +# OBSOLETE +# OBSOLETE ::%s::ccc:int ccc +# OBSOLETE switch (ccc) +# OBSOLETE { +# OBSOLETE case 0: return "eq"; +# OBSOLETE case 1: return "ne"; +# OBSOLETE case 2: return "gt"; +# OBSOLETE case 3: return "ge"; +# OBSOLETE case 4: return "lt"; +# OBSOLETE case 5: return "le"; +# OBSOLETE case 6: return "ps"; +# OBSOLETE case 7: return "ng"; +# OBSOLETE default: return "?"; +# OBSOLETE } +# OBSOLETE +# OBSOLETE _LOGIC,01100,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPcc +# OBSOLETE "cmp%s<ccc> f<FA>, r<RB>, r<RC>" +# OBSOLETE do_cmp_cc(_SD, ccc, FA, Rb, Rc); +# OBSOLETE _LOGIC,01100,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPcc imm +# OBSOLETE "cmp%s<ccc> f<FA>, r<RB>, <imm>" +# OBSOLETE do_cmp_cc(_SD, ccc, FA, Rb, imm); +# OBSOLETE _LOGIC,01100,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPcc imm long +# OBSOLETE "cmp%s<ccc> f<FA>, r<RB>, <imm>" +# OBSOLETE do_cmp_cc(_SD, ccc, FA, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // CMPUcc +# OBSOLETE +# OBSOLETE void::function::do_cmpu_cc:int cc, int fa, unsigned32 rb, unsigned32 rc +# OBSOLETE int value = 0; +# OBSOLETE switch (cc) { +# OBSOLETE case 2: /* GT */ +# OBSOLETE value = (rb > rc); +# OBSOLETE break; +# OBSOLETE case 3: /* GE */ +# OBSOLETE value = (rb >= rc); +# OBSOLETE break; +# OBSOLETE case 4: /* LT */ +# OBSOLETE value = (rb < rc); +# OBSOLETE break; +# OBSOLETE case 5: /* LE */ +# OBSOLETE value = (rb <= rc); +# OBSOLETE break; +# OBSOLETE default: +# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_cmpu_cc - internal error - bad switch (%d)", cc); +# OBSOLETE } +# OBSOLETE PSW_FLAG_SET_QUEUE(fa, value); +# OBSOLETE +# OBSOLETE _LOGIC,01101,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPUcc +# OBSOLETE "cmpu%s<ccc> f<FA>, r<RB>, r<RC>" +# OBSOLETE do_cmpu_cc(_SD, ccc, FA, Rb, Rc); +# OBSOLETE _LOGIC,01101,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPUcc imm +# OBSOLETE "cmpu%s<ccc> f<FA>, r<RB>, <imm>" +# OBSOLETE do_cmpu_cc(_SD, ccc, FA, Rb, imm_6u); +# OBSOLETE _LOGIC,01101,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPUcc imm long +# OBSOLETE "cmpu%s<ccc> f<FA>, r<RB>, <imm>" +# OBSOLETE do_cmpu_cc(_SD, ccc, FA, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // DBRA +# OBSOLETE +# OBSOLETE void::function::do_dbra:address_word pcdisp, unsigned32 ra +# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp); +# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7)); +# OBSOLETE +# OBSOLETE _BRA,10000,00,6.RA,6.**,6.RC:BRA:short:mu:DBRA +# OBSOLETE "dbra r<RA>, r<RC>" +# OBSOLETE do_dbra(_SD, pcdisp, val_Ra); +# OBSOLETE _BRA,10000,10,6.RA,_IMM12:BRA:short:mu:DBRA imm +# OBSOLETE "dbra r<RA>, <pcdisp>" +# OBSOLETE do_dbra(_SD, pcdisp, val_Ra); +# OBSOLETE _BRA,10000,10,6.RA,6.**,_IMM32:BRA:long:mu:DBRA imm long +# OBSOLETE "dbra r<RA>, <pcdisp>" +# OBSOLETE do_dbra(_SD, pcdisp, val_Ra); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // DBRAI +# OBSOLETE +# OBSOLETE void::function::do_dbrai:address_word pcdisp, unsigned32 imm +# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp); +# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); +# OBSOLETE +# OBSOLETE _BRA,10100,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBRAI +# OBSOLETE "dbrai <IMM_6>, r<RC>" +# OBSOLETE do_dbrai(_SD, pcdisp, IMM_6); +# OBSOLETE _BRA,10100,10,6.IMM_6,_IMM12:BRA:short:mu:DBRAI imm +# OBSOLETE "dbrai <IMM_6>, <pcdisp>" +# OBSOLETE do_dbrai(_SD, pcdisp, IMM_6); +# OBSOLETE _BRA,10100,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBRAI imm long +# OBSOLETE "dbrai <IMM_6>, <pcdisp>" +# OBSOLETE do_dbrai(_SD, pcdisp, IMM_6); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // DBSR +# OBSOLETE +# OBSOLETE void::function::do_dbsr:address_word pcdisp, unsigned32 ra +# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp); +# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + ra); +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + ra + 8); +# OBSOLETE +# OBSOLETE _BRA,10010,00,6.RA,6.**,6.RC:BRA:short:mu:DBSR +# OBSOLETE "dbsr r<RA>, r<RC>" +# OBSOLETE do_dbsr(_SD, pcdisp, val_Ra); +# OBSOLETE _BRA,10010,10,6.RA,_IMM12:BRA:short:mu:DBSR imm +# OBSOLETE "dbsr r<RA>, <pcdisp>" +# OBSOLETE do_dbsr(_SD, pcdisp, val_Ra); +# OBSOLETE _BRA,10010,10,6.RA,6.**,_IMM32:BRA:long:mu:DBSR imm long +# OBSOLETE "dbsr r<RA>, <pcdisp>" +# OBSOLETE do_dbsr(_SD, pcdisp, val_Ra); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // DBSRI +# OBSOLETE +# OBSOLETE void::function::do_dbsri:address_word pcdisp, unsigned32 imm +# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp); +# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8); +# OBSOLETE +# OBSOLETE _BRA,10110,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBSRI +# OBSOLETE "dbsri <IMM_6>, r<RC>" +# OBSOLETE do_dbsri(_SD, pcdisp, IMM_6); +# OBSOLETE _BRA,10110,10,6.IMM_6,_IMM12:BRA:short:mu:DBSRI imm +# OBSOLETE "dbsri <IMM_6>, <pcdisp>" +# OBSOLETE do_dbsri(_SD, pcdisp, IMM_6); +# OBSOLETE _BRA,10110,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBSRI imm long +# OBSOLETE "dbsri <IMM_6>, <pcdisp>" +# OBSOLETE do_dbsri(_SD, pcdisp, IMM_6); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // DBT +# OBSOLETE +# OBSOLETE +# OBSOLETE _BRA,01011,00,6.**,6.**,6.**:BRA:short:mu:DBT +# OBSOLETE "dbt" +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE { +# OBSOLETE WRITE32_QUEUE (&DPC, RPT_S); +# OBSOLETE if (RPT_C == 0) +# OBSOLETE PSW_SET (PSW_RP, 0); +# OBSOLETE } +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&DPC, cia + 8); +# OBSOLETE DID_TRAP = 2; +# OBSOLETE nia = 0xfffff120; /* debug_trap_address */ +# OBSOLETE +# OBSOLETE // DJMP +# OBSOLETE +# OBSOLETE void::function::do_djmp:address_word pcdisp, unsigned32 ra +# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp); +# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7)); +# OBSOLETE +# OBSOLETE _BRA,10001,00,6.RA,6.**,6.RC:BRA:short:mu:DJMP +# OBSOLETE "djmp r<RA>, r<RC>" +# OBSOLETE do_djmp(_SD, pcdisp, val_Ra); +# OBSOLETE _BRA,10001,10,6.RA,_IMM12:BRA:short:mu:DJMP imm +# OBSOLETE "djmp r<RA>, <pcdisp>" +# OBSOLETE do_djmp(_SD, pcdisp, val_Ra); +# OBSOLETE _BRA,10001,10,6.RA,6.**,_IMM32:BRA:long:mu:DJMP imm long +# OBSOLETE "djmp r<RA>, <pcdisp>" +# OBSOLETE do_djmp(_SD, pcdisp, val_Ra); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // DJMPI +# OBSOLETE +# OBSOLETE void::function::do_djmpi:address_word pcdisp, unsigned32 imm +# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp); +# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); +# OBSOLETE +# OBSOLETE _BRA,10101,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJMPI +# OBSOLETE "djmpi <IMM_6>, r<RC>" +# OBSOLETE do_djmpi(_SD, pcdisp, IMM_6); +# OBSOLETE _BRA,10101,10,6.IMM_6,_IMM12:BRA:short:mu:DJMPI imm +# OBSOLETE "djmpi <IMM_6>, <pcdisp>" +# OBSOLETE do_djmpi(_SD, pcdisp, IMM_6); +# OBSOLETE _BRA,10101,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJMPI imm long +# OBSOLETE "djmpi <IMM_6>, <pcdisp>" +# OBSOLETE do_djmpi(_SD, pcdisp, IMM_6); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // DJSR +# OBSOLETE +# OBSOLETE void::function::do_djsr:address_word pcdisp, unsigned32 ra +# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp); +# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7)); +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + (ra & ~0x7) + 8); +# OBSOLETE +# OBSOLETE _BRA,10011,00,6.RA,6.**,6.RC:BRA:short:mu:DJSR +# OBSOLETE "djsr r<RA>, r<RC>" +# OBSOLETE do_djsr(_SD, pcdisp, val_Ra); +# OBSOLETE _BRA,10011,10,6.RA,_IMM12:BRA:short:mu:DJSR imm +# OBSOLETE "djsr r<RA>, <pcdisp>" +# OBSOLETE do_djsr(_SD, pcdisp, val_Ra); +# OBSOLETE _BRA,10011,10,6.RA,6.**,_IMM32:BRA:long:mu:DJSR imm long +# OBSOLETE "djsr r<RA>, <pcdisp>" +# OBSOLETE do_djsr(_SD, pcdisp, val_Ra); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // DJSRI +# OBSOLETE +# OBSOLETE void::function::do_djsri:address_word pcdisp, unsigned32 imm +# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); +# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp); +# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8); +# OBSOLETE +# OBSOLETE _BRA,10111,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJSRI +# OBSOLETE "djsri <IMM_6>, r<RC>" +# OBSOLETE do_djsri(_SD, pcdisp, IMM_6); +# OBSOLETE _BRA,10111,10,6.IMM_6,_IMM12:BRA:short:mu:DJSRI imm +# OBSOLETE "djsri <IMM_6>, <pcdisp>" +# OBSOLETE do_djsri(_SD, pcdisp, IMM_6); +# OBSOLETE _BRA,10111,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJSRI imm long +# OBSOLETE "djsri <IMM_6>, <pcdisp>" +# OBSOLETE do_djsri(_SD, pcdisp, IMM_6); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // JMP +# OBSOLETE +# OBSOLETE _BRA,00001,00,6.**,6.**,6.RC:BRA:short:mu:JMP +# OBSOLETE "jmp r<RC>" +# OBSOLETE nia = pcaddr; +# OBSOLETE if (RC == 62 && TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_RETURN; +# OBSOLETE _BRA,00001,10,_IMM18:BRA:short:mu:JMP imm +# OBSOLETE "jmp <pcdisp>" +# OBSOLETE nia = pcaddr; +# OBSOLETE _BRA,00001,10,6.**,6.**,_IMM32:BRA:long:mu:JMP imm long +# OBSOLETE "jmp <pcdisp>" +# OBSOLETE nia = pcaddr; +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // JMPTNZ +# OBSOLETE +# OBSOLETE _BRA,00101,01,6.RA,6.**,6.RC:BRA:short:mu:JMPTNZ +# OBSOLETE "jmptnz r<RC>" +# OBSOLETE if (val_Ra != 0) +# OBSOLETE nia = pcaddr; +# OBSOLETE _BRA,00101,11,6.RA,_IMM12:BRA:short:mu:JMPTNZ imm +# OBSOLETE "jmptnz <pcdisp>" +# OBSOLETE if (val_Ra != 0) +# OBSOLETE nia = pcaddr; +# OBSOLETE _BRA,00101,11,6.RA,6.**,_IMM32:BRA:long:mu:JMPTNZ imm long +# OBSOLETE "jmptnz <pcdisp>" +# OBSOLETE if (val_Ra != 0) +# OBSOLETE nia = pcaddr; +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // JMPTZR +# OBSOLETE +# OBSOLETE _BRA,00101,00,6.RA,6.**,6.RC:BRA:short:mu:JMPTZR +# OBSOLETE "jmptzr r<RC>" +# OBSOLETE if (val_Ra == 0) +# OBSOLETE nia = pcaddr; +# OBSOLETE _BRA,00101,10,6.RA,_IMM12:BRA:short:mu:JMPTZR imm +# OBSOLETE "jmptzr <pcdisp>" +# OBSOLETE if (val_Ra == 0) +# OBSOLETE nia = pcaddr; +# OBSOLETE _BRA,00101,10,6.RA,6.**,_IMM32:BRA:long:mu:JMPTZR imm long +# OBSOLETE "jmptzr <pcdisp>" +# OBSOLETE if (val_Ra == 0) +# OBSOLETE nia = pcaddr; +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // JOINpp +# OBSOLETE +# OBSOLETE void::function::do_join_pp:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE switch (pp) { +# OBSOLETE case 0x0: /* LL */ +# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VL2_4(src)); +# OBSOLETE break; +# OBSOLETE case 0x1: /* LH */ +# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VH2_4(src)); +# OBSOLETE break; +# OBSOLETE case 0x2: /* HL */ +# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VL2_4(src)); +# OBSOLETE break; +# OBSOLETE case 0x3: /* HH */ +# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VH2_4(src)); +# OBSOLETE break; +# OBSOLETE } +# OBSOLETE +# OBSOLETE ::%s::pp:int pp +# OBSOLETE switch (pp) +# OBSOLETE { +# OBSOLETE case 0x0: return "ll"; +# OBSOLETE case 0x1: return "lh"; +# OBSOLETE case 0x2: return "hl"; +# OBSOLETE case 0x3: return "hh"; +# OBSOLETE default: return "?"; +# OBSOLETE } +# OBSOLETE +# OBSOLETE _IALU1,011,pp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:JOINpp +# OBSOLETE "join%s<pp> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_join_pp(_SD, pp, Ra, Rb, Rc); +# OBSOLETE _IALU1,011,pp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:JOINpp imm +# OBSOLETE "join%s<pp> r<RA>, r<RB>, <imm>" +# OBSOLETE do_join_pp(_SD, pp, Ra, Rb, immHL); +# OBSOLETE _IALU1,011,pp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:JOINpp imm long +# OBSOLETE "join%s<pp> r<RA>, r<RB>, <imm>" +# OBSOLETE do_join_pp(_SD, pp, Ra, Rb, immHL); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // JSR +# OBSOLETE +# OBSOLETE _BRA,00011,00,6.**,6.**,6.RC:BRA:short:mu:JSR +# OBSOLETE "jsr r<RC>" +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE return pcaddr; +# OBSOLETE _BRA,00011,10,_IMM18:BRA:short:mu:JSR imm +# OBSOLETE "jsr <pcdisp>" +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE return pcaddr; +# OBSOLETE _BRA,00011,10,6.**,6.**,_IMM32:BRA:long:mu:JSR imm long +# OBSOLETE "jsr <pcdisp>" +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE return pcaddr; +# OBSOLETE +# OBSOLETE +# OBSOLETE // JSRTNZ +# OBSOLETE +# OBSOLETE _BRA,00111,01,6.RA,6.**,6.RC:BRA:short:mu:JSRTNZ +# OBSOLETE "jsrtnz r<RC>" +# OBSOLETE if (val_Ra != 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = pcaddr; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE _BRA,00111,11,6.RA,_IMM12:BRA:short:mu:JSRTNZ imm +# OBSOLETE "jsrtnz <pcdisp>" +# OBSOLETE if (val_Ra != 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = pcaddr; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE _BRA,00111,11,6.RA,6.**,_IMM32:BRA:long:mu:JSRTNZ imm long +# OBSOLETE "jsrtnz <pcdisp>" +# OBSOLETE if (val_Ra != 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = pcaddr; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // JSRTZR +# OBSOLETE +# OBSOLETE _BRA,00111,00,6.RA,6.**,6.RC:BRA:short:mu:JSRTZR +# OBSOLETE "jsrtzr r<RC>" +# OBSOLETE if (val_Ra == 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = pcaddr; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE _BRA,00111,10,6.RA,_IMM12:BRA:short:mu:JSRTZR imm +# OBSOLETE "jsrtzr <pcdisp>" +# OBSOLETE if (val_Ra == 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = pcaddr; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE _BRA,00111,10,6.RA,6.**,_IMM32:BRA:long:mu:JSRTZR imm long +# OBSOLETE "jsrtzr <pcdisp>" +# OBSOLETE if (val_Ra == 0) { +# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) +# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); +# OBSOLETE nia = pcaddr; +# OBSOLETE if (TRACE_CALL_P) +# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; +# OBSOLETE } +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // Post increment +# OBSOLETE +# OBSOLETE void::function::do_incr:int x, unsigned32 *rb, int delta +# OBSOLETE unsigned32 next_rb; +# OBSOLETE if (x == 1) +# OBSOLETE next_rb = *rb + delta; +# OBSOLETE else if (x == 3) +# OBSOLETE next_rb = *rb - delta; +# OBSOLETE else +# OBSOLETE next_rb = *rb; /* value not used */ +# OBSOLETE /* HW erratum: check value after incrementing */ +# OBSOLETE if (next_rb == MOD_E +# OBSOLETE && (x == 1 || x == 3) +# OBSOLETE && (PSW_VAL(PSW_MD))) { +# OBSOLETE WRITE32_QUEUE (rb, MOD_S); +# OBSOLETE } +# OBSOLETE else if (x == 1 || x == 3) +# OBSOLETE WRITE32_QUEUE (rb, next_rb); +# OBSOLETE +# OBSOLETE // LD2H +# OBSOLETE +# OBSOLETE int::function::make_even_reg:int reg, const char *name +# OBSOLETE if (reg & 1) +# OBSOLETE sim_engine_abort (SD, CPU, cia, +# OBSOLETE "0x%lx:%s odd register (r%d) used in multi-word load/mulx2h", +# OBSOLETE (long) cia, name, reg); +# OBSOLETE return reg; +# OBSOLETE +# OBSOLETE void::function::do_ld2h:int ra, unsigned32 rb, unsigned32 src +# OBSOLETE signed32 mem; +# OBSOLETE ra = make_even_reg(_SD, ra, "LD2H"); +# OBSOLETE mem = MEM(signed, rb + src, 4); +# OBSOLETE if (ra != 0) +# OBSOLETE { +# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], SEXT32(EXTRACTED32(mem, 0, 15), 16)); +# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], SEXT32(EXTRACTED32(mem, 16, 31), 16)); +# OBSOLETE } +# OBSOLETE +# OBSOLETE ::%s::XX:int XX +# OBSOLETE switch (XX) +# OBSOLETE { +# OBSOLETE case 0: return ""; +# OBSOLETE case 1: return "+"; +# OBSOLETE case 3: return "-"; +# OBSOLETE default: return "?"; +# OBSOLETE } +# OBSOLETE +# OBSOLETE _IMEM,00011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD2H +# OBSOLETE "ld2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "ld2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_ld2h(_SD, RA, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); +# OBSOLETE _IMEM,00011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD2H long +# OBSOLETE "ld2h r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_ld2h(_SD, RA, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // LD2W +# OBSOLETE +# OBSOLETE void::function::do_ld2w:int ra, unsigned32 rb, unsigned32 src +# OBSOLETE unsigned64 mem; +# OBSOLETE ra = make_even_reg(_SD, ra, "LD2W"); +# OBSOLETE mem = MEM(unsigned, rb + src, 8); +# OBSOLETE if (ra != 0) +# OBSOLETE { +# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], EXTRACTED64 (mem, 0, 31)); +# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], EXTRACTED64 (mem, 32, 63)); +# OBSOLETE } +# OBSOLETE +# OBSOLETE _IMEM,00110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:L2W +# OBSOLETE "ld2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "ld2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_ld2w(_SD, RA, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 8); +# OBSOLETE _IMEM,00110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:L2W long +# OBSOLETE "ld2w r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_ld2w(_SD, RA, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // LD4BH +# OBSOLETE +# OBSOLETE void::function::do_ld4bh:unsigned32 ra, unsigned32 rb, unsigned32 src +# OBSOLETE unsigned16 l1, l2, h1, h2; +# OBSOLETE unsigned32 mem; +# OBSOLETE ra = make_even_reg(_SD, ra, "LD4BH"); +# OBSOLETE mem = MEM(unsigned, rb + src, 4); +# OBSOLETE h1 = SEXT16(EXTRACTED32(mem, 0, 7), 8); +# OBSOLETE l1 = SEXT16(EXTRACTED32(mem, 8, 15), 8); +# OBSOLETE h2 = SEXT16(EXTRACTED32(mem, 16, 23), 8); +# OBSOLETE l2 = SEXT16(EXTRACTED32(mem, 24, 31), 8); +# OBSOLETE if (ra != 0) +# OBSOLETE { +# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1); +# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2); +# OBSOLETE } +# OBSOLETE +# OBSOLETE _IMEM,00101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BH +# OBSOLETE "ld4bh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "ld4bh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_ld4bh(_SD, RA, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); +# OBSOLETE _IMEM,00101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BH long +# OBSOLETE "ld4bh r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_ld4bh(_SD, RA, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // LD4BHU +# OBSOLETE +# OBSOLETE void::function::do_ld4bhu:unsigned32 ra, unsigned32 rb, unsigned32 src +# OBSOLETE unsigned16 l1, l2, h1, h2; +# OBSOLETE unsigned32 mem; +# OBSOLETE ra = make_even_reg(_SD, ra, "LD4BH"); +# OBSOLETE mem = MEM(signed, rb + src, 4); +# OBSOLETE h1 = EXTRACTED32(mem, 0, 7); +# OBSOLETE l1 = EXTRACTED32(mem, 8, 15); +# OBSOLETE h2 = EXTRACTED32(mem, 16, 23); +# OBSOLETE l2 = EXTRACTED32(mem, 24, 31); +# OBSOLETE if (ra != 0) +# OBSOLETE { +# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1); +# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2); +# OBSOLETE } +# OBSOLETE +# OBSOLETE _IMEM,01101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BHU +# OBSOLETE "ld4hbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "ld4hbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_ld4bhu(_SD, RA, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); +# OBSOLETE _IMEM,01101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BHU long +# OBSOLETE "ld4hbu r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_ld4bhu(_SD, RA, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // LDB +# OBSOLETE +# OBSOLETE void::function::do_ldb:unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 1)); +# OBSOLETE +# OBSOLETE _IMEM,00000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDB +# OBSOLETE "ldb r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "ldb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_ldb(_SD, Ra, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 1); +# OBSOLETE _IMEM,00000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDB long +# OBSOLETE "ldb r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_ldb(_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // LDBU +# OBSOLETE +# OBSOLETE void::function::do_ldbu:unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 1)); +# OBSOLETE +# OBSOLETE _IMEM,01001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDBU +# OBSOLETE "ldbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "ldbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_ldbu(_SD, Ra, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 1); +# OBSOLETE _IMEM,01001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDBU long +# OBSOLETE "ldbu r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_ldbu(_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // LDH +# OBSOLETE +# OBSOLETE void::function::do_ldh:unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 2)); +# OBSOLETE +# OBSOLETE _IMEM,00010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDH +# OBSOLETE "ldh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "ldh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_ldh(_SD, Ra, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2); +# OBSOLETE _IMEM,00010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDH long +# OBSOLETE "ldh r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_ldh(_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // LDHH +# OBSOLETE +# OBSOLETE void::function::do_ldhh:unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 2) << 16); +# OBSOLETE +# OBSOLETE _IMEM,00001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHH +# OBSOLETE "ldhh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "ldhh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_ldhh(_SD, Ra, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2); +# OBSOLETE _IMEM,00001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHH long +# OBSOLETE "ldhh r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_ldhh(_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // LDHU +# OBSOLETE +# OBSOLETE void::function::do_ldhu:unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 2)); +# OBSOLETE +# OBSOLETE _IMEM,01010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHU +# OBSOLETE "ldhu r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "ldhu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_ldhu(_SD, Ra, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2); +# OBSOLETE _IMEM,01010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHU long +# OBSOLETE "ldhu r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_ldhu(_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // LDW +# OBSOLETE +# OBSOLETE void::function::do_ldw:unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 4)); +# OBSOLETE +# OBSOLETE _IMEM,00100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDW +# OBSOLETE "ldw r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "ldw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_ldw(_SD, Ra, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); +# OBSOLETE _IMEM,00100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDW long +# OBSOLETE "ldw r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_ldw(_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MACa +# OBSOLETE +# OBSOLETE void::function::do_mac:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src +# OBSOLETE unsigned64 accum = *aa; +# OBSOLETE accum += (signed64) (rb) * (signed64) (src); +# OBSOLETE WRITE64_QUEUE (aa, accum); +# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63)); +# OBSOLETE +# OBSOLETE _IALU2,10100,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACa +# OBSOLETE "mac<AA> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_mac(_SD, Aa, Ra, Rb, Rc); +# OBSOLETE _IALU2,10100,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACa imm +# OBSOLETE "mac<AA> r<RA>, r<RB>, <imm>" +# OBSOLETE do_mac(_SD, Aa, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MACSa +# OBSOLETE +# OBSOLETE void::function::do_macs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src +# OBSOLETE unsigned64 accum = *aa; +# OBSOLETE accum += ((signed64) (rb) * (signed64) (src)) << 1; +# OBSOLETE WRITE64_QUEUE (aa, accum); +# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31)); +# OBSOLETE +# OBSOLETE _IALU2,10101,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACSa +# OBSOLETE "macs<AA> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_macs(_SD, Aa, Ra, Rb, Rc); +# OBSOLETE _IALU2,10101,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACSa imm +# OBSOLETE "macs<AA> r<RA>, r<RB>, <imm>" +# OBSOLETE do_macs(_SD, Aa, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MODDEC | MODINC +# OBSOLETE +# OBSOLETE _IMEM,00111,11,6.**,6.RB,_IMM6:IMEM:short:mu:MODDEC +# OBSOLETE "moddec r<RB>, <imm>" +# OBSOLETE do_incr(_SD, 3/*0b11*/, &GPR[RB], imm_5); +# OBSOLETE _IMEM,00111,01,6.**,6.RB,_IMM6:IMEM:short:mu:MODINC +# OBSOLETE "modinc r<RB>, <imm>" +# OBSOLETE do_incr(_SD, 1/*0b01*/, &GPR[RB], imm_5); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MSUBa +# OBSOLETE +# OBSOLETE void::function::do_msub:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src +# OBSOLETE unsigned64 accum = *aa; +# OBSOLETE accum -= (signed64) (rb) * (signed64) (src); +# OBSOLETE WRITE64_QUEUE (aa, accum); +# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63)); +# OBSOLETE +# OBSOLETE _IALU2,10110,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBa +# OBSOLETE "msub<AA> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_msub(_SD, Aa, Ra, Rb, Rc); +# OBSOLETE _IALU2,10110,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBa imm +# OBSOLETE "msub<AA> r<RA>, r<RB>, <imm>" +# OBSOLETE do_msub(_SD, Aa, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MSUBSa +# OBSOLETE +# OBSOLETE void::function::do_msubs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src +# OBSOLETE unsigned64 accum = *aa; +# OBSOLETE accum -= ((signed64) (rb) * (signed64) (src)) << 1; +# OBSOLETE WRITE64_QUEUE (aa, accum); +# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31)); +# OBSOLETE +# OBSOLETE _IALU2,10111,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBSa +# OBSOLETE "msubs<AA> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_msubs(_SD, Aa, Ra, Rb, Rc); +# OBSOLETE _IALU2,10111,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBSa imm +# OBSOLETE "msubs<AA> r<RA>, r<RB>, <imm>" +# OBSOLETE do_msubs(_SD, Aa, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MUL +# OBSOLETE +# OBSOLETE void::function::do_mul:unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE WRITE32_QUEUE (ra, rb * src); +# OBSOLETE +# OBSOLETE _IALU2,10000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL +# OBSOLETE "mul r<RA>, r<RB>, r<RC>" +# OBSOLETE do_mul(_SD, Ra, Rb, Rc); +# OBSOLETE _IALU2,10000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL imm +# OBSOLETE "mul r<RA>, r<RB>, <imm>" +# OBSOLETE do_mul(_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MUL2H +# OBSOLETE +# OBSOLETE void::function::do_mul2h:unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE unsigned16 high = VH2_4(rb) * VH2_4(src); +# OBSOLETE unsigned16 low = VL2_4(rb) * VL2_4(src); +# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low); +# OBSOLETE +# OBSOLETE _IALU2,00000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL2H +# OBSOLETE "mul2h r<RA>, r<RB>, r<RC>" +# OBSOLETE do_mul2h(_SD, Ra, Rb, Rc); +# OBSOLETE _IALU2,00000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL2H imm +# OBSOLETE "mul2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_mul2h(_SD, Ra, Rb, immHL); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MULX +# OBSOLETE +# OBSOLETE void::function::do_mulx:unsigned64 *aa, signed32 rb, signed32 src +# OBSOLETE WRITE64_QUEUE (aa, (signed64) (rb) * (signed64) (src)); +# OBSOLETE +# OBSOLETE _IALU2,11000,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULX +# OBSOLETE "mulx a<AA>, r<RB>, r<RC>" +# OBSOLETE do_mulx(_SD, Aa, Rb, Rc); +# OBSOLETE _IALU2,11000,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULX imm +# OBSOLETE "mulx a<AA>, r<RB>, <imm>" +# OBSOLETE do_mulx(_SD, Aa, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE // MULX2H +# OBSOLETE +# OBSOLETE void::function::do_mulx2h:int ra, signed32 rb, signed32 src, int high +# OBSOLETE signed32 result = rb * src; +# OBSOLETE if (!high) +# OBSOLETE { +# OBSOLETE ra = make_even_reg(_SD, ra, "MULX2H"); +# OBSOLETE if (ra != 0) +# OBSOLETE WRITE32_QUEUE (&GPR[ra+1], result); +# OBSOLETE } +# OBSOLETE else if (ra != 0) +# OBSOLETE { +# OBSOLETE WRITE32_QUEUE (&GPR[ra+0], result); +# OBSOLETE } +# OBSOLETE +# OBSOLETE _IALU2,00001,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULX2H +# OBSOLETE "mul2h r<RA>, r<RB>, r<RC>" +# OBSOLETE do_mulx2h(_SD, RA, RbH, RcH, 1); +# OBSOLETE do_mulx2h(_SD, RA, RbL, RcL, 0); +# OBSOLETE _IALU2,00001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULX2H imm +# OBSOLETE "mul2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_mulx2h(_SD, RA, RbH, imm, 1); +# OBSOLETE do_mulx2h(_SD, RA, RbL, imm, 0); +# OBSOLETE +# OBSOLETE // MULHXpp +# OBSOLETE +# OBSOLETE void::function::do_mulhx:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE signed32 value = 0; +# OBSOLETE switch (pp) { +# OBSOLETE case 0: /* LL */ +# OBSOLETE value = SEXT32(VL2_4(rb), 16) * SEXT32(VL2_4(src), 16); +# OBSOLETE break; +# OBSOLETE case 1: /* LH */ +# OBSOLETE value = SEXT32(VL2_4(rb), 16) * SEXT32(VH2_4(src), 16); +# OBSOLETE break; +# OBSOLETE case 2: /* HL */ +# OBSOLETE value = SEXT32(VH2_4(rb), 16) * SEXT32(VL2_4(src), 16); +# OBSOLETE break; +# OBSOLETE case 3: /* HH */ +# OBSOLETE value = SEXT32(VH2_4(rb), 16) * SEXT32(VH2_4(src), 16); +# OBSOLETE break; +# OBSOLETE default: +# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_mulhx - internal error - bad switch"); +# OBSOLETE } +# OBSOLETE WRITE32_QUEUE (ra, value); +# OBSOLETE +# OBSOLETE _IALU2,001,pp,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULHXpp +# OBSOLETE "mulhx%s<pp> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_mulhx(_SD, pp, Ra, Rb, Rc); +# OBSOLETE _IALU2,001,pp,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULHXpp imm +# OBSOLETE "mulhx%s<pp> r<RA>, r<RB>, <imm>" +# OBSOLETE do_mulhx(_SD, pp, Ra, Rb, immHL); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MULXS +# OBSOLETE +# OBSOLETE void::function::do_mulxs:unsigned64 *aa, signed32 rb, signed32 src +# OBSOLETE WRITE64_QUEUE (aa, ((signed64) (rb) * (signed64) (src)) << 1); +# OBSOLETE +# OBSOLETE _IALU2,11001,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULXS +# OBSOLETE "mulxs a<AA>, r<RB>, r<RC>" +# OBSOLETE do_mulxs(_SD, Aa, Rb, Rc); +# OBSOLETE _IALU2,11001,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULXS imm +# OBSOLETE "mulxs a<AA>, r<RB>, <imm>" +# OBSOLETE do_mulxs(_SD, Aa, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MVFACC +# OBSOLETE +# OBSOLETE void::function::do_mvfacc:unsigned32 *ra, unsigned64 ab, unsigned32 src +# OBSOLETE while (src > 63) src -= 64; +# OBSOLETE WRITE32_QUEUE (ra, ((signed64)ab) >> src); +# OBSOLETE +# OBSOLETE _IALU2,11111,00,6.RA,5.*,1.AB,6.RC:IALU2:short:iu:MVFACC +# OBSOLETE "mvfacc r<RA>, a<AB>, r<RC>" +# OBSOLETE do_mvfacc(_SD, Ra, *Ab, Rc); +# OBSOLETE _IALU2,11111,10,6.RA,5.*,1.AB,_IMM6:IALU2:short:iu:MVFACC imm +# OBSOLETE "mvfacc r<RA>, a<AB>, <imm>" +# OBSOLETE do_mvfacc(_SD, Ra, *Ab, imm_6u); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MVFSYS +# OBSOLETE +# OBSOLETE _BRA,11110,00,6.RA,6.CR,6.ID:BRA:short:mu:MVFSYS +# OBSOLETE "mvfsys r<RA>, cr<CR>" +# OBSOLETE switch (ID) { +# OBSOLETE case 0: +# OBSOLETE if (CR >= NR_CONTROL_REGISTERS) +# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR"); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (Ra, (CPU)->regs.control[CR]); +# OBSOLETE break; +# OBSOLETE case 1: +# OBSOLETE WRITE32_QUEUE (Ra, PSWL); +# OBSOLETE break; +# OBSOLETE case 2: +# OBSOLETE WRITE32_QUEUE (Ra, EXTRACTED32(PSWH, 16, 31)); +# OBSOLETE break; +# OBSOLETE case 3: +# OBSOLETE WRITE32_QUEUE (Ra, PSW_FLAG_VAL(CR)); +# OBSOLETE break; +# OBSOLETE default: +# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID"); +# OBSOLETE } +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MVTACC +# OBSOLETE +# OBSOLETE _IALU2,01111,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MVTACC +# OBSOLETE "mvtacc a<AA>, r<RB>, r<RC>" +# OBSOLETE WRITE64_QUEUE (Aa, INSERTED64(RbU, 0, 31) | (RcU)); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // MVTSYS +# OBSOLETE +# OBSOLETE _BRA,01110,00,6.CR,6.RB,6.ID:BRA:short:mu:MVTSYS +# OBSOLETE "mvtsys cr<CR>, r<RB>" +# OBSOLETE switch (ID) { +# OBSOLETE case 0: /* control register */ +# OBSOLETE if (CR >= NR_CONTROL_REGISTERS) +# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR"); +# OBSOLETE else +# OBSOLETE { +# OBSOLETE unsigned32 value = Rb; +# OBSOLETE CPU->mvtsys_left_p = 1; +# OBSOLETE if (CR == processor_status_word_cr) +# OBSOLETE { +# OBSOLETE unsigned32 ds = PSW & BIT32 (PSW_DS); /* preserve ds */ +# OBSOLETE value = ds | (value & PSW_VALID); +# OBSOLETE } +# OBSOLETE else if (CR == backup_processor_status_word_cr +# OBSOLETE || CR == debug_backup_processor_status_word_cr) +# OBSOLETE value &= DPSW_VALID; +# OBSOLETE else if (CR == eit_vector_base_cr) +# OBSOLETE value &= EIT_VALID; +# OBSOLETE WRITE32_QUEUE (&(CPU)->regs.control[CR], value); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 1: /* PSWL */ +# OBSOLETE WRITE32_QUEUE_MASK (&PSW, EXTRACTED32(Rb, 16, 31), +# OBSOLETE PSW_VALID & 0x0000ffff); +# OBSOLETE break; +# OBSOLETE case 2: /* PSWH */ +# OBSOLETE { +# OBSOLETE unsigned32 ds = PSW & BIT32 (PSW_DS); /* preserve ds */ +# OBSOLETE WRITE32_QUEUE_MASK (&PSW, (EXTRACTED32(Rb, 16, 31) << 16) | ds, +# OBSOLETE (PSW_VALID | ds) & 0xffff0000); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 3: /* FLAG */ +# OBSOLETE PSW_FLAG_SET_QUEUE(CR, Rb & 1); +# OBSOLETE break; +# OBSOLETE default: +# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID"); +# OBSOLETE } +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // NOP +# OBSOLETE +# OBSOLETE _BRA,01111,00,6.**,6.**,6.**:BRA:short:iu,mu:NOP +# OBSOLETE "nop" +# OBSOLETE /* NOP */; +# OBSOLETE +# OBSOLETE +# OBSOLETE // NOT +# OBSOLETE +# OBSOLETE _LOGIC,11001,00,6.RA,6.RB,6.*:LOGIC:short:iu,mu:NOT +# OBSOLETE "not r<RA>, r<RB>" +# OBSOLETE WRITE32_QUEUE (Ra, ~Rb); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // NOTFG +# OBSOLETE +# OBSOLETE _LOGIC,01001,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:NOTFG +# OBSOLETE "notfg f<FA>, f<FB>" +# OBSOLETE PSW_FLAG_SET_QUEUE(FA, !PSW_FLAG_VAL(FB)); +# OBSOLETE +# OBSOLETE +# OBSOLETE // OR +# OBSOLETE +# OBSOLETE _LOGIC,11010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:OR +# OBSOLETE "or r<RA>, r<RB>, r<RC>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb | Rc); +# OBSOLETE _LOGIC,11010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:OR imm +# OBSOLETE "or r<RA>, r<RB>, <imm>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb | imm); +# OBSOLETE _LOGIC,11010,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:OR imm long +# OBSOLETE "or r<RA>, r<RB>, <imm>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb | imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ORFG +# OBSOLETE +# OBSOLETE _LOGIC,01010,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:ORFG +# OBSOLETE "orfg f<FA>, f<FB>, f<FC>" +# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | PSW_FLAG_VAL(FC)); +# OBSOLETE _LOGIC,01010,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:ORFG imm +# OBSOLETE "orfg f<FA>, f<FB>, <imm>" +# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | (imm_6 & 1)); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // REIT +# OBSOLETE +# OBSOLETE _BRA,01000,00,6.**,6.**,6.**:BRA:short:mu:REIT +# OBSOLETE "reit" +# OBSOLETE WRITE32_QUEUE (&PSW, bPSW); +# OBSOLETE nia = bPC; +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // REPEAT +# OBSOLETE +# OBSOLETE void::function::do_repeat:unsigned32 count, address_word pcaddr +# OBSOLETE address_word rpt_s = cia + 8; +# OBSOLETE address_word rpt_e = cia + pcaddr; +# OBSOLETE +# OBSOLETE if (count == 0) +# OBSOLETE sim_engine_abort (SD, CPU, cia, "REPEAT with ra=0 and REPEATI with imm = 0 is forbidden."); +# OBSOLETE if (count > 1) +# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); +# OBSOLETE if (rpt_e < rpt_s + 0x10) +# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx: REPEAT or REPEATI loop is too small\n", (long) cia); +# OBSOLETE WRITE32_QUEUE (&RPT_C, count - 1); +# OBSOLETE WRITE32_QUEUE (&RPT_S, rpt_s); +# OBSOLETE WRITE32_QUEUE (&RPT_E, rpt_e); +# OBSOLETE +# OBSOLETE _BRA,11000,00,6.RA,6.**,6.RC:BRA:short:mu:REPEAT +# OBSOLETE "repeat r<RA>, r<RC>" +# OBSOLETE do_repeat(_SD, val_Ra, pcaddr); +# OBSOLETE _BRA,11000,10,6.RA,_IMM12:BRA:short:mu:REPEAT imm +# OBSOLETE "repeat r<RA>, <pcaddr>" +# OBSOLETE do_repeat(_SD, val_Ra, pcaddr); +# OBSOLETE _BRA,11000,10,6.RA,6.**,_IMM32:BRA:long:mu:REPEAT imm long +# OBSOLETE "repeat r<RA>, <pcaddr>" +# OBSOLETE do_repeat(_SD, val_Ra, pcaddr); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // REPEATI +# OBSOLETE +# OBSOLETE _BRA,11010,00,6.IMM_6,6.**,6.RC:BRA:short:mu:REPEATI +# OBSOLETE "repeati <IMM_6>, r<RC>" +# OBSOLETE do_repeat(_SD, IMM_6, pcaddr); +# OBSOLETE _BRA,11010,10,6.IMM_6,_IMM12:BRA:short:mu:REPEATI imm +# OBSOLETE "repeati <IMM_6>, <pcaddr>" +# OBSOLETE do_repeat(_SD, IMM_6, pcaddr); +# OBSOLETE _BRA,11010,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:REPEATI imm long +# OBSOLETE "repeati <IMM_6>, <pcaddr>" +# OBSOLETE do_repeat(_SD, IMM_6, pcaddr); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // RTD +# OBSOLETE +# OBSOLETE _BRA,01010,00,6.*,6.*,6.*:BRA:short:mu:RTD +# OBSOLETE "rtd" +# OBSOLETE WRITE32_QUEUE (&PSW, DPSW); +# OBSOLETE nia = DPC; +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ROT +# OBSOLETE +# OBSOLETE _LOGIC,10100,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT +# OBSOLETE "rot r<RA>, r<RB>, r<RC>" +# OBSOLETE WRITE32_QUEUE (Ra, ROT32(Rb, Rc & 0x1f)); +# OBSOLETE _LOGIC,10100,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT imm +# OBSOLETE "rot r<RA>, r<RB>, <imm>" +# OBSOLETE WRITE32_QUEUE (Ra, ROT32(Rb, imm & 0x1f)); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ROT2H +# OBSOLETE +# OBSOLETE void::function::do_rot2h:unsigned32 *ra, unsigned32 rb, signed32 src +# OBSOLETE unsigned16 high = ROTR16(VH2_4(rb), VH2_4(src) & 0xf); +# OBSOLETE unsigned16 low = ROTR16(VL2_4(rb), VL2_4(src) & 0xf); +# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low); +# OBSOLETE +# OBSOLETE _LOGIC,10101,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT2H +# OBSOLETE "rot2h r<RA>, r<RB>, r<RC>" +# OBSOLETE do_rot2h(_SD, Ra, Rb, Rc); +# OBSOLETE _LOGIC,10101,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT2H imm +# OBSOLETE "rot2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_rot2h(_SD, Ra, Rb, immHL); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SAT +# OBSOLETE +# OBSOLETE void::function::do_sat:signed32 *ra, signed32 rb, signed32 src +# OBSOLETE int bits = LSMASKED32(src, 4, 0); /* 5 */ +# OBSOLETE signed32 sat = LSMASK32(bits, 0) >> 2; +# OBSOLETE signed32 nsat = ~sat; +# OBSOLETE signed32 value; +# OBSOLETE if (bits != src) +# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", (long) cia); +# OBSOLETE if (bits == 0) +# OBSOLETE value = rb; +# OBSOLETE else if (rb >= sat) +# OBSOLETE value = sat; +# OBSOLETE else if (rb <= nsat) +# OBSOLETE value = nsat; +# OBSOLETE else +# OBSOLETE value = rb; +# OBSOLETE WRITE32_QUEUE (ra, value); +# OBSOLETE +# OBSOLETE _IALU2,01000,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT +# OBSOLETE "sat r<RA>, r<RB>, r<RC>" +# OBSOLETE do_sat(_SD, Ra, Rb, Rc); +# OBSOLETE _IALU2,01000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT imm +# OBSOLETE "sat r<RA>, r<RB>, <imm>" +# OBSOLETE do_sat(_SD, Ra, Rb, imm_5); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SAT2H +# OBSOLETE +# OBSOLETE void::function::do_sath:signed32 *ra, signed32 rb, signed32 src, int high, int updates_f4 +# OBSOLETE int bits = LSMASKED32(src, 4, 0); /* 5 */ +# OBSOLETE signed32 sat = LSMASK32(bits, 0) >> 2; +# OBSOLETE signed32 nsat = ~sat; +# OBSOLETE signed32 value; +# OBSOLETE if (bits != src) +# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", (long) cia); +# OBSOLETE if (bits == 0) +# OBSOLETE value = rb; +# OBSOLETE else if (rb >= sat) +# OBSOLETE value = sat; +# OBSOLETE else if (rb <= nsat) +# OBSOLETE value = nsat; +# OBSOLETE else +# OBSOLETE value = rb; +# OBSOLETE if (high) +# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); +# OBSOLETE if (updates_f4) +# OBSOLETE { +# OBSOLETE /* if MU instruction was a MVTSYS (lkr), unqueue register writes now */ +# OBSOLETE if(STATE_CPU (sd, 0)->mvtsys_left_p) +# OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); +# OBSOLETE PSW_FLAG_SET_QUEUE(PSW_S_FLAG, PSW_FLAG_VAL(PSW_S_FLAG) ^ (value & 1)); +# OBSOLETE } +# OBSOLETE +# OBSOLETE _IALU2,01001,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT2H +# OBSOLETE "sat2h r<RA>, r<RB>, r<RC>" +# OBSOLETE do_sath(_SD, Ra, RbH, RcH, 1, 0); +# OBSOLETE do_sath(_SD, Ra, RbL, RcL, 0, 0); +# OBSOLETE _IALU2,01001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT2H imm +# OBSOLETE "sat2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_sath(_SD, Ra, RbH, imm_5, 1, 0); +# OBSOLETE do_sath(_SD, Ra, RbL, imm_5, 0, 0); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SATHp +# OBSOLETE +# OBSOLETE ::%s::p:int p +# OBSOLETE switch (p) +# OBSOLETE { +# OBSOLETE case 0: return "l"; +# OBSOLETE case 1: return "h"; +# OBSOLETE default: return "?"; +# OBSOLETE } +# OBSOLETE +# OBSOLETE _IALU2,1110,p,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATHP +# OBSOLETE "sath%s<p> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_sath(_SD, Ra, Rb, Rc, p, 1); +# OBSOLETE _IALU2,1110,p,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATHP imm +# OBSOLETE "sath%s<p> r<RA>, r<RB>, <imm>" +# OBSOLETE do_sath(_SD, Ra, Rb, imm_5, p, 1); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SATZ +# OBSOLETE +# OBSOLETE void::function::do_satz:signed32 *ra, signed32 rb, signed32 src +# OBSOLETE if (rb < 0) +# OBSOLETE WRITE32_QUEUE (ra, 0); +# OBSOLETE else +# OBSOLETE do_sat (_SD, ra, rb, src); +# OBSOLETE +# OBSOLETE _IALU2,01010,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ +# OBSOLETE "satz r<RA>, r<RB>, r<RC>" +# OBSOLETE do_satz(_SD, Ra, Rb, Rc); +# OBSOLETE _IALU2,01010,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ imm +# OBSOLETE "satz r<RA>, r<RB>, <imm>" +# OBSOLETE do_satz(_SD, Ra, Rb, imm_5); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SATZ2H +# OBSOLETE +# OBSOLETE void::function::do_satzh:signed32 *ra, signed16 rb, signed32 src, int high +# OBSOLETE int bits = LSMASKED32(src, 3, 0); /*4*/ +# OBSOLETE signed16 sat = LSMASK16(bits, 0) >> 2; +# OBSOLETE signed16 nsat = 0; +# OBSOLETE signed16 value; +# OBSOLETE if (bits != src) +# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx:SATZ2H bit overflow\n", (long) cia); +# OBSOLETE if (bits == 0 && rb > sat) +# OBSOLETE value = rb; +# OBSOLETE else if (rb > sat) +# OBSOLETE value = sat; +# OBSOLETE else if (rb < nsat) +# OBSOLETE value = nsat; +# OBSOLETE else +# OBSOLETE value = rb; +# OBSOLETE if (high) +# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); +# OBSOLETE +# OBSOLETE +# OBSOLETE _IALU2,01011,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ2H +# OBSOLETE "satz2h r<RA>, r<RB>, r<RC>" +# OBSOLETE do_satzh(_SD, Ra, RbH, RcH, 1); +# OBSOLETE do_satzh(_SD, Ra, RbL, RcL, 0); +# OBSOLETE _IALU2,01011,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ2H imm +# OBSOLETE "satz2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_satzh(_SD, Ra, RbH, imm, 1); +# OBSOLETE do_satzh(_SD, Ra, RbL, imm, 0); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SRA +# OBSOLETE +# OBSOLETE void::function::do_sra:unsigned32 *ra, unsigned32 rb, signed32 src +# OBSOLETE unsigned32 value; +# OBSOLETE while (src > 31) src -= 32; +# OBSOLETE while (src < -32) src += 32; +# OBSOLETE if (src >= 0) +# OBSOLETE value = (signed32)rb >> src; +# OBSOLETE else if (src == -32) +# OBSOLETE value = 0; +# OBSOLETE else +# OBSOLETE value = rb << -src; +# OBSOLETE WRITE32_QUEUE (ra, value); +# OBSOLETE +# OBSOLETE _LOGIC,10000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA +# OBSOLETE "sra r<RA>, r<RB>, r<RC>" +# OBSOLETE do_sra(_SD, Ra, Rb, Rc); +# OBSOLETE _LOGIC,10000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA imm +# OBSOLETE "sra r<RA>, r<RB>, <imm>" +# OBSOLETE do_sra(_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SRAHp +# OBSOLETE +# OBSOLETE void::function::do_srah:unsigned32 *ra, unsigned32 rb, int src, int high +# OBSOLETE unsigned32 value; +# OBSOLETE while (src > 31) src -= 32; +# OBSOLETE while (src < -32) src += 32; +# OBSOLETE if (src >= 0) +# OBSOLETE value = (signed32)rb >> src; +# OBSOLETE else if (src == -32) +# OBSOLETE value = 0; +# OBSOLETE else +# OBSOLETE value = rb << -src; +# OBSOLETE if (high) +# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); +# OBSOLETE +# OBSOLETE _LOGIC,0010,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRAHP +# OBSOLETE "srah%s<p> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_srah(_SD, Ra, Rb, Rc, p); +# OBSOLETE _LOGIC,0010,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRAHP imm +# OBSOLETE "srah%s<p> r<RA>, r<RB>, <imm>" +# OBSOLETE do_srah(_SD, Ra, Rb, imm, p); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SRA2H +# OBSOLETE +# OBSOLETE _LOGIC,10001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA2H +# OBSOLETE "sra2h r<RA>, r<RB>, r<RC>" +# OBSOLETE signed32 srcH = RcH; +# OBSOLETE signed32 srcL = RcL; +# OBSOLETE while (srcH > 15) srcH -= 16; +# OBSOLETE while (srcH < -16) srcH += 16; +# OBSOLETE while (srcL > 15) srcL -= 16; +# OBSOLETE while (srcL < -16) srcL += 16; +# OBSOLETE do_srah(_SD, Ra, RbH, srcH, 1); +# OBSOLETE do_srah(_SD, Ra, RbL, srcL, 0); +# OBSOLETE _LOGIC,10001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA2H imm +# OBSOLETE "sra2h r<RA>, r<RB>, <imm>" +# OBSOLETE signed32 src = imm; +# OBSOLETE while (src > 15) src -= 16; +# OBSOLETE while (src < -16) src += 16; +# OBSOLETE do_srah(_SD, Ra, RbH, src, 1); +# OBSOLETE do_srah(_SD, Ra, RbL, src, 0); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SRC +# OBSOLETE +# OBSOLETE void::function::do_src:unsigned32 *ra, unsigned32 rb, int src +# OBSOLETE unsigned32 value; +# OBSOLETE unsigned64 operand; +# OBSOLETE unsigned64 shifted; +# OBSOLETE while (src > 31) src -= 32; +# OBSOLETE while (src < -32) src += 32; +# OBSOLETE if (src >= 0) +# OBSOLETE { +# OBSOLETE operand = (INSERTED64(rb, 0, 31) | INSERTED64(*ra, 32, 63)); +# OBSOLETE shifted = operand >> src; +# OBSOLETE value = EXTRACTED64(shifted, 32, 63); +# OBSOLETE } +# OBSOLETE else +# OBSOLETE { +# OBSOLETE operand = (INSERTED64(*ra, 0, 31) | INSERTED64(rb, 32, 63)); +# OBSOLETE shifted = operand << -src; +# OBSOLETE value = EXTRACTED64(shifted, 0, 31); +# OBSOLETE } +# OBSOLETE WRITE32_QUEUE (ra, value); +# OBSOLETE +# OBSOLETE _LOGIC,10110,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRC +# OBSOLETE "src r<RA>, r<RB>, r<RC>" +# OBSOLETE do_src(_SD, Ra, Rb, Rc); +# OBSOLETE _LOGIC,10110,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRC imm +# OBSOLETE "src r<RA>, r<RB>, <imm>" +# OBSOLETE do_src(_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SRL +# OBSOLETE +# OBSOLETE void::function::do_srl:unsigned32 *ra, unsigned32 rb, int src +# OBSOLETE unsigned32 value; +# OBSOLETE while (src > 31) src -= 32; +# OBSOLETE while (src < -32) src += 32; +# OBSOLETE if (src >= 0) +# OBSOLETE value = (unsigned32)rb >> src; +# OBSOLETE else if (src == -32) +# OBSOLETE value = 0; +# OBSOLETE else +# OBSOLETE value = (unsigned32)rb << -src; +# OBSOLETE WRITE32_QUEUE (ra, value); +# OBSOLETE +# OBSOLETE _LOGIC,10010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL +# OBSOLETE "srl r<RA>, r<RB>, r<RC>" +# OBSOLETE do_srl(_SD, Ra, Rb, Rc); +# OBSOLETE _LOGIC,10010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL imm +# OBSOLETE "srl r<RA>, r<RB>, <imm>" +# OBSOLETE do_srl(_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SRLHp +# OBSOLETE +# OBSOLETE void::function::do_srlh:unsigned32 *ra, unsigned32 rb, int src, int high +# OBSOLETE unsigned32 value; +# OBSOLETE while (src > 31) src -= 32; +# OBSOLETE while (src < -32) src += 32; +# OBSOLETE if (src >= 0) +# OBSOLETE value = rb >> src; +# OBSOLETE else if (src == -32) +# OBSOLETE value = 0; +# OBSOLETE else +# OBSOLETE value = rb << -src; +# OBSOLETE if (high) +# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); +# OBSOLETE +# OBSOLETE _LOGIC,0011,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRLHP +# OBSOLETE "srlh%s<p> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_srlh(_SD, Ra, Rb, Rc, p); +# OBSOLETE _LOGIC,0011,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRLHP imm +# OBSOLETE "srlh%s<p> r<RA>, r<RB>, <imm>" +# OBSOLETE do_srlh(_SD, Ra, Rb, imm, p); +# OBSOLETE +# OBSOLETE +# OBSOLETE // SRL2H +# OBSOLETE +# OBSOLETE _LOGIC,10011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL2H +# OBSOLETE "srl2h r<RA>, r<RB>, r<RC>" +# OBSOLETE signed32 srcH = RcH; +# OBSOLETE signed32 srcL = RcL; +# OBSOLETE while (srcH > 15) srcH -= 16; +# OBSOLETE while (srcH < -16) srcH += 16; +# OBSOLETE while (srcL > 15) srcL -= 16; +# OBSOLETE while (srcL < -16) srcL += 16; +# OBSOLETE do_srlh(_SD, Ra, RbHU, srcH, 1); +# OBSOLETE do_srlh(_SD, Ra, RbLU, srcL, 0); +# OBSOLETE _LOGIC,10011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL2H imm +# OBSOLETE "srl2h r<RA>, r<RB>, <imm>" +# OBSOLETE signed32 src = imm; +# OBSOLETE while (src > 15) src -= 16; +# OBSOLETE while (src < -16) src += 16; +# OBSOLETE do_srlh(_SD, Ra, RbHU, src, 1); +# OBSOLETE do_srlh(_SD, Ra, RbLU, src, 0); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ST2H +# OBSOLETE +# OBSOLETE void::function::get_even_reg:int *reg, unsigned32 *r0, const char *name +# OBSOLETE if (*reg & 1) +# OBSOLETE sim_engine_abort (SD, CPU, cia, +# OBSOLETE "0x%lx:%s odd register (r%d) used in multi-word store", +# OBSOLETE (long) cia, name, *reg); +# OBSOLETE if (*reg == 0) +# OBSOLETE *r0 = 0; +# OBSOLETE else +# OBSOLETE *r0 = GPR[*reg]; +# OBSOLETE +# OBSOLETE void::function::do_st2h:int ra, unsigned32 rb, unsigned32 src +# OBSOLETE unsigned32 val_ra; +# OBSOLETE unsigned32 mem; +# OBSOLETE get_even_reg(_SD, &ra, &val_ra, "ST2H"); +# OBSOLETE mem = INSERTED32(val_ra, 0, 15) | +# OBSOLETE INSERTED32(GPR[ra + 1], 16, 31); +# OBSOLETE STORE(rb + src, 4, mem); +# OBSOLETE +# OBSOLETE _IMEM,10011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2H +# OBSOLETE "st2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "st2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_st2h(_SD, RA, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); +# OBSOLETE _IMEM,10011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2H long +# OBSOLETE "st2h r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_st2h(_SD, RA, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ST2W +# OBSOLETE +# OBSOLETE void::function::do_st2w:int ra, unsigned32 rb, unsigned32 src +# OBSOLETE unsigned32 val_ra; +# OBSOLETE unsigned64 mem; +# OBSOLETE get_even_reg(_SD, &ra, &val_ra, "ST2W"); +# OBSOLETE mem = INSERTED64(val_ra, 0, 31) | INSERTED64(GPR[ra + 1], 32, 63); +# OBSOLETE STORE(rb + src, 8, mem); +# OBSOLETE +# OBSOLETE _IMEM,10110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2W +# OBSOLETE "st2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "st2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_st2w(_SD, RA, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 8); +# OBSOLETE _IMEM,10110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2W long +# OBSOLETE "st2w r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_st2w(_SD, RA, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // ST4HB +# OBSOLETE +# OBSOLETE void::function::do_st4hb:int ra, unsigned32 rb, unsigned32 src +# OBSOLETE unsigned32 val_ra; +# OBSOLETE unsigned32 mem; +# OBSOLETE get_even_reg(_SD, &ra, &val_ra, "ST4HB"); +# OBSOLETE mem = INSERTED32(EXTRACTED32(val_ra, 8, 15), 0, 7) | +# OBSOLETE INSERTED32(EXTRACTED32(val_ra, 24, 31), 8, 15) | +# OBSOLETE INSERTED32(EXTRACTED32(GPR[ra + 1], 8, 15), 16, 23) | +# OBSOLETE INSERTED32(EXTRACTED32(GPR[ra + 1], 24, 31), 24, 31); +# OBSOLETE STORE(rb + src, 4, mem); +# OBSOLETE +# OBSOLETE _IMEM,10101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST4HB +# OBSOLETE "st4hb r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "st4hb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_st4hb(_SD, RA, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); +# OBSOLETE _IMEM,10101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST4HB long +# OBSOLETE "st4hb r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_st4hb(_SD, RA, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // STB +# OBSOLETE +# OBSOLETE void::function::do_stb:unsigned32 ra, unsigned32 rb, unsigned32 src +# OBSOLETE STORE(rb + src, 1, EXTRACTED32(ra, 24, 31)); +# OBSOLETE +# OBSOLETE _IMEM,10000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STB +# OBSOLETE "stb r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "stb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_stb(_SD, val_Ra, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 1); +# OBSOLETE _IMEM,10000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STB long +# OBSOLETE "stb r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_stb(_SD, val_Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // STH +# OBSOLETE +# OBSOLETE void::function::do_sth:unsigned32 ra, unsigned32 rb, unsigned32 src +# OBSOLETE STORE(rb + src, 2, EXTRACTED32(ra, 16, 31)); +# OBSOLETE +# OBSOLETE _IMEM,10010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STH +# OBSOLETE "sth r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "sth r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_sth(_SD, val_Ra, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2); +# OBSOLETE _IMEM,10010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STH long +# OBSOLETE "sth r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_sth(_SD, val_Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // STHH +# OBSOLETE +# OBSOLETE void::function::do_sthh:unsigned32 ra, unsigned32 rb, unsigned32 src +# OBSOLETE STORE(rb + src, 2, EXTRACTED32(ra, 0, 15)); +# OBSOLETE +# OBSOLETE _IMEM,10001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STHH +# OBSOLETE "sthh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "sthh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_sthh(_SD, val_Ra, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2); +# OBSOLETE _IMEM,10001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STHH long +# OBSOLETE "sthh r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_sthh(_SD, val_Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // STW +# OBSOLETE +# OBSOLETE void::function::do_stw:unsigned32 ra, unsigned32 rb, unsigned32 src +# OBSOLETE STORE(rb + src, 4, ra); +# OBSOLETE +# OBSOLETE _IMEM,10100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STW +# OBSOLETE "stw r<RA>, @(r<RB>, <SRC_6>)":XX == 0 +# OBSOLETE "stw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" +# OBSOLETE do_stw(_SD, val_Ra, Rb, src); +# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); +# OBSOLETE _IMEM,10100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STW long +# OBSOLETE "stw r<RA>, @(r<RB>, <imm>)" +# OBSOLETE do_stw(_SD, val_Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SUB +# OBSOLETE +# OBSOLETE void::function::do_sub:unsigned32 *ra, unsigned32 rb, unsigned32 imm +# OBSOLETE ALU_BEGIN(rb); +# OBSOLETE ALU_SUBB(imm); +# OBSOLETE ALU_END(ra); +# OBSOLETE +# OBSOLETE _IALU1,00010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB +# OBSOLETE "sub r<RA>, r<RB>, r<RC>" +# OBSOLETE do_sub (_SD, Ra, Rb, Rc); +# OBSOLETE _IALU1,00010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB imm +# OBSOLETE "sub r<RA>, r<RB>, <imm>" +# OBSOLETE do_sub (_SD, Ra, Rb, imm); +# OBSOLETE _IALU1,00010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB imm long +# OBSOLETE "sub r<RA>, r<RB>, <imm>" +# OBSOLETE do_sub (_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SUB2H +# OBSOLETE +# OBSOLETE void::function::do_sub2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm +# OBSOLETE unsigned16 high = VH2_4(rb) - VH2_4(imm); +# OBSOLETE unsigned16 low = VL2_4(rb) - VL2_4(imm); +# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low); +# OBSOLETE +# OBSOLETE _IALU1,00011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB2H +# OBSOLETE "sub2h r<RA>, r<RB>, r<RC>" +# OBSOLETE do_sub2h (_SD, Ra, Rb, Rc); +# OBSOLETE _IALU1,00011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB2H imm +# OBSOLETE "sub2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_sub2h (_SD, Ra, Rb, immHL); +# OBSOLETE _IALU1,00011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB2H imm long +# OBSOLETE "sub2h r<RA>, r<RB>, <imm>" +# OBSOLETE do_sub2h (_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SUBB +# OBSOLETE +# OBSOLETE void::function::do_subb:unsigned32 *ra, unsigned32 rb, unsigned32 imm +# OBSOLETE ALU_BEGIN(rb); +# OBSOLETE ALU_SUBB_B(imm, ALU_CARRY); +# OBSOLETE ALU_END(ra); +# OBSOLETE +# OBSOLETE _IALU1,00101,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBB +# OBSOLETE "subb r<RA>, r<RB>, r<RC>" +# OBSOLETE do_subb (_SD, Ra, Rb, Rc); +# OBSOLETE _IALU1,00101,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBB imm +# OBSOLETE "subb r<RA>, r<RB>, <imm>" +# OBSOLETE do_subb (_SD, Ra, Rb, imm); +# OBSOLETE _IALU1,00101,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBB imm long +# OBSOLETE "subb r<RA>, r<RB>, <imm>" +# OBSOLETE do_subb (_SD, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // SUBHppp +# OBSOLETE +# OBSOLETE void::function::do_subh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src +# OBSOLETE switch (ppp) { +# OBSOLETE case 0x0: /* LLL */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VL2_4(rb)); +# OBSOLETE ALU16_SUBB(VL2_4(src)); +# OBSOLETE ALU16_END(ra, 0); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x1: /* LLH */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VL2_4(rb)); +# OBSOLETE ALU16_SUBB(VH2_4(src)); +# OBSOLETE ALU16_END(ra, 0); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x2: /* LHL */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VH2_4(rb)); +# OBSOLETE ALU16_SUBB(VL2_4(src)); +# OBSOLETE ALU16_END(ra, 0); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x3: /* LHH */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VH2_4(rb)); +# OBSOLETE ALU16_SUBB(VH2_4(src)); +# OBSOLETE ALU16_END(ra, 0); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x4: /* HLL */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VL2_4(rb)); +# OBSOLETE ALU16_SUBB(VL2_4(src)); +# OBSOLETE ALU16_END(ra, 1); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x5: /* HLH */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VL2_4(rb)); +# OBSOLETE ALU16_SUBB(VH2_4(src)); +# OBSOLETE ALU16_END(ra, 1); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x6: /* HHL */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VH2_4(rb)); +# OBSOLETE ALU16_SUBB(VL2_4(src)); +# OBSOLETE ALU16_END(ra, 1); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE case 0x7: /* HHH */ +# OBSOLETE { +# OBSOLETE ALU16_BEGIN(VH2_4(rb)); +# OBSOLETE ALU16_SUBB(VH2_4(src)); +# OBSOLETE ALU16_END(ra, 1); +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE default: +# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_subh_ppp - internal error - bad switch"); +# OBSOLETE } +# OBSOLETE +# OBSOLETE _IALU1,11,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBHppp +# OBSOLETE "subh%s<ppp> r<RA>, r<RB>, r<RC>" +# OBSOLETE do_subh_ppp(_SD, ppp, Ra, Rb, Rc); +# OBSOLETE _IALU1,11,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBHppp imm +# OBSOLETE "subh%s<ppp> r<RA>, r<RB>, <imm>" +# OBSOLETE do_subh_ppp(_SD, ppp, Ra, Rb, immHL); +# OBSOLETE _IALU1,11,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBHppp imm long +# OBSOLETE "subh%s<ppp> r<RA>, r<RB>, <imm>" +# OBSOLETE do_subh_ppp(_SD, ppp, Ra, Rb, imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // TRAP +# OBSOLETE +# OBSOLETE address_word::function::do_trap:address_word trap_vector, address_word nia +# OBSOLETE /* Steal trap 31 for doing system calls */ +# OBSOLETE /* System calls are defined in libgloss/d30v/syscall.h. */ +# OBSOLETE if (trap_vector == EIT_VB + 0x20 + (31 << 3)) +# OBSOLETE { +# OBSOLETE enum { PARM1 = 2, PARM2, PARM3, PARM4, FUNC }; +# OBSOLETE if (GPR[FUNC] == 1) /* exit */ +# OBSOLETE { +# OBSOLETE sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, cia, sim_exited, +# OBSOLETE GPR[PARM1]); +# OBSOLETE return -1; /* dummy */ +# OBSOLETE } +# OBSOLETE else +# OBSOLETE { +# OBSOLETE CB_SYSCALL syscall; +# OBSOLETE +# OBSOLETE CB_SYSCALL_INIT (&syscall); +# OBSOLETE syscall.arg1 = GPR[PARM1]; +# OBSOLETE syscall.arg2 = GPR[PARM2]; +# OBSOLETE syscall.arg3 = GPR[PARM3]; +# OBSOLETE syscall.arg4 = GPR[PARM4]; +# OBSOLETE syscall.func = GPR[FUNC]; +# OBSOLETE syscall.p1 = (PTR) SD; +# OBSOLETE syscall.read_mem = d30v_read_mem; +# OBSOLETE syscall.write_mem = d30v_write_mem; +# OBSOLETE +# OBSOLETE WRITE32_QUEUE (&GPR[PARM1], +# OBSOLETE ((cb_syscall (STATE_CALLBACK (SD), &syscall) +# OBSOLETE == CB_RC_OK) +# OBSOLETE ? syscall.result +# OBSOLETE : -syscall.errcode)); +# OBSOLETE return nia; +# OBSOLETE } +# OBSOLETE } +# OBSOLETE else if (TRACE_TRAP_P) +# OBSOLETE { +# OBSOLETE int reg, i; +# OBSOLETE sim_io_eprintf (sd, "\nTrap %ld:\n", (long) ((trap_vector - (EIT_VB + 0x20)) >> 3)); +# OBSOLETE for (reg = 0; reg < NR_GENERAL_PURPOSE_REGISTERS; reg += 8) +# OBSOLETE { +# OBSOLETE sim_io_eprintf (sd, "r%.2d - r%.2d: ", reg, reg+7); +# OBSOLETE for (i = 0; i < 8; i++) +# OBSOLETE sim_io_eprintf (sd, " 0x%.8lx", (long) GPR[reg+i]); +# OBSOLETE sim_io_eprintf (sd, "\n"); +# OBSOLETE } +# OBSOLETE +# OBSOLETE for (reg = 0; reg < 16; reg += 8) +# OBSOLETE { +# OBSOLETE sim_io_eprintf (sd, "cr%.2d - cr%.2d:", reg, reg+7); +# OBSOLETE for (i = 0; i < 8; i++) +# OBSOLETE sim_io_eprintf (sd, " 0x%.8lx", (long) CREG[reg+i]); +# OBSOLETE sim_io_eprintf (sd, "\n"); +# OBSOLETE } +# OBSOLETE +# OBSOLETE sim_io_eprintf (sd, "a0 - a1: "); +# OBSOLETE for (reg = 0; reg < NR_ACCUMULATORS; reg++) +# OBSOLETE sim_io_eprintf (sd, " 0x%.8lx 0x%.8lx", +# OBSOLETE (long)EXTRACTED64(ACC[reg], 0, 31), +# OBSOLETE (long)EXTRACTED64(ACC[reg], 32, 63)); +# OBSOLETE sim_io_eprintf (sd, "\n"); +# OBSOLETE +# OBSOLETE sim_io_eprintf (sd, "f0 - f7: "); +# OBSOLETE sim_io_eprintf (sd, " (f0) %d", (int) PSW_VAL(PSW_F0)); +# OBSOLETE sim_io_eprintf (sd, " (f1) %d", (int) PSW_VAL(PSW_F1)); +# OBSOLETE sim_io_eprintf (sd, " (f2) %d", (int) PSW_VAL(PSW_F2)); +# OBSOLETE sim_io_eprintf (sd, " (f3) %d", (int) PSW_VAL(PSW_F3)); +# OBSOLETE sim_io_eprintf (sd, " (s) %d", (int) PSW_VAL(PSW_S)); +# OBSOLETE sim_io_eprintf (sd, " (v) %d", (int) PSW_VAL(PSW_V)); +# OBSOLETE sim_io_eprintf (sd, " (va) %d", (int) PSW_VAL(PSW_VA)); +# OBSOLETE sim_io_eprintf (sd, " (c) %d\n", (int) PSW_VAL(PSW_C)); +# OBSOLETE +# OBSOLETE sim_io_eprintf (sd, "pswh: "); +# OBSOLETE sim_io_eprintf (sd, " (sm) %d", (int) PSW_VAL(PSW_SM)); +# OBSOLETE sim_io_eprintf (sd, " (ea) %d", (int) PSW_VAL(PSW_EA)); +# OBSOLETE sim_io_eprintf (sd, " (ie) %d", (int) PSW_VAL(PSW_IE)); +# OBSOLETE sim_io_eprintf (sd, " (rp) %d", (int) PSW_VAL(PSW_RP)); +# OBSOLETE sim_io_eprintf (sd, " (md) %d", (int) PSW_VAL(PSW_MD)); +# OBSOLETE +# OBSOLETE if (PSW_VAL(PSW_DB)) +# OBSOLETE sim_io_eprintf (sd, " (db) %d", (int) PSW_VAL(PSW_DB)); +# OBSOLETE +# OBSOLETE if (PSW_VAL(PSW_DS)) +# OBSOLETE sim_io_eprintf (sd, " (ds) %d", (int) PSW_VAL(PSW_DS)); +# OBSOLETE +# OBSOLETE sim_io_eprintf (sd, "\n"); +# OBSOLETE return nia; +# OBSOLETE } +# OBSOLETE else +# OBSOLETE { +# OBSOLETE if(PSW_VAL(PSW_RP) && RPT_E == cia) +# OBSOLETE { +# OBSOLETE WRITE32_QUEUE (&bPC, RPT_S); +# OBSOLETE if (RPT_C == 0) +# OBSOLETE PSW_SET (PSW_RP, 0); +# OBSOLETE } +# OBSOLETE else +# OBSOLETE WRITE32_QUEUE (&bPC, cia + 8); +# OBSOLETE DID_TRAP = 1; +# OBSOLETE return trap_vector; +# OBSOLETE } +# OBSOLETE +# OBSOLETE _BRA,01001,00,6.**,6.**,6.RC:BRA:short:mu:TRAP +# OBSOLETE "trap r<RC>" +# OBSOLETE nia = do_trap (_SD, EIT_VB + 0x20 + MASKED32(Rc, 24, 28), nia); +# OBSOLETE _BRA,01001,10,6.**,6.**,_IMM6:BRA:short:mu:TRAP imm +# OBSOLETE "trap <imm>" +# OBSOLETE nia = do_trap (_SD, EIT_VB + 0x20 + (imm_5 << 3), nia); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // XOR +# OBSOLETE +# OBSOLETE _LOGIC,11011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:XOR +# OBSOLETE "xor r<RA>, r<RB>, r<RC>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ Rc); +# OBSOLETE _LOGIC,11011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:XOR imm +# OBSOLETE "xor r<RA>, r<RB>, <imm>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ imm); +# OBSOLETE _LOGIC,11011,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:XOR imm long +# OBSOLETE "xor r<RA>, r<RB>, <imm>" +# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ imm); +# OBSOLETE +# OBSOLETE +# OBSOLETE +# OBSOLETE // XORFG +# OBSOLETE +# OBSOLETE _LOGIC,01011,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:XORFG +# OBSOLETE "xorfg f<FA>, f<FB>, f<FC>" +# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ PSW_FLAG_VAL(FC)); +# OBSOLETE _LOGIC,01011,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:XORFG imm +# OBSOLETE "xorfg f<FA>, f<FB>, <imm_6>" +# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ (imm_6 & 1)); diff --git a/sim/d30v/dc-short b/sim/d30v/dc-short index 1451dfa..95887ec 100644 --- a/sim/d30v/dc-short +++ b/sim/d30v/dc-short @@ -1,22 +1,22 @@ -// -// Mitsubishi Electric Corp. D30V Simulator. -// Copyright (C) 1997, Free Software Foundation, Inc. -// Contributed by Cygnus Solutions Inc. -// -// This file is part of GDB, the GNU debugger. -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -// -switch: 4: 13: 4: 13 +# OBSOLETE // +# OBSOLETE // Mitsubishi Electric Corp. D30V Simulator. +# OBSOLETE // Copyright (C) 1997, Free Software Foundation, Inc. +# OBSOLETE // Contributed by Cygnus Solutions Inc. +# OBSOLETE // +# OBSOLETE // This file is part of GDB, the GNU debugger. +# OBSOLETE // +# OBSOLETE // This program is free software; you can redistribute it and/or modify +# OBSOLETE // it under the terms of the GNU General Public License as published by +# OBSOLETE // the Free Software Foundation; either version 2 of the License, or +# OBSOLETE // (at your option) any later version. +# OBSOLETE // +# OBSOLETE // This program is distributed in the hope that it will be useful, +# OBSOLETE // but WITHOUT ANY WARRANTY; without even the implied warranty of +# OBSOLETE // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# OBSOLETE // GNU General Public License for more details. +# OBSOLETE // +# OBSOLETE // You should have received a copy of the GNU General Public License +# OBSOLETE // along with this program; if not, write to the Free Software +# OBSOLETE // Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# OBSOLETE // +# OBSOLETE switch: 4: 13: 4: 13 diff --git a/sim/d30v/engine.c b/sim/d30v/engine.c index 2bbaad1..0f4a025 100644 --- a/sim/d30v/engine.c +++ b/sim/d30v/engine.c @@ -1,496 +1,496 @@ -/* This file is part of the program psim. - - Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> - Copyright (C) 1996, 1997, Free Software Foundation - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - - */ - - -#ifndef ENGINE_C -#define ENGINE_C - -#include "sim-main.h" - -#include <stdio.h> -#include <ctype.h> - -#ifdef HAVE_STDLIB_H -#include <stdlib.h> -#endif - -#ifdef HAVE_STRING_H -#include <string.h> -#else -#ifdef HAVE_STRINGS_H -#include <strings.h> -#endif -#endif - -static void -do_stack_swap (SIM_DESC sd) -{ - sim_cpu *cpu = STATE_CPU (sd, 0); - unsigned new_sp = (PSW_VAL(PSW_SM) != 0); - if (cpu->regs.current_sp != new_sp) - { - cpu->regs.sp[cpu->regs.current_sp] = SP; - cpu->regs.current_sp = new_sp; - SP = cpu->regs.sp[cpu->regs.current_sp]; - } -} - -#if WITH_TRACE -/* Implement ALU tracing of 32-bit registers. */ -static void -trace_alu32 (SIM_DESC sd, - sim_cpu *cpu, - address_word cia, - unsigned32 *ptr) -{ - unsigned32 value = *ptr; - - if (ptr >= &GPR[0] && ptr <= &GPR[NR_GENERAL_PURPOSE_REGISTERS]) - trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", - "Set register r%-2d = 0x%.8lx (%ld)", - ptr - &GPR[0], (long)value, (long)value); - - else if (ptr == &PSW || ptr == &bPSW || ptr == &DPSW) - trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", - "Set register %s = 0x%.8lx%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", - (ptr == &PSW) ? "psw" : ((ptr == &bPSW) ? "bpsw" : "dpsw"), - (long)value, - (value & (0x80000000 >> PSW_SM)) ? ", sm" : "", - (value & (0x80000000 >> PSW_EA)) ? ", ea" : "", - (value & (0x80000000 >> PSW_DB)) ? ", db" : "", - (value & (0x80000000 >> PSW_DS)) ? ", ds" : "", - (value & (0x80000000 >> PSW_IE)) ? ", ie" : "", - (value & (0x80000000 >> PSW_RP)) ? ", rp" : "", - (value & (0x80000000 >> PSW_MD)) ? ", md" : "", - (value & (0x80000000 >> PSW_F0)) ? ", f0" : "", - (value & (0x80000000 >> PSW_F1)) ? ", f1" : "", - (value & (0x80000000 >> PSW_F2)) ? ", f2" : "", - (value & (0x80000000 >> PSW_F3)) ? ", f3" : "", - (value & (0x80000000 >> PSW_S)) ? ", s" : "", - (value & (0x80000000 >> PSW_V)) ? ", v" : "", - (value & (0x80000000 >> PSW_VA)) ? ", va" : "", - (value & (0x80000000 >> PSW_C)) ? ", c" : ""); - - else if (ptr >= &CREG[0] && ptr <= &CREG[NR_CONTROL_REGISTERS]) - trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", - "Set register cr%d = 0x%.8lx (%ld)", - ptr - &CREG[0], (long)value, (long)value); -} - -/* Implement ALU tracing of 32-bit registers. */ -static void -trace_alu64 (SIM_DESC sd, - sim_cpu *cpu, - address_word cia, - unsigned64 *ptr) -{ - unsigned64 value = *ptr; - - if (ptr >= &ACC[0] && ptr <= &ACC[NR_ACCUMULATORS]) - trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", - "Set register a%-2d = 0x%.8lx 0x%.8lx", - ptr - &ACC[0], - (unsigned long)(unsigned32)(value >> 32), - (unsigned long)(unsigned32)value); - -} -#endif - -/* Process all of the queued up writes in order now */ -void -unqueue_writes (SIM_DESC sd, - sim_cpu *cpu, - address_word cia) -{ - int i, num; - int did_psw = 0; - unsigned32 *psw_addr = &PSW; - - num = WRITE32_NUM; - for (i = 0; i < num; i++) - { - unsigned32 mask = WRITE32_MASK (i); - unsigned32 *ptr = WRITE32_PTR (i); - unsigned32 value = (*ptr & ~mask) | (WRITE32_VALUE (i) & mask); - int j; - - if (ptr == psw_addr) - { - /* If MU instruction was not a MVTSYS, resolve PSW - contention in favour of IU. */ - if(! STATE_CPU (sd, 0)->mvtsys_left_p) - { - /* Detect contention in parallel writes to the same PSW flags. - The hardware allows the updates from IU to prevail over - those from MU. */ - - unsigned32 flag_bits = - BIT32 (PSW_F0) | BIT32 (PSW_F1) | - BIT32 (PSW_F2) | BIT32 (PSW_F3) | - BIT32 (PSW_S) | BIT32 (PSW_V) | - BIT32 (PSW_VA) | BIT32 (PSW_C); - unsigned32 my_flag_bits = mask & flag_bits; - - for (j = i + 1; j < num; j++) - if (WRITE32_PTR (j) == psw_addr && /* write to PSW */ - WRITE32_MASK (j) & my_flag_bits) /* some of the same flags */ - { - /* Recompute local mask & value, to suppress this - earlier write to the same flag bits. */ - - unsigned32 new_mask = mask & ~(WRITE32_MASK (j) & my_flag_bits); - - /* There is a special case for the VA (accumulated - overflow) flag, in that it is only included in the - second instruction's mask if the overflow - occurred. Yet the hardware still suppresses the - first instruction's update to VA. So we kludge - this by inferring PSW_V -> PSW_VA for the second - instruction. */ - - if (WRITE32_MASK (j) & BIT32 (PSW_V)) - { - new_mask &= ~BIT32 (PSW_VA); - } - - value = (*ptr & ~new_mask) | (WRITE32_VALUE (i) & new_mask); - } - } - - did_psw = 1; - } - - *ptr = value; - -#if WITH_TRACE - if (TRACE_ALU_P (cpu)) - trace_alu32 (sd, cpu, cia, ptr); -#endif - } - - num = WRITE64_NUM; - for (i = 0; i < num; i++) - { - unsigned64 *ptr = WRITE64_PTR (i); - *ptr = WRITE64_VALUE (i); - -#if WITH_TRACE - if (TRACE_ALU_P (cpu)) - trace_alu64 (sd, cpu, cia, ptr); -#endif - } - - WRITE32_NUM = 0; - WRITE64_NUM = 0; - - if (DID_TRAP == 1) /* ordinary trap */ - { - bPSW = PSW; - PSW &= (BIT32 (PSW_DB) | BIT32 (PSW_SM)); - did_psw = 1; - } - else if (DID_TRAP == 2) /* debug trap */ - { - DPSW = PSW; - PSW &= BIT32 (PSW_DS); - PSW |= BIT32 (PSW_DS); - did_psw = 1; - } - DID_TRAP = 0; - - if (did_psw) - do_stack_swap (sd); -} - - -/* SIMULATE INSTRUCTIONS, various different ways of achieving the same - thing */ - -static address_word -do_long (SIM_DESC sd, - l_instruction_word instruction, - address_word cia) -{ - address_word nia = l_idecode_issue(sd, - instruction, - cia); - - unqueue_writes (sd, STATE_CPU (sd, 0), cia); - return nia; -} - -static address_word -do_2_short (SIM_DESC sd, - s_instruction_word insn1, - s_instruction_word insn2, - cpu_units unit, - address_word cia) -{ - address_word nia; - - /* run the first instruction */ - STATE_CPU (sd, 0)->unit = unit; - STATE_CPU (sd, 0)->left_kills_right_p = 0; - STATE_CPU (sd, 0)->mvtsys_left_p = 0; - nia = s_idecode_issue(sd, - insn1, - cia); - - unqueue_writes (sd, STATE_CPU (sd, 0), cia); - - /* Only do the second instruction if the PC has not changed */ - if ((nia == INVALID_INSTRUCTION_ADDRESS) && - (! STATE_CPU (sd, 0)->left_kills_right_p)) { - STATE_CPU (sd, 0)->unit = any_unit; - nia = s_idecode_issue (sd, - insn2, - cia); - - unqueue_writes (sd, STATE_CPU (sd, 0), cia); - } - - STATE_CPU (sd, 0)->left_kills_right_p = 0; - STATE_CPU (sd, 0)->mvtsys_left_p = 0; - return nia; -} - -static address_word -do_parallel (SIM_DESC sd, - s_instruction_word left_insn, - s_instruction_word right_insn, - address_word cia) -{ - address_word nia_left; - address_word nia_right; - address_word nia; - - /* run the first instruction */ - STATE_CPU (sd, 0)->unit = memory_unit; - STATE_CPU (sd, 0)->left_kills_right_p = 0; - STATE_CPU (sd, 0)->mvtsys_left_p = 0; - nia_left = s_idecode_issue(sd, - left_insn, - cia); - - /* run the second instruction */ - STATE_CPU (sd, 0)->unit = integer_unit; - nia_right = s_idecode_issue(sd, - right_insn, - cia); - - /* merge the PC's */ - if (nia_left == INVALID_INSTRUCTION_ADDRESS) { - if (nia_right == INVALID_INSTRUCTION_ADDRESS) - nia = INVALID_INSTRUCTION_ADDRESS; - else - nia = nia_right; - } - else { - if (nia_right == INVALID_INSTRUCTION_ADDRESS) - nia = nia_left; - else { - sim_engine_abort (sd, STATE_CPU (sd, 0), cia, "parallel jumps"); - nia = INVALID_INSTRUCTION_ADDRESS; - } - } - - unqueue_writes (sd, STATE_CPU (sd, 0), cia); - return nia; -} - - -typedef enum { - p_insn = 0, - long_insn = 3, - l_r_insn = 1, - r_l_insn = 2, -} instruction_types; - -STATIC_INLINE instruction_types -instruction_type(l_instruction_word insn) -{ - int fm0 = MASKED64(insn, 0, 0) != 0; - int fm1 = MASKED64(insn, 32, 32) != 0; - return ((fm0 << 1) | fm1); -} - - - -void -sim_engine_run (SIM_DESC sd, - int last_cpu_nr, - int nr_cpus, - int siggnal) -{ - while (1) - { - address_word cia = PC; - address_word nia; - l_instruction_word insn = IMEM(cia); - int rp_was_set; - int rpt_c_was_nonzero; - - /* Before executing the instruction, we need to test whether or - not RPT_C is greater than zero, and save that state for use - after executing the instruction. In particular, we need to - not care whether the instruction changes RPT_C itself. */ - - rpt_c_was_nonzero = (RPT_C > 0); - - /* Before executing the instruction, we need to check to see if - we have to decrement RPT_C, the repeat count register. Do this - if PC == RPT_E, but only if we are in an active repeat block. */ - - if (PC == RPT_E && - (RPT_C > 0 || PSW_VAL (PSW_RP) != 0)) - { - RPT_C --; - } - - /* Now execute the instruction at PC */ - - switch (instruction_type (insn)) - { - case long_insn: - nia = do_long (sd, insn, cia); - break; - case r_l_insn: - /* L <- R */ - nia = do_2_short (sd, insn, insn >> 32, integer_unit, cia); - break; - case l_r_insn: - /* L -> R */ - nia = do_2_short (sd, insn >> 32, insn, memory_unit, cia); - break; - case p_insn: - nia = do_parallel (sd, insn >> 32, insn, cia); - break; - default: - sim_engine_abort (sd, STATE_CPU (sd, 0), cia, - "internal error - engine_run_until_stop - bad switch"); - nia = -1; - } - - if (TRACE_ACTION) - { - if (TRACE_ACTION & TRACE_ACTION_CALL) - call_occurred (sd, STATE_CPU (sd, 0), cia, nia); - - if (TRACE_ACTION & TRACE_ACTION_RETURN) - return_occurred (sd, STATE_CPU (sd, 0), cia, nia); - - TRACE_ACTION = 0; - } - - /* Check now to see if we need to reset the RP bit in the PSW. - There are three conditions for this, the RP bit is already - set (just a speed optimization), the instruction we just - executed is the last instruction in the loop, and the repeat - count is currently zero. */ - - rp_was_set = PSW_VAL (PSW_RP); - if (rp_was_set && (PC == RPT_E) && RPT_C == 0) - { - PSW_SET (PSW_RP, 0); - } - - /* Now update the PC. If we just executed a jump instruction, - that takes precedence over everything else. Next comes - branching back to RPT_S as a result of a loop. Finally, the - default is to simply advance to the next inline - instruction. */ - - if (nia != INVALID_INSTRUCTION_ADDRESS) - { - PC = nia; - } - else if (rp_was_set && rpt_c_was_nonzero && (PC == RPT_E)) - { - PC = RPT_S; - } - else - { - PC = cia + 8; - } - - /* Check for DDBT (debugger debug trap) condition. Do this after - the repeat block checks so the excursion to the trap handler does - not alter looping state. */ - - if (cia == IBA && PSW_VAL (PSW_DB)) - { - DPC = PC; - PSW_SET (PSW_EA, 1); - DPSW = PSW; - /* clear all bits in PSW except SM */ - PSW &= BIT32 (PSW_SM); - /* add DS bit */ - PSW |= BIT32 (PSW_DS); - /* dispatch to DDBT handler */ - PC = 0xfffff128; /* debugger_debug_trap_address */ - } - - /* process any events */ - /* FIXME - should L->R or L<-R insns count as two cycles? */ - if (sim_events_tick (sd)) - { - sim_events_process (sd); - } - } -} - - -/* d30v external interrupt handler. - - Note: This should be replaced by a proper interrupt delivery - mechanism. This interrupt mechanism discards later interrupts if - an earlier interrupt hasn't been delivered. - - Note: This interrupt mechanism does not reset its self when the - simulator is re-opened. */ - -void -d30v_interrupt_event (SIM_DESC sd, - void *data) -{ - if (PSW_VAL (PSW_IE)) - /* interrupts not masked */ - { - /* scrub any pending interrupt */ - if (sd->pending_interrupt != NULL) - sim_events_deschedule (sd, sd->pending_interrupt); - /* deliver */ - bPSW = PSW; - bPC = PC; - PSW = 0; - PC = 0xfffff138; /* external interrupt */ - do_stack_swap (sd); - } - else if (sd->pending_interrupt == NULL) - /* interrupts masked and no interrupt pending */ - { - sd->pending_interrupt = sim_events_schedule (sd, 1, - d30v_interrupt_event, - data); - } -} - -#endif +/* OBSOLETE /* This file is part of the program psim. */ +/* OBSOLETE */ +/* OBSOLETE Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> */ +/* OBSOLETE Copyright (C) 1996, 1997, Free Software Foundation */ +/* OBSOLETE */ +/* OBSOLETE This program is free software; you can redistribute it and/or modify */ +/* OBSOLETE it under the terms of the GNU General Public License as published by */ +/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */ +/* OBSOLETE (at your option) any later version. */ +/* OBSOLETE */ +/* OBSOLETE This program is distributed in the hope that it will be useful, */ +/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ +/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ +/* OBSOLETE GNU General Public License for more details. */ +/* OBSOLETE */ +/* OBSOLETE You should have received a copy of the GNU General Public License */ +/* OBSOLETE along with this program; if not, write to the Free Software */ +/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +/* OBSOLETE */ +/* OBSOLETE */ */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #ifndef ENGINE_C */ +/* OBSOLETE #define ENGINE_C */ +/* OBSOLETE */ +/* OBSOLETE #include "sim-main.h" */ +/* OBSOLETE */ +/* OBSOLETE #include <stdio.h> */ +/* OBSOLETE #include <ctype.h> */ +/* OBSOLETE */ +/* OBSOLETE #ifdef HAVE_STDLIB_H */ +/* OBSOLETE #include <stdlib.h> */ +/* OBSOLETE #endif */ +/* OBSOLETE */ +/* OBSOLETE #ifdef HAVE_STRING_H */ +/* OBSOLETE #include <string.h> */ +/* OBSOLETE #else */ +/* OBSOLETE #ifdef HAVE_STRINGS_H */ +/* OBSOLETE #include <strings.h> */ +/* OBSOLETE #endif */ +/* OBSOLETE #endif */ +/* OBSOLETE */ +/* OBSOLETE static void */ +/* OBSOLETE do_stack_swap (SIM_DESC sd) */ +/* OBSOLETE { */ +/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */ +/* OBSOLETE unsigned new_sp = (PSW_VAL(PSW_SM) != 0); */ +/* OBSOLETE if (cpu->regs.current_sp != new_sp) */ +/* OBSOLETE { */ +/* OBSOLETE cpu->regs.sp[cpu->regs.current_sp] = SP; */ +/* OBSOLETE cpu->regs.current_sp = new_sp; */ +/* OBSOLETE SP = cpu->regs.sp[cpu->regs.current_sp]; */ +/* OBSOLETE } */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE #if WITH_TRACE */ +/* OBSOLETE /* Implement ALU tracing of 32-bit registers. */ */ +/* OBSOLETE static void */ +/* OBSOLETE trace_alu32 (SIM_DESC sd, */ +/* OBSOLETE sim_cpu *cpu, */ +/* OBSOLETE address_word cia, */ +/* OBSOLETE unsigned32 *ptr) */ +/* OBSOLETE { */ +/* OBSOLETE unsigned32 value = *ptr; */ +/* OBSOLETE */ +/* OBSOLETE if (ptr >= &GPR[0] && ptr <= &GPR[NR_GENERAL_PURPOSE_REGISTERS]) */ +/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */ +/* OBSOLETE "Set register r%-2d = 0x%.8lx (%ld)", */ +/* OBSOLETE ptr - &GPR[0], (long)value, (long)value); */ +/* OBSOLETE */ +/* OBSOLETE else if (ptr == &PSW || ptr == &bPSW || ptr == &DPSW) */ +/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */ +/* OBSOLETE "Set register %s = 0x%.8lx%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", */ +/* OBSOLETE (ptr == &PSW) ? "psw" : ((ptr == &bPSW) ? "bpsw" : "dpsw"), */ +/* OBSOLETE (long)value, */ +/* OBSOLETE (value & (0x80000000 >> PSW_SM)) ? ", sm" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_EA)) ? ", ea" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_DB)) ? ", db" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_DS)) ? ", ds" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_IE)) ? ", ie" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_RP)) ? ", rp" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_MD)) ? ", md" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_F0)) ? ", f0" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_F1)) ? ", f1" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_F2)) ? ", f2" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_F3)) ? ", f3" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_S)) ? ", s" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_V)) ? ", v" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_VA)) ? ", va" : "", */ +/* OBSOLETE (value & (0x80000000 >> PSW_C)) ? ", c" : ""); */ +/* OBSOLETE */ +/* OBSOLETE else if (ptr >= &CREG[0] && ptr <= &CREG[NR_CONTROL_REGISTERS]) */ +/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */ +/* OBSOLETE "Set register cr%d = 0x%.8lx (%ld)", */ +/* OBSOLETE ptr - &CREG[0], (long)value, (long)value); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* Implement ALU tracing of 32-bit registers. */ */ +/* OBSOLETE static void */ +/* OBSOLETE trace_alu64 (SIM_DESC sd, */ +/* OBSOLETE sim_cpu *cpu, */ +/* OBSOLETE address_word cia, */ +/* OBSOLETE unsigned64 *ptr) */ +/* OBSOLETE { */ +/* OBSOLETE unsigned64 value = *ptr; */ +/* OBSOLETE */ +/* OBSOLETE if (ptr >= &ACC[0] && ptr <= &ACC[NR_ACCUMULATORS]) */ +/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */ +/* OBSOLETE "Set register a%-2d = 0x%.8lx 0x%.8lx", */ +/* OBSOLETE ptr - &ACC[0], */ +/* OBSOLETE (unsigned long)(unsigned32)(value >> 32), */ +/* OBSOLETE (unsigned long)(unsigned32)value); */ +/* OBSOLETE */ +/* OBSOLETE } */ +/* OBSOLETE #endif */ +/* OBSOLETE */ +/* OBSOLETE /* Process all of the queued up writes in order now */ */ +/* OBSOLETE void */ +/* OBSOLETE unqueue_writes (SIM_DESC sd, */ +/* OBSOLETE sim_cpu *cpu, */ +/* OBSOLETE address_word cia) */ +/* OBSOLETE { */ +/* OBSOLETE int i, num; */ +/* OBSOLETE int did_psw = 0; */ +/* OBSOLETE unsigned32 *psw_addr = &PSW; */ +/* OBSOLETE */ +/* OBSOLETE num = WRITE32_NUM; */ +/* OBSOLETE for (i = 0; i < num; i++) */ +/* OBSOLETE { */ +/* OBSOLETE unsigned32 mask = WRITE32_MASK (i); */ +/* OBSOLETE unsigned32 *ptr = WRITE32_PTR (i); */ +/* OBSOLETE unsigned32 value = (*ptr & ~mask) | (WRITE32_VALUE (i) & mask); */ +/* OBSOLETE int j; */ +/* OBSOLETE */ +/* OBSOLETE if (ptr == psw_addr) */ +/* OBSOLETE { */ +/* OBSOLETE /* If MU instruction was not a MVTSYS, resolve PSW */ +/* OBSOLETE contention in favour of IU. */ */ +/* OBSOLETE if(! STATE_CPU (sd, 0)->mvtsys_left_p) */ +/* OBSOLETE { */ +/* OBSOLETE /* Detect contention in parallel writes to the same PSW flags. */ +/* OBSOLETE The hardware allows the updates from IU to prevail over */ +/* OBSOLETE those from MU. */ */ +/* OBSOLETE */ +/* OBSOLETE unsigned32 flag_bits = */ +/* OBSOLETE BIT32 (PSW_F0) | BIT32 (PSW_F1) | */ +/* OBSOLETE BIT32 (PSW_F2) | BIT32 (PSW_F3) | */ +/* OBSOLETE BIT32 (PSW_S) | BIT32 (PSW_V) | */ +/* OBSOLETE BIT32 (PSW_VA) | BIT32 (PSW_C); */ +/* OBSOLETE unsigned32 my_flag_bits = mask & flag_bits; */ +/* OBSOLETE */ +/* OBSOLETE for (j = i + 1; j < num; j++) */ +/* OBSOLETE if (WRITE32_PTR (j) == psw_addr && /* write to PSW */ */ +/* OBSOLETE WRITE32_MASK (j) & my_flag_bits) /* some of the same flags */ */ +/* OBSOLETE { */ +/* OBSOLETE /* Recompute local mask & value, to suppress this */ +/* OBSOLETE earlier write to the same flag bits. */ */ +/* OBSOLETE */ +/* OBSOLETE unsigned32 new_mask = mask & ~(WRITE32_MASK (j) & my_flag_bits); */ +/* OBSOLETE */ +/* OBSOLETE /* There is a special case for the VA (accumulated */ +/* OBSOLETE overflow) flag, in that it is only included in the */ +/* OBSOLETE second instruction's mask if the overflow */ +/* OBSOLETE occurred. Yet the hardware still suppresses the */ +/* OBSOLETE first instruction's update to VA. So we kludge */ +/* OBSOLETE this by inferring PSW_V -> PSW_VA for the second */ +/* OBSOLETE instruction. */ */ +/* OBSOLETE */ +/* OBSOLETE if (WRITE32_MASK (j) & BIT32 (PSW_V)) */ +/* OBSOLETE { */ +/* OBSOLETE new_mask &= ~BIT32 (PSW_VA); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE value = (*ptr & ~new_mask) | (WRITE32_VALUE (i) & new_mask); */ +/* OBSOLETE } */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE did_psw = 1; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE *ptr = value; */ +/* OBSOLETE */ +/* OBSOLETE #if WITH_TRACE */ +/* OBSOLETE if (TRACE_ALU_P (cpu)) */ +/* OBSOLETE trace_alu32 (sd, cpu, cia, ptr); */ +/* OBSOLETE #endif */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE num = WRITE64_NUM; */ +/* OBSOLETE for (i = 0; i < num; i++) */ +/* OBSOLETE { */ +/* OBSOLETE unsigned64 *ptr = WRITE64_PTR (i); */ +/* OBSOLETE *ptr = WRITE64_VALUE (i); */ +/* OBSOLETE */ +/* OBSOLETE #if WITH_TRACE */ +/* OBSOLETE if (TRACE_ALU_P (cpu)) */ +/* OBSOLETE trace_alu64 (sd, cpu, cia, ptr); */ +/* OBSOLETE #endif */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE WRITE32_NUM = 0; */ +/* OBSOLETE WRITE64_NUM = 0; */ +/* OBSOLETE */ +/* OBSOLETE if (DID_TRAP == 1) /* ordinary trap */ */ +/* OBSOLETE { */ +/* OBSOLETE bPSW = PSW; */ +/* OBSOLETE PSW &= (BIT32 (PSW_DB) | BIT32 (PSW_SM)); */ +/* OBSOLETE did_psw = 1; */ +/* OBSOLETE } */ +/* OBSOLETE else if (DID_TRAP == 2) /* debug trap */ */ +/* OBSOLETE { */ +/* OBSOLETE DPSW = PSW; */ +/* OBSOLETE PSW &= BIT32 (PSW_DS); */ +/* OBSOLETE PSW |= BIT32 (PSW_DS); */ +/* OBSOLETE did_psw = 1; */ +/* OBSOLETE } */ +/* OBSOLETE DID_TRAP = 0; */ +/* OBSOLETE */ +/* OBSOLETE if (did_psw) */ +/* OBSOLETE do_stack_swap (sd); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE /* SIMULATE INSTRUCTIONS, various different ways of achieving the same */ +/* OBSOLETE thing */ */ +/* OBSOLETE */ +/* OBSOLETE static address_word */ +/* OBSOLETE do_long (SIM_DESC sd, */ +/* OBSOLETE l_instruction_word instruction, */ +/* OBSOLETE address_word cia) */ +/* OBSOLETE { */ +/* OBSOLETE address_word nia = l_idecode_issue(sd, */ +/* OBSOLETE instruction, */ +/* OBSOLETE cia); */ +/* OBSOLETE */ +/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */ +/* OBSOLETE return nia; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE static address_word */ +/* OBSOLETE do_2_short (SIM_DESC sd, */ +/* OBSOLETE s_instruction_word insn1, */ +/* OBSOLETE s_instruction_word insn2, */ +/* OBSOLETE cpu_units unit, */ +/* OBSOLETE address_word cia) */ +/* OBSOLETE { */ +/* OBSOLETE address_word nia; */ +/* OBSOLETE */ +/* OBSOLETE /* run the first instruction */ */ +/* OBSOLETE STATE_CPU (sd, 0)->unit = unit; */ +/* OBSOLETE STATE_CPU (sd, 0)->left_kills_right_p = 0; */ +/* OBSOLETE STATE_CPU (sd, 0)->mvtsys_left_p = 0; */ +/* OBSOLETE nia = s_idecode_issue(sd, */ +/* OBSOLETE insn1, */ +/* OBSOLETE cia); */ +/* OBSOLETE */ +/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */ +/* OBSOLETE */ +/* OBSOLETE /* Only do the second instruction if the PC has not changed */ */ +/* OBSOLETE if ((nia == INVALID_INSTRUCTION_ADDRESS) && */ +/* OBSOLETE (! STATE_CPU (sd, 0)->left_kills_right_p)) { */ +/* OBSOLETE STATE_CPU (sd, 0)->unit = any_unit; */ +/* OBSOLETE nia = s_idecode_issue (sd, */ +/* OBSOLETE insn2, */ +/* OBSOLETE cia); */ +/* OBSOLETE */ +/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE STATE_CPU (sd, 0)->left_kills_right_p = 0; */ +/* OBSOLETE STATE_CPU (sd, 0)->mvtsys_left_p = 0; */ +/* OBSOLETE return nia; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE static address_word */ +/* OBSOLETE do_parallel (SIM_DESC sd, */ +/* OBSOLETE s_instruction_word left_insn, */ +/* OBSOLETE s_instruction_word right_insn, */ +/* OBSOLETE address_word cia) */ +/* OBSOLETE { */ +/* OBSOLETE address_word nia_left; */ +/* OBSOLETE address_word nia_right; */ +/* OBSOLETE address_word nia; */ +/* OBSOLETE */ +/* OBSOLETE /* run the first instruction */ */ +/* OBSOLETE STATE_CPU (sd, 0)->unit = memory_unit; */ +/* OBSOLETE STATE_CPU (sd, 0)->left_kills_right_p = 0; */ +/* OBSOLETE STATE_CPU (sd, 0)->mvtsys_left_p = 0; */ +/* OBSOLETE nia_left = s_idecode_issue(sd, */ +/* OBSOLETE left_insn, */ +/* OBSOLETE cia); */ +/* OBSOLETE */ +/* OBSOLETE /* run the second instruction */ */ +/* OBSOLETE STATE_CPU (sd, 0)->unit = integer_unit; */ +/* OBSOLETE nia_right = s_idecode_issue(sd, */ +/* OBSOLETE right_insn, */ +/* OBSOLETE cia); */ +/* OBSOLETE */ +/* OBSOLETE /* merge the PC's */ */ +/* OBSOLETE if (nia_left == INVALID_INSTRUCTION_ADDRESS) { */ +/* OBSOLETE if (nia_right == INVALID_INSTRUCTION_ADDRESS) */ +/* OBSOLETE nia = INVALID_INSTRUCTION_ADDRESS; */ +/* OBSOLETE else */ +/* OBSOLETE nia = nia_right; */ +/* OBSOLETE } */ +/* OBSOLETE else { */ +/* OBSOLETE if (nia_right == INVALID_INSTRUCTION_ADDRESS) */ +/* OBSOLETE nia = nia_left; */ +/* OBSOLETE else { */ +/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, "parallel jumps"); */ +/* OBSOLETE nia = INVALID_INSTRUCTION_ADDRESS; */ +/* OBSOLETE } */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */ +/* OBSOLETE return nia; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE typedef enum { */ +/* OBSOLETE p_insn = 0, */ +/* OBSOLETE long_insn = 3, */ +/* OBSOLETE l_r_insn = 1, */ +/* OBSOLETE r_l_insn = 2, */ +/* OBSOLETE } instruction_types; */ +/* OBSOLETE */ +/* OBSOLETE STATIC_INLINE instruction_types */ +/* OBSOLETE instruction_type(l_instruction_word insn) */ +/* OBSOLETE { */ +/* OBSOLETE int fm0 = MASKED64(insn, 0, 0) != 0; */ +/* OBSOLETE int fm1 = MASKED64(insn, 32, 32) != 0; */ +/* OBSOLETE return ((fm0 << 1) | fm1); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE void */ +/* OBSOLETE sim_engine_run (SIM_DESC sd, */ +/* OBSOLETE int last_cpu_nr, */ +/* OBSOLETE int nr_cpus, */ +/* OBSOLETE int siggnal) */ +/* OBSOLETE { */ +/* OBSOLETE while (1) */ +/* OBSOLETE { */ +/* OBSOLETE address_word cia = PC; */ +/* OBSOLETE address_word nia; */ +/* OBSOLETE l_instruction_word insn = IMEM(cia); */ +/* OBSOLETE int rp_was_set; */ +/* OBSOLETE int rpt_c_was_nonzero; */ +/* OBSOLETE */ +/* OBSOLETE /* Before executing the instruction, we need to test whether or */ +/* OBSOLETE not RPT_C is greater than zero, and save that state for use */ +/* OBSOLETE after executing the instruction. In particular, we need to */ +/* OBSOLETE not care whether the instruction changes RPT_C itself. */ */ +/* OBSOLETE */ +/* OBSOLETE rpt_c_was_nonzero = (RPT_C > 0); */ +/* OBSOLETE */ +/* OBSOLETE /* Before executing the instruction, we need to check to see if */ +/* OBSOLETE we have to decrement RPT_C, the repeat count register. Do this */ +/* OBSOLETE if PC == RPT_E, but only if we are in an active repeat block. */ */ +/* OBSOLETE */ +/* OBSOLETE if (PC == RPT_E && */ +/* OBSOLETE (RPT_C > 0 || PSW_VAL (PSW_RP) != 0)) */ +/* OBSOLETE { */ +/* OBSOLETE RPT_C --; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* Now execute the instruction at PC */ */ +/* OBSOLETE */ +/* OBSOLETE switch (instruction_type (insn)) */ +/* OBSOLETE { */ +/* OBSOLETE case long_insn: */ +/* OBSOLETE nia = do_long (sd, insn, cia); */ +/* OBSOLETE break; */ +/* OBSOLETE case r_l_insn: */ +/* OBSOLETE /* L <- R */ */ +/* OBSOLETE nia = do_2_short (sd, insn, insn >> 32, integer_unit, cia); */ +/* OBSOLETE break; */ +/* OBSOLETE case l_r_insn: */ +/* OBSOLETE /* L -> R */ */ +/* OBSOLETE nia = do_2_short (sd, insn >> 32, insn, memory_unit, cia); */ +/* OBSOLETE break; */ +/* OBSOLETE case p_insn: */ +/* OBSOLETE nia = do_parallel (sd, insn >> 32, insn, cia); */ +/* OBSOLETE break; */ +/* OBSOLETE default: */ +/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */ +/* OBSOLETE "internal error - engine_run_until_stop - bad switch"); */ +/* OBSOLETE nia = -1; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE if (TRACE_ACTION) */ +/* OBSOLETE { */ +/* OBSOLETE if (TRACE_ACTION & TRACE_ACTION_CALL) */ +/* OBSOLETE call_occurred (sd, STATE_CPU (sd, 0), cia, nia); */ +/* OBSOLETE */ +/* OBSOLETE if (TRACE_ACTION & TRACE_ACTION_RETURN) */ +/* OBSOLETE return_occurred (sd, STATE_CPU (sd, 0), cia, nia); */ +/* OBSOLETE */ +/* OBSOLETE TRACE_ACTION = 0; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* Check now to see if we need to reset the RP bit in the PSW. */ +/* OBSOLETE There are three conditions for this, the RP bit is already */ +/* OBSOLETE set (just a speed optimization), the instruction we just */ +/* OBSOLETE executed is the last instruction in the loop, and the repeat */ +/* OBSOLETE count is currently zero. */ */ +/* OBSOLETE */ +/* OBSOLETE rp_was_set = PSW_VAL (PSW_RP); */ +/* OBSOLETE if (rp_was_set && (PC == RPT_E) && RPT_C == 0) */ +/* OBSOLETE { */ +/* OBSOLETE PSW_SET (PSW_RP, 0); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* Now update the PC. If we just executed a jump instruction, */ +/* OBSOLETE that takes precedence over everything else. Next comes */ +/* OBSOLETE branching back to RPT_S as a result of a loop. Finally, the */ +/* OBSOLETE default is to simply advance to the next inline */ +/* OBSOLETE instruction. */ */ +/* OBSOLETE */ +/* OBSOLETE if (nia != INVALID_INSTRUCTION_ADDRESS) */ +/* OBSOLETE { */ +/* OBSOLETE PC = nia; */ +/* OBSOLETE } */ +/* OBSOLETE else if (rp_was_set && rpt_c_was_nonzero && (PC == RPT_E)) */ +/* OBSOLETE { */ +/* OBSOLETE PC = RPT_S; */ +/* OBSOLETE } */ +/* OBSOLETE else */ +/* OBSOLETE { */ +/* OBSOLETE PC = cia + 8; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* Check for DDBT (debugger debug trap) condition. Do this after */ +/* OBSOLETE the repeat block checks so the excursion to the trap handler does */ +/* OBSOLETE not alter looping state. */ */ +/* OBSOLETE */ +/* OBSOLETE if (cia == IBA && PSW_VAL (PSW_DB)) */ +/* OBSOLETE { */ +/* OBSOLETE DPC = PC; */ +/* OBSOLETE PSW_SET (PSW_EA, 1); */ +/* OBSOLETE DPSW = PSW; */ +/* OBSOLETE /* clear all bits in PSW except SM */ */ +/* OBSOLETE PSW &= BIT32 (PSW_SM); */ +/* OBSOLETE /* add DS bit */ */ +/* OBSOLETE PSW |= BIT32 (PSW_DS); */ +/* OBSOLETE /* dispatch to DDBT handler */ */ +/* OBSOLETE PC = 0xfffff128; /* debugger_debug_trap_address */ */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* process any events */ */ +/* OBSOLETE /* FIXME - should L->R or L<-R insns count as two cycles? */ */ +/* OBSOLETE if (sim_events_tick (sd)) */ +/* OBSOLETE { */ +/* OBSOLETE sim_events_process (sd); */ +/* OBSOLETE } */ +/* OBSOLETE } */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE /* d30v external interrupt handler. */ +/* OBSOLETE */ +/* OBSOLETE Note: This should be replaced by a proper interrupt delivery */ +/* OBSOLETE mechanism. This interrupt mechanism discards later interrupts if */ +/* OBSOLETE an earlier interrupt hasn't been delivered. */ +/* OBSOLETE */ +/* OBSOLETE Note: This interrupt mechanism does not reset its self when the */ +/* OBSOLETE simulator is re-opened. */ */ +/* OBSOLETE */ +/* OBSOLETE void */ +/* OBSOLETE d30v_interrupt_event (SIM_DESC sd, */ +/* OBSOLETE void *data) */ +/* OBSOLETE { */ +/* OBSOLETE if (PSW_VAL (PSW_IE)) */ +/* OBSOLETE /* interrupts not masked */ */ +/* OBSOLETE { */ +/* OBSOLETE /* scrub any pending interrupt */ */ +/* OBSOLETE if (sd->pending_interrupt != NULL) */ +/* OBSOLETE sim_events_deschedule (sd, sd->pending_interrupt); */ +/* OBSOLETE /* deliver */ */ +/* OBSOLETE bPSW = PSW; */ +/* OBSOLETE bPC = PC; */ +/* OBSOLETE PSW = 0; */ +/* OBSOLETE PC = 0xfffff138; /* external interrupt */ */ +/* OBSOLETE do_stack_swap (sd); */ +/* OBSOLETE } */ +/* OBSOLETE else if (sd->pending_interrupt == NULL) */ +/* OBSOLETE /* interrupts masked and no interrupt pending */ */ +/* OBSOLETE { */ +/* OBSOLETE sd->pending_interrupt = sim_events_schedule (sd, 1, */ +/* OBSOLETE d30v_interrupt_event, */ +/* OBSOLETE data); */ +/* OBSOLETE } */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE #endif */ diff --git a/sim/d30v/ic-d30v b/sim/d30v/ic-d30v index 50a184f..bdf7ea2 100644 --- a/sim/d30v/ic-d30v +++ b/sim/d30v/ic-d30v @@ -1,80 +1,80 @@ -# Instruction cache rules -# -# This file is part of the program psim. -# -# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au> -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -compute:RA:RA:: -compute:RA:Ra:signed32 *:(&GPR[RA]) -compute:RA:RaH:signed16 *:AH2_4(Ra) -compute:RA:RaL:signed16 *:AL2_4(Ra) -compute:RA:val_Ra:signed32:(RA == 0 ? 0 : GPR[RA]) -# -compute:RB:RB:: -compute:RB:Rb:signed32:(RB == 0 ? 0 : GPR[RB]) -compute:RB:RbU:unsigned32:(RB == 0 ? 0 : GPR[RB]) -compute:RB:RbH:signed16:VH2_4(Rb) -compute:RB:RbL:signed16:VL2_4(Rb) -compute:RB:RbHU:unsigned16:VH2_4(Rb) -compute:RB:RbLU:unsigned16:VL2_4(Rb) -# -compute:RC:RC:: -compute:RC:Rc:signed32:(RC == 0 ? 0 : GPR[RC]) -compute:RC:RcU:unsigned32:(RC == 0 ? 0 : GPR[RC]) -compute:RC:RcH:signed16:VH2_4(Rc) -compute:RC:RcL:signed16:VL2_4(Rc) -# -# -compute:IMM_6S:IMM_6S:: -compute:IMM_6S:imm:signed32:SEXT32(IMM_6S, 32 - 6) -# NB - for short imm[HL] are the same value -compute:IMM_6S:immHL:signed32:((imm << 16) | MASKED32(imm, 16, 31)) -compute:IMM_6S:immH:signed32:imm -compute:IMM_6S:immL:signed32:imm -compute:IMM_6S:imm_6:signed32:IMM_6S -compute:IMM_6S:imm_5:signed32:LSMASKED32(IMM_6S, 4, 0) -compute:IMM_6S:imm_6u:unsigned32:(IMM_6S & 0x3f) -# -compute:RC:pcdisp:signed32:(Rc & ~0x7) -compute:RC:pcaddr:signed32:pcdisp -# -compute:IMM_18S:IMM_18S:: -compute:IMM_18S:pcdisp:signed32:(SEXT32(IMM_18S, 32 - 18) << 3) -compute:IMM_18S:pcaddr:signed32:pcdisp -compute:IMM_12S:IMM_12S:: -compute:IMM_12S:pcdisp:signed32:(SEXT32(IMM_12S, 32 - 12) << 3) -compute:IMM_12S:pcaddr:signed32:pcdisp -# -compute:IMM_8L:IMM_8L:: -compute:IMM_18L:IMM_18L:: -compute:IMM_6L:IMM_6L:: -compute:IMM_6L:imm:signed32:((((IMM_6L << 8) | IMM_8L) << 18) | IMM_18L) -compute:IMM_6L:immHL:signed32:imm -compute:IMM_6L:immH:signed32:EXTRACTED32(imm, 0, 15) -compute:IMM_6L:immL:signed32:EXTRACTED32(imm, 16, 31) -compute:IMM_6L:pcdisp:signed32:(imm & ~0x7) -compute:IMM_6L:pcaddr:signed32:pcdisp -# -# -compute:SRC_6:SRC_6:: -compute:SRC_6:src:unsigned32:(XX == 2 ? SEXT32(SRC_6, 32 - 6) : GPR[SRC_6]) -# -# -compute:AA:AA:: -compute:AA:Aa:unsigned64*:((CPU)->regs.accumulator + AA) -compute:AB:AB:: -compute:AB:Ab:unsigned64*:((CPU)->regs.accumulator + AB) +# OBSOLETE # Instruction cache rules +# OBSOLETE # +# OBSOLETE # This file is part of the program psim. +# OBSOLETE # +# OBSOLETE # Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au> +# OBSOLETE # +# OBSOLETE # This program is free software; you can redistribute it and/or modify +# OBSOLETE # it under the terms of the GNU General Public License as published by +# OBSOLETE # the Free Software Foundation; either version 2 of the License, or +# OBSOLETE # (at your option) any later version. +# OBSOLETE # +# OBSOLETE # This program is distributed in the hope that it will be useful, +# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of +# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# OBSOLETE # GNU General Public License for more details. +# OBSOLETE # +# OBSOLETE # You should have received a copy of the GNU General Public License +# OBSOLETE # along with this program; if not, write to the Free Software +# OBSOLETE # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# OBSOLETE # +# OBSOLETE compute:RA:RA:: +# OBSOLETE compute:RA:Ra:signed32 *:(&GPR[RA]) +# OBSOLETE compute:RA:RaH:signed16 *:AH2_4(Ra) +# OBSOLETE compute:RA:RaL:signed16 *:AL2_4(Ra) +# OBSOLETE compute:RA:val_Ra:signed32:(RA == 0 ? 0 : GPR[RA]) +# OBSOLETE # +# OBSOLETE compute:RB:RB:: +# OBSOLETE compute:RB:Rb:signed32:(RB == 0 ? 0 : GPR[RB]) +# OBSOLETE compute:RB:RbU:unsigned32:(RB == 0 ? 0 : GPR[RB]) +# OBSOLETE compute:RB:RbH:signed16:VH2_4(Rb) +# OBSOLETE compute:RB:RbL:signed16:VL2_4(Rb) +# OBSOLETE compute:RB:RbHU:unsigned16:VH2_4(Rb) +# OBSOLETE compute:RB:RbLU:unsigned16:VL2_4(Rb) +# OBSOLETE # +# OBSOLETE compute:RC:RC:: +# OBSOLETE compute:RC:Rc:signed32:(RC == 0 ? 0 : GPR[RC]) +# OBSOLETE compute:RC:RcU:unsigned32:(RC == 0 ? 0 : GPR[RC]) +# OBSOLETE compute:RC:RcH:signed16:VH2_4(Rc) +# OBSOLETE compute:RC:RcL:signed16:VL2_4(Rc) +# OBSOLETE # +# OBSOLETE # +# OBSOLETE compute:IMM_6S:IMM_6S:: +# OBSOLETE compute:IMM_6S:imm:signed32:SEXT32(IMM_6S, 32 - 6) +# OBSOLETE # NB - for short imm[HL] are the same value +# OBSOLETE compute:IMM_6S:immHL:signed32:((imm << 16) | MASKED32(imm, 16, 31)) +# OBSOLETE compute:IMM_6S:immH:signed32:imm +# OBSOLETE compute:IMM_6S:immL:signed32:imm +# OBSOLETE compute:IMM_6S:imm_6:signed32:IMM_6S +# OBSOLETE compute:IMM_6S:imm_5:signed32:LSMASKED32(IMM_6S, 4, 0) +# OBSOLETE compute:IMM_6S:imm_6u:unsigned32:(IMM_6S & 0x3f) +# OBSOLETE # +# OBSOLETE compute:RC:pcdisp:signed32:(Rc & ~0x7) +# OBSOLETE compute:RC:pcaddr:signed32:pcdisp +# OBSOLETE # +# OBSOLETE compute:IMM_18S:IMM_18S:: +# OBSOLETE compute:IMM_18S:pcdisp:signed32:(SEXT32(IMM_18S, 32 - 18) << 3) +# OBSOLETE compute:IMM_18S:pcaddr:signed32:pcdisp +# OBSOLETE compute:IMM_12S:IMM_12S:: +# OBSOLETE compute:IMM_12S:pcdisp:signed32:(SEXT32(IMM_12S, 32 - 12) << 3) +# OBSOLETE compute:IMM_12S:pcaddr:signed32:pcdisp +# OBSOLETE # +# OBSOLETE compute:IMM_8L:IMM_8L:: +# OBSOLETE compute:IMM_18L:IMM_18L:: +# OBSOLETE compute:IMM_6L:IMM_6L:: +# OBSOLETE compute:IMM_6L:imm:signed32:((((IMM_6L << 8) | IMM_8L) << 18) | IMM_18L) +# OBSOLETE compute:IMM_6L:immHL:signed32:imm +# OBSOLETE compute:IMM_6L:immH:signed32:EXTRACTED32(imm, 0, 15) +# OBSOLETE compute:IMM_6L:immL:signed32:EXTRACTED32(imm, 16, 31) +# OBSOLETE compute:IMM_6L:pcdisp:signed32:(imm & ~0x7) +# OBSOLETE compute:IMM_6L:pcaddr:signed32:pcdisp +# OBSOLETE # +# OBSOLETE # +# OBSOLETE compute:SRC_6:SRC_6:: +# OBSOLETE compute:SRC_6:src:unsigned32:(XX == 2 ? SEXT32(SRC_6, 32 - 6) : GPR[SRC_6]) +# OBSOLETE # +# OBSOLETE # +# OBSOLETE compute:AA:AA:: +# OBSOLETE compute:AA:Aa:unsigned64*:((CPU)->regs.accumulator + AA) +# OBSOLETE compute:AB:AB:: +# OBSOLETE compute:AB:Ab:unsigned64*:((CPU)->regs.accumulator + AB) diff --git a/sim/d30v/sim-calls.c b/sim/d30v/sim-calls.c index d319529..9384376 100644 --- a/sim/d30v/sim-calls.c +++ b/sim/d30v/sim-calls.c @@ -1,364 +1,364 @@ -/* This file is part of the program psim. - - Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au> - Copyright (C) 1997, Free Software Foundation - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - - */ - - -#include <stdarg.h> -#include <ctype.h> - -#include "sim-main.h" -#include "sim-options.h" - -#include "bfd.h" -#include "sim-utils.h" - -#ifdef HAVE_STDLIB_H -#include <stdlib.h> -#endif - -static unsigned long extmem_size = 1024*1024*8; /* 8 meg is the maximum listed in the arch. manual */ - -static const char * get_insn_name (sim_cpu *, int); - -#define SIM_ADDR unsigned - - -#define OPTION_TRACE_CALL 200 -#define OPTION_TRACE_TRAPDUMP 201 -#define OPTION_EXTMEM_SIZE 202 - -static SIM_RC -d30v_option_handler (SIM_DESC sd, - sim_cpu *cpu, - int opt, - char *arg, - int command_p) -{ - char *suffix; - - switch (opt) - { - default: - break; - - case OPTION_TRACE_CALL: - if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0) - TRACE_CALL_P = 1; - else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0) - TRACE_CALL_P = 0; - else - { - sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg); - return SIM_RC_FAIL; - } - return SIM_RC_OK; - - case OPTION_TRACE_TRAPDUMP: - if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0) - TRACE_TRAP_P = 1; - else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0) - TRACE_TRAP_P = 0; - else - { - sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg); - return SIM_RC_FAIL; - } - return SIM_RC_OK; - - case OPTION_EXTMEM_SIZE: - if (arg == NULL || !isdigit (*arg)) - { - sim_io_eprintf (sd, "Invalid memory size `%s'", arg); - return SIM_RC_FAIL; - } - - suffix = arg; - extmem_size = strtol (arg, &suffix, 0); - if (*suffix == 'm' || *suffix == 'M') - extmem_size <<= 20; - else if (*suffix == 'k' || *suffix == 'K') - extmem_size <<= 10; - sim_do_commandf (sd, "memory delete 0x80000000"); - sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size); - - return SIM_RC_OK; - } - - sim_io_eprintf (sd, "Unknown option (%d)\n", opt); - return SIM_RC_FAIL; -} - -static const OPTION d30v_options[] = -{ - { {"trace-call", optional_argument, NULL, OPTION_TRACE_CALL}, - '\0', "on|off", "Enable tracing of calls and returns, checking saved registers", - d30v_option_handler }, - { {"trace-trapdump", optional_argument, NULL, OPTION_TRACE_TRAPDUMP}, - '\0', "on|off", -#if TRAPDUMP - "Traps 0..30 dump out all of the registers (defaults on)", -#else - "Traps 0..30 dump out all of the registers", -#endif - d30v_option_handler }, - { {"extmem-size", required_argument, NULL, OPTION_EXTMEM_SIZE}, - '\0', "size", "Change size of external memory, default 8 meg", - d30v_option_handler }, - { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL } -}; - -/* Return name of an insn, used by insn profiling. */ - -static const char * -get_insn_name (sim_cpu *cpu, int i) -{ - return itable[i].name; -} - -/* Structures used by the simulator, for gdb just have static structures */ - -SIM_DESC -sim_open (SIM_OPEN_KIND kind, - host_callback *callback, - struct _bfd *abfd, - char **argv) -{ - SIM_DESC sd = sim_state_alloc (kind, callback); - - /* FIXME: watchpoints code shouldn't need this */ - STATE_WATCHPOINTS (sd)->pc = &(PC); - STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); - STATE_WATCHPOINTS (sd)->interrupt_handler = d30v_interrupt_event; - - /* Initialize the mechanism for doing insn profiling. */ - CPU_INSN_NAME (STATE_CPU (sd, 0)) = get_insn_name; - CPU_MAX_INSNS (STATE_CPU (sd, 0)) = nr_itable_entries; - -#ifdef TRAPDUMP - TRACE_TRAP_P = TRAPDUMP; -#endif - - if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) - return 0; - sim_add_option_table (sd, NULL, d30v_options); - - /* Memory and EEPROM */ - /* internal instruction RAM - fixed */ - sim_do_commandf (sd, "memory region 0,0x10000"); - /* internal data RAM - fixed */ - sim_do_commandf (sd, "memory region 0x20000000,0x8000"); - /* control register dummy area */ - sim_do_commandf (sd, "memory region 0x40000000,0x10000"); - /* external RAM */ - sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size); - /* EIT RAM */ - sim_do_commandf (sd, "memory region 0xfffff000,0x1000"); - - /* getopt will print the error message so we just have to exit if this fails. - FIXME: Hmmm... in the case of gdb we need getopt to call - print_filtered. */ - if (sim_parse_args (sd, argv) != SIM_RC_OK) - { - /* Uninstall the modules to avoid memory leaks, - file descriptor leaks, etc. */ - sim_module_uninstall (sd); - return 0; - } - - /* check for/establish the a reference program image */ - if (sim_analyze_program (sd, - (STATE_PROG_ARGV (sd) != NULL - ? *STATE_PROG_ARGV (sd) - : NULL), - abfd) != SIM_RC_OK) - { - sim_module_uninstall (sd); - return 0; - } - - /* establish any remaining configuration options */ - if (sim_config (sd) != SIM_RC_OK) - { - sim_module_uninstall (sd); - return 0; - } - - if (sim_post_argv_init (sd) != SIM_RC_OK) - { - /* Uninstall the modules to avoid memory leaks, - file descriptor leaks, etc. */ - sim_module_uninstall (sd); - return 0; - } - - return sd; -} - - -void -sim_close (SIM_DESC sd, int quitting) -{ - /* Uninstall the modules to avoid memory leaks, - file descriptor leaks, etc. */ - sim_module_uninstall (sd); -} - - -SIM_RC -sim_create_inferior (SIM_DESC sd, - struct _bfd *abfd, - char **argv, - char **envp) -{ - /* clear all registers */ - memset (&STATE_CPU (sd, 0)->regs, 0, sizeof (STATE_CPU (sd, 0)->regs)); - EIT_VB = EIT_VB_DEFAULT; - STATE_CPU (sd, 0)->unit = any_unit; - sim_module_init (sd); - if (abfd != NULL) - PC = bfd_get_start_address (abfd); - else - PC = 0xfffff000; /* reset value */ - return SIM_RC_OK; -} - -void -sim_do_command (SIM_DESC sd, char *cmd) -{ - if (sim_args_command (sd, cmd) != SIM_RC_OK) - sim_io_printf (sd, "Unknown command `%s'\n", cmd); -} - -/* The following register definitions were ripped off from - gdb/config/tm-d30v.h. If any of those defs changes, this table needs to - be updated. */ - -#define NUM_REGS 86 - -#define R0_REGNUM 0 -#define FP_REGNUM 11 -#define LR_REGNUM 62 -#define SP_REGNUM 63 -#define SPI_REGNUM 64 /* Interrupt stack pointer */ -#define SPU_REGNUM 65 /* User stack pointer */ -#define CREGS_START 66 - -#define PSW_REGNUM (CREGS_START + 0) /* psw, bpsw, or dpsw??? */ -#define PSW_SM 0x80000000 /* Stack mode: 0 == interrupt (SPI), - 1 == user (SPU) */ -#define BPSW_REGNUM (CREGS_START + 1) /* Backup PSW (on interrupt) */ -#define PC_REGNUM (CREGS_START + 2) /* pc, bpc, or dpc??? */ -#define BPC_REGNUM (CREGS_START + 3) /* Backup PC (on interrupt) */ -#define DPSW_REGNUM (CREGS_START + 4) /* Backup PSW (on debug trap) */ -#define DPC_REGNUM (CREGS_START + 5) /* Backup PC (on debug trap) */ -#define RPT_C_REGNUM (CREGS_START + 7) /* Loop count */ -#define RPT_S_REGNUM (CREGS_START + 8) /* Loop start address*/ -#define RPT_E_REGNUM (CREGS_START + 9) /* Loop end address */ -#define MOD_S_REGNUM (CREGS_START + 10) -#define MOD_E_REGNUM (CREGS_START + 11) -#define IBA_REGNUM (CREGS_START + 14) /* Instruction break address */ -#define EIT_VB_REGNUM (CREGS_START + 15) /* Vector base address */ -#define INT_S_REGNUM (CREGS_START + 16) /* Interrupt status */ -#define INT_M_REGNUM (CREGS_START + 17) /* Interrupt mask */ -#define A0_REGNUM 84 -#define A1_REGNUM 85 - -int -sim_fetch_register (sd, regno, buf, length) - SIM_DESC sd; - int regno; - unsigned char *buf; - int length; -{ - if (regno < A0_REGNUM) - { - unsigned32 reg; - - if (regno <= R0_REGNUM + 63) - reg = sd->cpu[0].regs.general_purpose[regno]; - else if (regno <= SPU_REGNUM) - reg = sd->cpu[0].regs.sp[regno - SPI_REGNUM]; - else - reg = sd->cpu[0].regs.control[regno - CREGS_START]; - - buf[0] = reg >> 24; - buf[1] = reg >> 16; - buf[2] = reg >> 8; - buf[3] = reg; - } - else if (regno < NUM_REGS) - { - unsigned32 reg; - - reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM] >> 32; - - buf[0] = reg >> 24; - buf[1] = reg >> 16; - buf[2] = reg >> 8; - buf[3] = reg; - - reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM]; - - buf[4] = reg >> 24; - buf[5] = reg >> 16; - buf[6] = reg >> 8; - buf[7] = reg; - } - else - abort (); - return -1; -} - -int -sim_store_register (sd, regno, buf, length) - SIM_DESC sd; - int regno; - unsigned char *buf; - int length; -{ - if (regno < A0_REGNUM) - { - unsigned32 reg; - - reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; - - if (regno <= R0_REGNUM + 63) - sd->cpu[0].regs.general_purpose[regno] = reg; - else if (regno <= SPU_REGNUM) - sd->cpu[0].regs.sp[regno - SPI_REGNUM] = reg; - else - sd->cpu[0].regs.control[regno - CREGS_START] = reg; - } - else if (regno < NUM_REGS) - { - unsigned32 reg; - - reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; - - sd->cpu[0].regs.accumulator[regno - A0_REGNUM] = (unsigned64)reg << 32; - - reg = (buf[4] << 24) | (buf[5] << 16) | (buf[6] << 8) | buf[7]; - - sd->cpu[0].regs.accumulator[regno - A0_REGNUM] |= reg; - } - else - abort (); - return -1; -} +/* OBSOLETE /* This file is part of the program psim. */ +/* OBSOLETE */ +/* OBSOLETE Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au> */ +/* OBSOLETE Copyright (C) 1997, Free Software Foundation */ +/* OBSOLETE */ +/* OBSOLETE This program is free software; you can redistribute it and/or modify */ +/* OBSOLETE it under the terms of the GNU General Public License as published by */ +/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */ +/* OBSOLETE (at your option) any later version. */ +/* OBSOLETE */ +/* OBSOLETE This program is distributed in the hope that it will be useful, */ +/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ +/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ +/* OBSOLETE GNU General Public License for more details. */ +/* OBSOLETE */ +/* OBSOLETE You should have received a copy of the GNU General Public License */ +/* OBSOLETE along with this program; if not, write to the Free Software */ +/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +/* OBSOLETE */ +/* OBSOLETE */ */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #include <stdarg.h> */ +/* OBSOLETE #include <ctype.h> */ +/* OBSOLETE */ +/* OBSOLETE #include "sim-main.h" */ +/* OBSOLETE #include "sim-options.h" */ +/* OBSOLETE */ +/* OBSOLETE #include "bfd.h" */ +/* OBSOLETE #include "sim-utils.h" */ +/* OBSOLETE */ +/* OBSOLETE #ifdef HAVE_STDLIB_H */ +/* OBSOLETE #include <stdlib.h> */ +/* OBSOLETE #endif */ +/* OBSOLETE */ +/* OBSOLETE static unsigned long extmem_size = 1024*1024*8; /* 8 meg is the maximum listed in the arch. manual */ */ +/* OBSOLETE */ +/* OBSOLETE static const char * get_insn_name (sim_cpu *, int); */ +/* OBSOLETE */ +/* OBSOLETE #define SIM_ADDR unsigned */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #define OPTION_TRACE_CALL 200 */ +/* OBSOLETE #define OPTION_TRACE_TRAPDUMP 201 */ +/* OBSOLETE #define OPTION_EXTMEM_SIZE 202 */ +/* OBSOLETE */ +/* OBSOLETE static SIM_RC */ +/* OBSOLETE d30v_option_handler (SIM_DESC sd, */ +/* OBSOLETE sim_cpu *cpu, */ +/* OBSOLETE int opt, */ +/* OBSOLETE char *arg, */ +/* OBSOLETE int command_p) */ +/* OBSOLETE { */ +/* OBSOLETE char *suffix; */ +/* OBSOLETE */ +/* OBSOLETE switch (opt) */ +/* OBSOLETE { */ +/* OBSOLETE default: */ +/* OBSOLETE break; */ +/* OBSOLETE */ +/* OBSOLETE case OPTION_TRACE_CALL: */ +/* OBSOLETE if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0) */ +/* OBSOLETE TRACE_CALL_P = 1; */ +/* OBSOLETE else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0) */ +/* OBSOLETE TRACE_CALL_P = 0; */ +/* OBSOLETE else */ +/* OBSOLETE { */ +/* OBSOLETE sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg); */ +/* OBSOLETE return SIM_RC_FAIL; */ +/* OBSOLETE } */ +/* OBSOLETE return SIM_RC_OK; */ +/* OBSOLETE */ +/* OBSOLETE case OPTION_TRACE_TRAPDUMP: */ +/* OBSOLETE if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0) */ +/* OBSOLETE TRACE_TRAP_P = 1; */ +/* OBSOLETE else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0) */ +/* OBSOLETE TRACE_TRAP_P = 0; */ +/* OBSOLETE else */ +/* OBSOLETE { */ +/* OBSOLETE sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg); */ +/* OBSOLETE return SIM_RC_FAIL; */ +/* OBSOLETE } */ +/* OBSOLETE return SIM_RC_OK; */ +/* OBSOLETE */ +/* OBSOLETE case OPTION_EXTMEM_SIZE: */ +/* OBSOLETE if (arg == NULL || !isdigit (*arg)) */ +/* OBSOLETE { */ +/* OBSOLETE sim_io_eprintf (sd, "Invalid memory size `%s'", arg); */ +/* OBSOLETE return SIM_RC_FAIL; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE suffix = arg; */ +/* OBSOLETE extmem_size = strtol (arg, &suffix, 0); */ +/* OBSOLETE if (*suffix == 'm' || *suffix == 'M') */ +/* OBSOLETE extmem_size <<= 20; */ +/* OBSOLETE else if (*suffix == 'k' || *suffix == 'K') */ +/* OBSOLETE extmem_size <<= 10; */ +/* OBSOLETE sim_do_commandf (sd, "memory delete 0x80000000"); */ +/* OBSOLETE sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size); */ +/* OBSOLETE */ +/* OBSOLETE return SIM_RC_OK; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE sim_io_eprintf (sd, "Unknown option (%d)\n", opt); */ +/* OBSOLETE return SIM_RC_FAIL; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE static const OPTION d30v_options[] = */ +/* OBSOLETE { */ +/* OBSOLETE { {"trace-call", optional_argument, NULL, OPTION_TRACE_CALL}, */ +/* OBSOLETE '\0', "on|off", "Enable tracing of calls and returns, checking saved registers", */ +/* OBSOLETE d30v_option_handler }, */ +/* OBSOLETE { {"trace-trapdump", optional_argument, NULL, OPTION_TRACE_TRAPDUMP}, */ +/* OBSOLETE '\0', "on|off", */ +/* OBSOLETE #if TRAPDUMP */ +/* OBSOLETE "Traps 0..30 dump out all of the registers (defaults on)", */ +/* OBSOLETE #else */ +/* OBSOLETE "Traps 0..30 dump out all of the registers", */ +/* OBSOLETE #endif */ +/* OBSOLETE d30v_option_handler }, */ +/* OBSOLETE { {"extmem-size", required_argument, NULL, OPTION_EXTMEM_SIZE}, */ +/* OBSOLETE '\0', "size", "Change size of external memory, default 8 meg", */ +/* OBSOLETE d30v_option_handler }, */ +/* OBSOLETE { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL } */ +/* OBSOLETE }; */ +/* OBSOLETE */ +/* OBSOLETE /* Return name of an insn, used by insn profiling. */ */ +/* OBSOLETE */ +/* OBSOLETE static const char * */ +/* OBSOLETE get_insn_name (sim_cpu *cpu, int i) */ +/* OBSOLETE { */ +/* OBSOLETE return itable[i].name; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* Structures used by the simulator, for gdb just have static structures */ */ +/* OBSOLETE */ +/* OBSOLETE SIM_DESC */ +/* OBSOLETE sim_open (SIM_OPEN_KIND kind, */ +/* OBSOLETE host_callback *callback, */ +/* OBSOLETE struct _bfd *abfd, */ +/* OBSOLETE char **argv) */ +/* OBSOLETE { */ +/* OBSOLETE SIM_DESC sd = sim_state_alloc (kind, callback); */ +/* OBSOLETE */ +/* OBSOLETE /* FIXME: watchpoints code shouldn't need this */ */ +/* OBSOLETE STATE_WATCHPOINTS (sd)->pc = &(PC); */ +/* OBSOLETE STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); */ +/* OBSOLETE STATE_WATCHPOINTS (sd)->interrupt_handler = d30v_interrupt_event; */ +/* OBSOLETE */ +/* OBSOLETE /* Initialize the mechanism for doing insn profiling. */ */ +/* OBSOLETE CPU_INSN_NAME (STATE_CPU (sd, 0)) = get_insn_name; */ +/* OBSOLETE CPU_MAX_INSNS (STATE_CPU (sd, 0)) = nr_itable_entries; */ +/* OBSOLETE */ +/* OBSOLETE #ifdef TRAPDUMP */ +/* OBSOLETE TRACE_TRAP_P = TRAPDUMP; */ +/* OBSOLETE #endif */ +/* OBSOLETE */ +/* OBSOLETE if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) */ +/* OBSOLETE return 0; */ +/* OBSOLETE sim_add_option_table (sd, NULL, d30v_options); */ +/* OBSOLETE */ +/* OBSOLETE /* Memory and EEPROM */ */ +/* OBSOLETE /* internal instruction RAM - fixed */ */ +/* OBSOLETE sim_do_commandf (sd, "memory region 0,0x10000"); */ +/* OBSOLETE /* internal data RAM - fixed */ */ +/* OBSOLETE sim_do_commandf (sd, "memory region 0x20000000,0x8000"); */ +/* OBSOLETE /* control register dummy area */ */ +/* OBSOLETE sim_do_commandf (sd, "memory region 0x40000000,0x10000"); */ +/* OBSOLETE /* external RAM */ */ +/* OBSOLETE sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size); */ +/* OBSOLETE /* EIT RAM */ */ +/* OBSOLETE sim_do_commandf (sd, "memory region 0xfffff000,0x1000"); */ +/* OBSOLETE */ +/* OBSOLETE /* getopt will print the error message so we just have to exit if this fails. */ +/* OBSOLETE FIXME: Hmmm... in the case of gdb we need getopt to call */ +/* OBSOLETE print_filtered. */ */ +/* OBSOLETE if (sim_parse_args (sd, argv) != SIM_RC_OK) */ +/* OBSOLETE { */ +/* OBSOLETE /* Uninstall the modules to avoid memory leaks, */ +/* OBSOLETE file descriptor leaks, etc. */ */ +/* OBSOLETE sim_module_uninstall (sd); */ +/* OBSOLETE return 0; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* check for/establish the a reference program image */ */ +/* OBSOLETE if (sim_analyze_program (sd, */ +/* OBSOLETE (STATE_PROG_ARGV (sd) != NULL */ +/* OBSOLETE ? *STATE_PROG_ARGV (sd) */ +/* OBSOLETE : NULL), */ +/* OBSOLETE abfd) != SIM_RC_OK) */ +/* OBSOLETE { */ +/* OBSOLETE sim_module_uninstall (sd); */ +/* OBSOLETE return 0; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* establish any remaining configuration options */ */ +/* OBSOLETE if (sim_config (sd) != SIM_RC_OK) */ +/* OBSOLETE { */ +/* OBSOLETE sim_module_uninstall (sd); */ +/* OBSOLETE return 0; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE if (sim_post_argv_init (sd) != SIM_RC_OK) */ +/* OBSOLETE { */ +/* OBSOLETE /* Uninstall the modules to avoid memory leaks, */ +/* OBSOLETE file descriptor leaks, etc. */ */ +/* OBSOLETE sim_module_uninstall (sd); */ +/* OBSOLETE return 0; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE return sd; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE void */ +/* OBSOLETE sim_close (SIM_DESC sd, int quitting) */ +/* OBSOLETE { */ +/* OBSOLETE /* Uninstall the modules to avoid memory leaks, */ +/* OBSOLETE file descriptor leaks, etc. */ */ +/* OBSOLETE sim_module_uninstall (sd); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE SIM_RC */ +/* OBSOLETE sim_create_inferior (SIM_DESC sd, */ +/* OBSOLETE struct _bfd *abfd, */ +/* OBSOLETE char **argv, */ +/* OBSOLETE char **envp) */ +/* OBSOLETE { */ +/* OBSOLETE /* clear all registers */ */ +/* OBSOLETE memset (&STATE_CPU (sd, 0)->regs, 0, sizeof (STATE_CPU (sd, 0)->regs)); */ +/* OBSOLETE EIT_VB = EIT_VB_DEFAULT; */ +/* OBSOLETE STATE_CPU (sd, 0)->unit = any_unit; */ +/* OBSOLETE sim_module_init (sd); */ +/* OBSOLETE if (abfd != NULL) */ +/* OBSOLETE PC = bfd_get_start_address (abfd); */ +/* OBSOLETE else */ +/* OBSOLETE PC = 0xfffff000; /* reset value */ */ +/* OBSOLETE return SIM_RC_OK; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE void */ +/* OBSOLETE sim_do_command (SIM_DESC sd, char *cmd) */ +/* OBSOLETE { */ +/* OBSOLETE if (sim_args_command (sd, cmd) != SIM_RC_OK) */ +/* OBSOLETE sim_io_printf (sd, "Unknown command `%s'\n", cmd); */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE /* The following register definitions were ripped off from */ +/* OBSOLETE gdb/config/tm-d30v.h. If any of those defs changes, this table needs to */ +/* OBSOLETE be updated. */ */ +/* OBSOLETE */ +/* OBSOLETE #define NUM_REGS 86 */ +/* OBSOLETE */ +/* OBSOLETE #define R0_REGNUM 0 */ +/* OBSOLETE #define FP_REGNUM 11 */ +/* OBSOLETE #define LR_REGNUM 62 */ +/* OBSOLETE #define SP_REGNUM 63 */ +/* OBSOLETE #define SPI_REGNUM 64 /* Interrupt stack pointer */ */ +/* OBSOLETE #define SPU_REGNUM 65 /* User stack pointer */ */ +/* OBSOLETE #define CREGS_START 66 */ +/* OBSOLETE */ +/* OBSOLETE #define PSW_REGNUM (CREGS_START + 0) /* psw, bpsw, or dpsw??? */ */ +/* OBSOLETE #define PSW_SM 0x80000000 /* Stack mode: 0 == interrupt (SPI), */ +/* OBSOLETE 1 == user (SPU) */ */ +/* OBSOLETE #define BPSW_REGNUM (CREGS_START + 1) /* Backup PSW (on interrupt) */ */ +/* OBSOLETE #define PC_REGNUM (CREGS_START + 2) /* pc, bpc, or dpc??? */ */ +/* OBSOLETE #define BPC_REGNUM (CREGS_START + 3) /* Backup PC (on interrupt) */ */ +/* OBSOLETE #define DPSW_REGNUM (CREGS_START + 4) /* Backup PSW (on debug trap) */ */ +/* OBSOLETE #define DPC_REGNUM (CREGS_START + 5) /* Backup PC (on debug trap) */ */ +/* OBSOLETE #define RPT_C_REGNUM (CREGS_START + 7) /* Loop count */ */ +/* OBSOLETE #define RPT_S_REGNUM (CREGS_START + 8) /* Loop start address*/ */ +/* OBSOLETE #define RPT_E_REGNUM (CREGS_START + 9) /* Loop end address */ */ +/* OBSOLETE #define MOD_S_REGNUM (CREGS_START + 10) */ +/* OBSOLETE #define MOD_E_REGNUM (CREGS_START + 11) */ +/* OBSOLETE #define IBA_REGNUM (CREGS_START + 14) /* Instruction break address */ */ +/* OBSOLETE #define EIT_VB_REGNUM (CREGS_START + 15) /* Vector base address */ */ +/* OBSOLETE #define INT_S_REGNUM (CREGS_START + 16) /* Interrupt status */ */ +/* OBSOLETE #define INT_M_REGNUM (CREGS_START + 17) /* Interrupt mask */ */ +/* OBSOLETE #define A0_REGNUM 84 */ +/* OBSOLETE #define A1_REGNUM 85 */ +/* OBSOLETE */ +/* OBSOLETE int */ +/* OBSOLETE sim_fetch_register (sd, regno, buf, length) */ +/* OBSOLETE SIM_DESC sd; */ +/* OBSOLETE int regno; */ +/* OBSOLETE unsigned char *buf; */ +/* OBSOLETE int length; */ +/* OBSOLETE { */ +/* OBSOLETE if (regno < A0_REGNUM) */ +/* OBSOLETE { */ +/* OBSOLETE unsigned32 reg; */ +/* OBSOLETE */ +/* OBSOLETE if (regno <= R0_REGNUM + 63) */ +/* OBSOLETE reg = sd->cpu[0].regs.general_purpose[regno]; */ +/* OBSOLETE else if (regno <= SPU_REGNUM) */ +/* OBSOLETE reg = sd->cpu[0].regs.sp[regno - SPI_REGNUM]; */ +/* OBSOLETE else */ +/* OBSOLETE reg = sd->cpu[0].regs.control[regno - CREGS_START]; */ +/* OBSOLETE */ +/* OBSOLETE buf[0] = reg >> 24; */ +/* OBSOLETE buf[1] = reg >> 16; */ +/* OBSOLETE buf[2] = reg >> 8; */ +/* OBSOLETE buf[3] = reg; */ +/* OBSOLETE } */ +/* OBSOLETE else if (regno < NUM_REGS) */ +/* OBSOLETE { */ +/* OBSOLETE unsigned32 reg; */ +/* OBSOLETE */ +/* OBSOLETE reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM] >> 32; */ +/* OBSOLETE */ +/* OBSOLETE buf[0] = reg >> 24; */ +/* OBSOLETE buf[1] = reg >> 16; */ +/* OBSOLETE buf[2] = reg >> 8; */ +/* OBSOLETE buf[3] = reg; */ +/* OBSOLETE */ +/* OBSOLETE reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM]; */ +/* OBSOLETE */ +/* OBSOLETE buf[4] = reg >> 24; */ +/* OBSOLETE buf[5] = reg >> 16; */ +/* OBSOLETE buf[6] = reg >> 8; */ +/* OBSOLETE buf[7] = reg; */ +/* OBSOLETE } */ +/* OBSOLETE else */ +/* OBSOLETE abort (); */ +/* OBSOLETE return -1; */ +/* OBSOLETE } */ +/* OBSOLETE */ +/* OBSOLETE int */ +/* OBSOLETE sim_store_register (sd, regno, buf, length) */ +/* OBSOLETE SIM_DESC sd; */ +/* OBSOLETE int regno; */ +/* OBSOLETE unsigned char *buf; */ +/* OBSOLETE int length; */ +/* OBSOLETE { */ +/* OBSOLETE if (regno < A0_REGNUM) */ +/* OBSOLETE { */ +/* OBSOLETE unsigned32 reg; */ +/* OBSOLETE */ +/* OBSOLETE reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; */ +/* OBSOLETE */ +/* OBSOLETE if (regno <= R0_REGNUM + 63) */ +/* OBSOLETE sd->cpu[0].regs.general_purpose[regno] = reg; */ +/* OBSOLETE else if (regno <= SPU_REGNUM) */ +/* OBSOLETE sd->cpu[0].regs.sp[regno - SPI_REGNUM] = reg; */ +/* OBSOLETE else */ +/* OBSOLETE sd->cpu[0].regs.control[regno - CREGS_START] = reg; */ +/* OBSOLETE } */ +/* OBSOLETE else if (regno < NUM_REGS) */ +/* OBSOLETE { */ +/* OBSOLETE unsigned32 reg; */ +/* OBSOLETE */ +/* OBSOLETE reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; */ +/* OBSOLETE */ +/* OBSOLETE sd->cpu[0].regs.accumulator[regno - A0_REGNUM] = (unsigned64)reg << 32; */ +/* OBSOLETE */ +/* OBSOLETE reg = (buf[4] << 24) | (buf[5] << 16) | (buf[6] << 8) | buf[7]; */ +/* OBSOLETE */ +/* OBSOLETE sd->cpu[0].regs.accumulator[regno - A0_REGNUM] |= reg; */ +/* OBSOLETE } */ +/* OBSOLETE else */ +/* OBSOLETE abort (); */ +/* OBSOLETE return -1; */ +/* OBSOLETE } */ diff --git a/sim/d30v/sim-main.h b/sim/d30v/sim-main.h index 4db8aa0..d1764da 100644 --- a/sim/d30v/sim-main.h +++ b/sim/d30v/sim-main.h @@ -1,82 +1,82 @@ -/* This file is part of the program psim. - - Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> - Copyright (C) 1997, 1998, Free Software Foundation - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - - */ - - -#ifndef _SIM_MAIN_H_ -#define _SIM_MAIN_H_ - -/* This simulator suports watchpoints */ -#define WITH_WATCHPOINTS 1 - -#include "sim-basics.h" -#include "sim-signal.h" - -/* needed */ -typedef address_word sim_cia; -#define INVALID_INSTRUCTION_ADDRESS ((address_word) 0 - 1) - -/* This simulator doesn't cache anything so no saving of context is - needed during either of a halt or restart */ -#define SIM_ENGINE_HALT_HOOK(SD,CPU,CIA) while (0) -#define SIM_ENGINE_RESTART_HOOK(SD,CPU,CIA) while (0) - -#include "sim-base.h" - -/* These are generated files. */ -#include "itable.h" -#include "s_idecode.h" -#include "l_idecode.h" - -#include "cpu.h" -#include "alu.h" - - -struct sim_state { - - sim_event *pending_interrupt; - - /* the processors proper */ - sim_cpu cpu[MAX_NR_PROCESSORS]; -#if (WITH_SMP) -#define STATE_CPU(sd, n) (&(sd)->cpu[n]) -#else -#define STATE_CPU(sd, n) (&(sd)->cpu[0]) -#endif - - /* The base class. */ - sim_state_base base; - -}; - - -/* deliver an interrupt */ -sim_event_handler d30v_interrupt_event; - - -#ifdef HAVE_STRING_H -#include <string.h> -#else -#ifdef HAVE_STRINGS_H -#include <strings.h> -#endif -#endif - -#endif /* _SIM_MAIN_H_ */ +/* OBSOLETE /* This file is part of the program psim. */ +/* OBSOLETE */ +/* OBSOLETE Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> */ +/* OBSOLETE Copyright (C) 1997, 1998, Free Software Foundation */ +/* OBSOLETE */ +/* OBSOLETE This program is free software; you can redistribute it and/or modify */ +/* OBSOLETE it under the terms of the GNU General Public License as published by */ +/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */ +/* OBSOLETE (at your option) any later version. */ +/* OBSOLETE */ +/* OBSOLETE This program is distributed in the hope that it will be useful, */ +/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ +/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ +/* OBSOLETE GNU General Public License for more details. */ +/* OBSOLETE */ +/* OBSOLETE You should have received a copy of the GNU General Public License */ +/* OBSOLETE along with this program; if not, write to the Free Software */ +/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +/* OBSOLETE */ +/* OBSOLETE */ */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #ifndef _SIM_MAIN_H_ */ +/* OBSOLETE #define _SIM_MAIN_H_ */ +/* OBSOLETE */ +/* OBSOLETE /* This simulator suports watchpoints */ */ +/* OBSOLETE #define WITH_WATCHPOINTS 1 */ +/* OBSOLETE */ +/* OBSOLETE #include "sim-basics.h" */ +/* OBSOLETE #include "sim-signal.h" */ +/* OBSOLETE */ +/* OBSOLETE /* needed */ */ +/* OBSOLETE typedef address_word sim_cia; */ +/* OBSOLETE #define INVALID_INSTRUCTION_ADDRESS ((address_word) 0 - 1) */ +/* OBSOLETE */ +/* OBSOLETE /* This simulator doesn't cache anything so no saving of context is */ +/* OBSOLETE needed during either of a halt or restart */ */ +/* OBSOLETE #define SIM_ENGINE_HALT_HOOK(SD,CPU,CIA) while (0) */ +/* OBSOLETE #define SIM_ENGINE_RESTART_HOOK(SD,CPU,CIA) while (0) */ +/* OBSOLETE */ +/* OBSOLETE #include "sim-base.h" */ +/* OBSOLETE */ +/* OBSOLETE /* These are generated files. */ */ +/* OBSOLETE #include "itable.h" */ +/* OBSOLETE #include "s_idecode.h" */ +/* OBSOLETE #include "l_idecode.h" */ +/* OBSOLETE */ +/* OBSOLETE #include "cpu.h" */ +/* OBSOLETE #include "alu.h" */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE struct sim_state { */ +/* OBSOLETE */ +/* OBSOLETE sim_event *pending_interrupt; */ +/* OBSOLETE */ +/* OBSOLETE /* the processors proper */ */ +/* OBSOLETE sim_cpu cpu[MAX_NR_PROCESSORS]; */ +/* OBSOLETE #if (WITH_SMP) */ +/* OBSOLETE #define STATE_CPU(sd, n) (&(sd)->cpu[n]) */ +/* OBSOLETE #else */ +/* OBSOLETE #define STATE_CPU(sd, n) (&(sd)->cpu[0]) */ +/* OBSOLETE #endif */ +/* OBSOLETE */ +/* OBSOLETE /* The base class. */ */ +/* OBSOLETE sim_state_base base; */ +/* OBSOLETE */ +/* OBSOLETE }; */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE /* deliver an interrupt */ */ +/* OBSOLETE sim_event_handler d30v_interrupt_event; */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #ifdef HAVE_STRING_H */ +/* OBSOLETE #include <string.h> */ +/* OBSOLETE #else */ +/* OBSOLETE #ifdef HAVE_STRINGS_H */ +/* OBSOLETE #include <strings.h> */ +/* OBSOLETE #endif */ +/* OBSOLETE #endif */ +/* OBSOLETE */ +/* OBSOLETE #endif /* _SIM_MAIN_H_ */ */ diff --git a/sim/fr30/ChangeLog b/sim/fr30/ChangeLog index e066362..f8f4c5e 100644 --- a/sim/fr30/ChangeLog +++ b/sim/fr30/ChangeLog @@ -1,3 +1,14 @@ +2002-07-16 Andrew Cagney <ac131313@redhat.com> + + * Makefile.in: Make file obsolete. + * cpu.c, arch.h, arch.c, cpu.h, decode.h: Ditto. + * decode.c, fr30-sim.h, devices.c, fr30.c: Ditto. + * model.c, sem-switch.c, sim-if.c: Ditto. + * sim-main.h, traps.c, sem.c: Ditto. + * TODO, README: Ditto. + * configure.in: Ditto. + * configure: Regenerate. + 2002-06-16 Andrew Cagney <ac131313@redhat.com> * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/fr30/Makefile.in b/sim/fr30/Makefile.in index 2a0ac83..43d70e2 100644 --- a/sim/fr30/Makefile.in +++ b/sim/fr30/Makefile.in @@ -1,107 +1,107 @@ -# Makefile template for Configure for the fr30 simulator -# Copyright (C) 1998, 2000 Free Software Foundation, Inc. -# Contributed by Cygnus Support. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -## COMMON_PRE_CONFIG_FRAG - -FR30_OBJS = fr30.o cpu.o decode.o sem.o model.o arch.o mloop.o - -CONFIG_DEVICES = dv-sockser.o -CONFIG_DEVICES = - -SIM_OBJS = \ - $(SIM_NEW_COMMON_OBJS) \ - sim-cpu.o \ - sim-hload.o \ - sim-hrw.o \ - sim-model.o \ - sim-reg.o \ - cgen-utils.o cgen-trace.o cgen-scache.o \ - cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ - sim-if.o \ - $(FR30_OBJS) \ - traps.o devices.o \ - $(CONFIG_DEVICES) - -# Extra headers included by sim-main.h. -SIM_EXTRA_DEPS = \ - $(CGEN_INCLUDE_DEPS) \ - arch.h cpuall.h fr30-sim.h $(srcdir)/../../opcodes/fr30-desc.h - -SIM_EXTRA_CFLAGS = - -SIM_RUN_OBJS = nrun.o -SIM_EXTRA_CLEAN = fr30-clean - -# This selects the fr30 newlib/libgloss syscall definitions. -NL_TARGET = -DNL_TARGET_fr30 - -## COMMON_POST_CONFIG_FRAG - -arch = fr30 - -sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h - -arch.o: arch.c $(SIM_MAIN_DEPS) - -devices.o: devices.c $(SIM_MAIN_DEPS) - -# FR30 objs - -FR30BF_INCLUDE_DEPS = \ - $(CGEN_MAIN_CPU_DEPS) \ - cpu.h decode.h eng.h - -fr30.o: fr30.c $(FR30BF_INCLUDE_DEPS) - -# FIXME: Use of `mono' is wip. -mloop.c eng.h: stamp-mloop -stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile - $(SHELL) $(srccom)/genmloop.sh \ - -mono -fast -pbb -switch sem-switch.c \ - -cpu fr30bf -infile $(srcdir)/mloop.in - $(SHELL) $(srcroot)/move-if-change eng.hin eng.h - $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c - touch stamp-mloop -mloop.o: mloop.c sem-switch.c $(FR30BF_INCLUDE_DEPS) - -cpu.o: cpu.c $(FR30BF_INCLUDE_DEPS) -decode.o: decode.c $(FR30BF_INCLUDE_DEPS) -sem.o: sem.c $(FR30BF_INCLUDE_DEPS) -model.o: model.c $(FR30BF_INCLUDE_DEPS) - -fr30-clean: - rm -f mloop.c eng.h stamp-mloop - rm -f tmp-* - rm -f stamp-arch stamp-cpu - -# cgen support, enable with --enable-cgen-maint -CGEN_MAINT = ; @true -# The following line is commented in or out depending upon --enable-cgen-maint. -@CGEN_MAINT@CGEN_MAINT = - -stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/fr30.cpu - $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ - FLAGS="with-scache with-profile=fn" - touch stamp-arch -arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch - -stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/fr30.cpu - $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=fr30bf mach=fr30 SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - touch stamp-cpu -cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu +# OBSOLETE # Makefile template for Configure for the fr30 simulator +# OBSOLETE # Copyright (C) 1998, 2000 Free Software Foundation, Inc. +# OBSOLETE # Contributed by Cygnus Support. +# OBSOLETE # +# OBSOLETE # This program is free software; you can redistribute it and/or modify +# OBSOLETE # it under the terms of the GNU General Public License as published by +# OBSOLETE # the Free Software Foundation; either version 2 of the License, or +# OBSOLETE # (at your option) any later version. +# OBSOLETE # +# OBSOLETE # This program is distributed in the hope that it will be useful, +# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of +# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# OBSOLETE # GNU General Public License for more details. +# OBSOLETE # +# OBSOLETE # You should have received a copy of the GNU General Public License along +# OBSOLETE # with this program; if not, write to the Free Software Foundation, Inc., +# OBSOLETE # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# OBSOLETE +# OBSOLETE ## COMMON_PRE_CONFIG_FRAG +# OBSOLETE +# OBSOLETE FR30_OBJS = fr30.o cpu.o decode.o sem.o model.o arch.o mloop.o +# OBSOLETE +# OBSOLETE CONFIG_DEVICES = dv-sockser.o +# OBSOLETE CONFIG_DEVICES = +# OBSOLETE +# OBSOLETE SIM_OBJS = \ +# OBSOLETE $(SIM_NEW_COMMON_OBJS) \ +# OBSOLETE sim-cpu.o \ +# OBSOLETE sim-hload.o \ +# OBSOLETE sim-hrw.o \ +# OBSOLETE sim-model.o \ +# OBSOLETE sim-reg.o \ +# OBSOLETE cgen-utils.o cgen-trace.o cgen-scache.o \ +# OBSOLETE cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ +# OBSOLETE sim-if.o \ +# OBSOLETE $(FR30_OBJS) \ +# OBSOLETE traps.o devices.o \ +# OBSOLETE $(CONFIG_DEVICES) +# OBSOLETE +# OBSOLETE # Extra headers included by sim-main.h. +# OBSOLETE SIM_EXTRA_DEPS = \ +# OBSOLETE $(CGEN_INCLUDE_DEPS) \ +# OBSOLETE arch.h cpuall.h fr30-sim.h $(srcdir)/../../opcodes/fr30-desc.h +# OBSOLETE +# OBSOLETE SIM_EXTRA_CFLAGS = +# OBSOLETE +# OBSOLETE SIM_RUN_OBJS = nrun.o +# OBSOLETE SIM_EXTRA_CLEAN = fr30-clean +# OBSOLETE +# OBSOLETE # This selects the fr30 newlib/libgloss syscall definitions. +# OBSOLETE NL_TARGET = -DNL_TARGET_fr30 +# OBSOLETE +# OBSOLETE ## COMMON_POST_CONFIG_FRAG +# OBSOLETE +# OBSOLETE arch = fr30 +# OBSOLETE +# OBSOLETE sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h +# OBSOLETE +# OBSOLETE arch.o: arch.c $(SIM_MAIN_DEPS) +# OBSOLETE +# OBSOLETE devices.o: devices.c $(SIM_MAIN_DEPS) +# OBSOLETE +# OBSOLETE # FR30 objs +# OBSOLETE +# OBSOLETE FR30BF_INCLUDE_DEPS = \ +# OBSOLETE $(CGEN_MAIN_CPU_DEPS) \ +# OBSOLETE cpu.h decode.h eng.h +# OBSOLETE +# OBSOLETE fr30.o: fr30.c $(FR30BF_INCLUDE_DEPS) +# OBSOLETE +# OBSOLETE # FIXME: Use of `mono' is wip. +# OBSOLETE mloop.c eng.h: stamp-mloop +# OBSOLETE stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile +# OBSOLETE $(SHELL) $(srccom)/genmloop.sh \ +# OBSOLETE -mono -fast -pbb -switch sem-switch.c \ +# OBSOLETE -cpu fr30bf -infile $(srcdir)/mloop.in +# OBSOLETE $(SHELL) $(srcroot)/move-if-change eng.hin eng.h +# OBSOLETE $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c +# OBSOLETE touch stamp-mloop +# OBSOLETE mloop.o: mloop.c sem-switch.c $(FR30BF_INCLUDE_DEPS) +# OBSOLETE +# OBSOLETE cpu.o: cpu.c $(FR30BF_INCLUDE_DEPS) +# OBSOLETE decode.o: decode.c $(FR30BF_INCLUDE_DEPS) +# OBSOLETE sem.o: sem.c $(FR30BF_INCLUDE_DEPS) +# OBSOLETE model.o: model.c $(FR30BF_INCLUDE_DEPS) +# OBSOLETE +# OBSOLETE fr30-clean: +# OBSOLETE rm -f mloop.c eng.h stamp-mloop +# OBSOLETE rm -f tmp-* +# OBSOLETE rm -f stamp-arch stamp-cpu +# OBSOLETE +# OBSOLETE # cgen support, enable with --enable-cgen-maint +# OBSOLETE CGEN_MAINT = ; @true +# OBSOLETE # The following line is commented in or out depending upon --enable-cgen-maint. +# OBSOLETE @CGEN_MAINT@CGEN_MAINT = +# OBSOLETE +# OBSOLETE stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/fr30.cpu +# OBSOLETE $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ +# OBSOLETE FLAGS="with-scache with-profile=fn" +# OBSOLETE touch stamp-arch +# OBSOLETE arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch +# OBSOLETE +# OBSOLETE stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/fr30.cpu +# OBSOLETE $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ +# OBSOLETE cpu=fr30bf mach=fr30 SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" +# OBSOLETE touch stamp-cpu +# OBSOLETE cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu diff --git a/sim/fr30/README b/sim/fr30/README index 47bf314..da607ec 100644 --- a/sim/fr30/README +++ b/sim/fr30/README @@ -1,14 +1,14 @@ -This is the fr30 simulator directory. - -It is still work-in-progress. The current sources are reasonably -well tested and lots of features are in. However, there's lots -more yet to come. - -There are lots of machine generated files in the source directory! -They are only generated if you configure with --enable-cgen-maint, -similar in behaviour to Makefile.in, configure under automake/autoconf. - -For details on the generator, see ../../cgen. - -devo/cgen isn't part of the comp-tools module yet. -You'll need to check it out manually (also akin to automake/autoconf). +OBSOLETE This is the fr30 simulator directory. +OBSOLETE +OBSOLETE It is still work-in-progress. The current sources are reasonably +OBSOLETE well tested and lots of features are in. However, there's lots +OBSOLETE more yet to come. +OBSOLETE +OBSOLETE There are lots of machine generated files in the source directory! +OBSOLETE They are only generated if you configure with --enable-cgen-maint, +OBSOLETE similar in behaviour to Makefile.in, configure under automake/autoconf. +OBSOLETE +OBSOLETE For details on the generator, see ../../cgen. +OBSOLETE +OBSOLETE devo/cgen isn't part of the comp-tools module yet. +OBSOLETE You'll need to check it out manually (also akin to automake/autoconf). diff --git a/sim/fr30/TODO b/sim/fr30/TODO index ae4c760..da9103b 100644 --- a/sim/fr30/TODO +++ b/sim/fr30/TODO @@ -1,14 +1,14 @@ -m32r-inherited stuff? ----------------------- -- header file dependencies revisit -- hooks cleanup -- testsuites -- FIXME's - - -m32r stuff? ----------------------- -- memory accesses still test if profiling is on even in fast mode -- have semantic code use G/SET_H_FOO if not default [incl fun-access] -- have G/SET_H_FOO macros call function if fun-access -- --> can always use G/S_H_FOO macros +OBSOLETE m32r-inherited stuff? +OBSOLETE ---------------------- +OBSOLETE - header file dependencies revisit +OBSOLETE - hooks cleanup +OBSOLETE - testsuites +OBSOLETE - FIXME's +OBSOLETE +OBSOLETE +OBSOLETE m32r stuff? +OBSOLETE ---------------------- +OBSOLETE - memory accesses still test if profiling is on even in fast mode +OBSOLETE - have semantic code use G/SET_H_FOO if not default [incl fun-access] +OBSOLETE - have G/SET_H_FOO macros call function if fun-access +OBSOLETE - --> can always use G/S_H_FOO macros diff --git a/sim/fr30/arch.c b/sim/fr30/arch.c index c0f3c62..4f1be2e 100644 --- a/sim/fr30/arch.c +++ b/sim/fr30/arch.c @@ -1,35 +1,34 @@ -/* Simulator support for fr30. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#include "sim-main.h" -#include "bfd.h" - -const MACH *sim_machs[] = -{ -#ifdef HAVE_CPU_FR30BF - & fr30_mach, -#endif - 0 -}; - +// OBSOLETE /* Simulator support for fr30. +// OBSOLETE +// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN. +// OBSOLETE +// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// OBSOLETE +// OBSOLETE */ +// OBSOLETE +// OBSOLETE #include "sim-main.h" +// OBSOLETE #include "bfd.h" +// OBSOLETE +// OBSOLETE const MACH *sim_machs[] = +// OBSOLETE { +// OBSOLETE #ifdef HAVE_CPU_FR30BF +// OBSOLETE & fr30_mach, +// OBSOLETE #endif +// OBSOLETE 0 +// OBSOLETE }; diff --git a/sim/fr30/arch.h b/sim/fr30/arch.h index 26de475..047814a 100644 --- a/sim/fr30/arch.h +++ b/sim/fr30/arch.h @@ -1,45 +1,45 @@ -/* Simulator header for fr30. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef FR30_ARCH_H -#define FR30_ARCH_H - -#define TARGET_BIG_ENDIAN 1 - -/* Enum declaration for model types. */ -typedef enum model_type { - MODEL_FR30_1, MODEL_MAX -} MODEL_TYPE; - -#define MAX_MODELS ((int) MODEL_MAX) - -/* Enum declaration for unit types. */ -typedef enum unit_type { - UNIT_NONE, UNIT_FR30_1_U_STM, UNIT_FR30_1_U_LDM, UNIT_FR30_1_U_STORE - , UNIT_FR30_1_U_LOAD, UNIT_FR30_1_U_CTI, UNIT_FR30_1_U_EXEC, UNIT_MAX -} UNIT_TYPE; - -#define MAX_UNITS (3) - -#endif /* FR30_ARCH_H */ +// OBSOLETE /* Simulator header for fr30. +// OBSOLETE +// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN. +// OBSOLETE +// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// OBSOLETE +// OBSOLETE */ +// OBSOLETE +// OBSOLETE #ifndef FR30_ARCH_H +// OBSOLETE #define FR30_ARCH_H +// OBSOLETE +// OBSOLETE #define TARGET_BIG_ENDIAN 1 +// OBSOLETE +// OBSOLETE /* Enum declaration for model types. */ +// OBSOLETE typedef enum model_type { +// OBSOLETE MODEL_FR30_1, MODEL_MAX +// OBSOLETE } MODEL_TYPE; +// OBSOLETE +// OBSOLETE #define MAX_MODELS ((int) MODEL_MAX) +// OBSOLETE +// OBSOLETE /* Enum declaration for unit types. */ +// OBSOLETE typedef enum unit_type { +// OBSOLETE UNIT_NONE, UNIT_FR30_1_U_STM, UNIT_FR30_1_U_LDM, UNIT_FR30_1_U_STORE +// OBSOLETE , UNIT_FR30_1_U_LOAD, UNIT_FR30_1_U_CTI, UNIT_FR30_1_U_EXEC, UNIT_MAX +// OBSOLETE } UNIT_TYPE; +// OBSOLETE +// OBSOLETE #define MAX_UNITS (3) +// OBSOLETE +// OBSOLETE #endif /* FR30_ARCH_H */ diff --git a/sim/fr30/configure b/sim/fr30/configure index 2c537d3..e69de29 100644 --- a/sim/fr30/configure +++ b/sim/fr30/configure @@ -1,4294 +0,0 @@ -#! /bin/sh - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -sim_inline="-DDEFAULT_INLINE=0" - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -# This file is derived from `gettext.m4'. The difference is that the -# included macros assume Cygnus-style source and build trees. - -# Macro to add for using GNU gettext. -# Ulrich Drepper <drepper@cygnus.com>, 1995. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 3 - - - - - -# Search path for a program which passes the given test. -# Ulrich Drepper <drepper@cygnus.com>, 1996. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 1 - - - -# Check whether LC_MESSAGES is available in <locale.h>. -# Ulrich Drepper <drepper@cygnus.com>, 1995. -# -# This file file be copied and used freely without restrictions. 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See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU fr30bf -#define WANT_CPU_FR30BF - -#include "sim-main.h" -#include "cgen-ops.h" - -/* Get the value of h-pc. */ - -USI -fr30bf_h_pc_get (SIM_CPU *current_cpu) -{ - return CPU (h_pc); -} - -/* Set a value for h-pc. */ - -void -fr30bf_h_pc_set (SIM_CPU *current_cpu, USI newval) -{ - CPU (h_pc) = newval; -} - -/* Get the value of h-gr. */ - -SI -fr30bf_h_gr_get (SIM_CPU *current_cpu, UINT regno) -{ - return CPU (h_gr[regno]); -} - -/* Set a value for h-gr. */ - -void -fr30bf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - CPU (h_gr[regno]) = newval; -} - -/* Get the value of h-cr. */ - -SI -fr30bf_h_cr_get (SIM_CPU *current_cpu, UINT regno) -{ - return CPU (h_cr[regno]); -} - -/* Set a value for h-cr. */ - -void -fr30bf_h_cr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - CPU (h_cr[regno]) = newval; -} - -/* Get the value of h-dr. */ - -SI -fr30bf_h_dr_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_DR (regno); -} - -/* Set a value for h-dr. */ - -void -fr30bf_h_dr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - SET_H_DR (regno, newval); -} - -/* Get the value of h-ps. */ - -USI -fr30bf_h_ps_get (SIM_CPU *current_cpu) -{ - return GET_H_PS (); -} - -/* Set a value for h-ps. */ - -void -fr30bf_h_ps_set (SIM_CPU *current_cpu, USI newval) -{ - SET_H_PS (newval); -} - -/* Get the value of h-r13. */ - -SI -fr30bf_h_r13_get (SIM_CPU *current_cpu) -{ - return CPU (h_r13); -} - -/* Set a value for h-r13. */ - -void -fr30bf_h_r13_set (SIM_CPU *current_cpu, SI newval) -{ - CPU (h_r13) = newval; -} - -/* Get the value of h-r14. */ - -SI -fr30bf_h_r14_get (SIM_CPU *current_cpu) -{ - return CPU (h_r14); -} - -/* Set a value for h-r14. */ - -void -fr30bf_h_r14_set (SIM_CPU *current_cpu, SI newval) -{ - CPU (h_r14) = newval; -} - -/* Get the value of h-r15. */ - -SI -fr30bf_h_r15_get (SIM_CPU *current_cpu) -{ - return CPU (h_r15); -} - -/* Set a value for h-r15. */ - -void -fr30bf_h_r15_set (SIM_CPU *current_cpu, SI newval) -{ - CPU (h_r15) = newval; -} - -/* Get the value of h-nbit. */ - -BI -fr30bf_h_nbit_get (SIM_CPU *current_cpu) -{ - return CPU (h_nbit); -} - -/* Set a value for h-nbit. */ - -void -fr30bf_h_nbit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_nbit) = newval; -} - -/* Get the value of h-zbit. */ - -BI -fr30bf_h_zbit_get (SIM_CPU *current_cpu) -{ - return CPU (h_zbit); -} - -/* Set a value for h-zbit. */ - -void -fr30bf_h_zbit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_zbit) = newval; -} - -/* Get the value of h-vbit. */ - -BI -fr30bf_h_vbit_get (SIM_CPU *current_cpu) -{ - return CPU (h_vbit); -} - -/* Set a value for h-vbit. */ - -void -fr30bf_h_vbit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_vbit) = newval; -} - -/* Get the value of h-cbit. */ - -BI -fr30bf_h_cbit_get (SIM_CPU *current_cpu) -{ - return CPU (h_cbit); -} - -/* Set a value for h-cbit. */ - -void -fr30bf_h_cbit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_cbit) = newval; -} - -/* Get the value of h-ibit. */ - -BI -fr30bf_h_ibit_get (SIM_CPU *current_cpu) -{ - return CPU (h_ibit); -} - -/* Set a value for h-ibit. */ - -void -fr30bf_h_ibit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_ibit) = newval; -} - -/* Get the value of h-sbit. */ - -BI -fr30bf_h_sbit_get (SIM_CPU *current_cpu) -{ - return GET_H_SBIT (); -} - -/* Set a value for h-sbit. */ - -void -fr30bf_h_sbit_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_SBIT (newval); -} - -/* Get the value of h-tbit. */ - -BI -fr30bf_h_tbit_get (SIM_CPU *current_cpu) -{ - return CPU (h_tbit); -} - -/* Set a value for h-tbit. */ - -void -fr30bf_h_tbit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_tbit) = newval; -} - -/* Get the value of h-d0bit. */ - -BI -fr30bf_h_d0bit_get (SIM_CPU *current_cpu) -{ - return CPU (h_d0bit); -} - -/* Set a value for h-d0bit. */ - -void -fr30bf_h_d0bit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_d0bit) = newval; -} - -/* Get the value of h-d1bit. */ - -BI -fr30bf_h_d1bit_get (SIM_CPU *current_cpu) -{ - return CPU (h_d1bit); -} - -/* Set a value for h-d1bit. */ - -void -fr30bf_h_d1bit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_d1bit) = newval; -} - -/* Get the value of h-ccr. */ - -UQI -fr30bf_h_ccr_get (SIM_CPU *current_cpu) -{ - return GET_H_CCR (); -} - -/* Set a value for h-ccr. */ - -void -fr30bf_h_ccr_set (SIM_CPU *current_cpu, UQI newval) -{ - SET_H_CCR (newval); -} - -/* Get the value of h-scr. */ - -UQI -fr30bf_h_scr_get (SIM_CPU *current_cpu) -{ - return GET_H_SCR (); -} - -/* Set a value for h-scr. */ - -void -fr30bf_h_scr_set (SIM_CPU *current_cpu, UQI newval) -{ - SET_H_SCR (newval); -} - -/* Get the value of h-ilm. */ - -UQI -fr30bf_h_ilm_get (SIM_CPU *current_cpu) -{ - return GET_H_ILM (); -} - -/* Set a value for h-ilm. */ - -void -fr30bf_h_ilm_set (SIM_CPU *current_cpu, UQI newval) -{ - SET_H_ILM (newval); -} - -/* Record trace results for INSN. */ - -void -fr30bf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn, - int *indices, TRACE_RECORD *tr) -{ -} +// OBSOLETE /* Misc. support for CPU family fr30bf. +// OBSOLETE +// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN. +// OBSOLETE +// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// OBSOLETE +// OBSOLETE */ +// OBSOLETE +// OBSOLETE #define WANT_CPU fr30bf +// OBSOLETE #define WANT_CPU_FR30BF +// OBSOLETE +// OBSOLETE #include "sim-main.h" +// OBSOLETE #include "cgen-ops.h" +// OBSOLETE +// OBSOLETE /* Get the value of h-pc. */ +// OBSOLETE +// OBSOLETE USI +// OBSOLETE fr30bf_h_pc_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_pc); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-pc. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_pc_set (SIM_CPU *current_cpu, USI newval) +// OBSOLETE { +// OBSOLETE CPU (h_pc) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-gr. */ +// OBSOLETE +// OBSOLETE SI +// OBSOLETE fr30bf_h_gr_get (SIM_CPU *current_cpu, UINT regno) +// OBSOLETE { +// OBSOLETE return CPU (h_gr[regno]); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-gr. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval) +// OBSOLETE { +// OBSOLETE CPU (h_gr[regno]) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-cr. */ +// OBSOLETE +// OBSOLETE SI +// OBSOLETE fr30bf_h_cr_get (SIM_CPU *current_cpu, UINT regno) +// OBSOLETE { +// OBSOLETE return CPU (h_cr[regno]); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-cr. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_cr_set (SIM_CPU *current_cpu, UINT regno, SI newval) +// OBSOLETE { +// OBSOLETE CPU (h_cr[regno]) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-dr. */ +// OBSOLETE +// OBSOLETE SI +// OBSOLETE fr30bf_h_dr_get (SIM_CPU *current_cpu, UINT regno) +// OBSOLETE { +// OBSOLETE return GET_H_DR (regno); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-dr. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_dr_set (SIM_CPU *current_cpu, UINT regno, SI newval) +// OBSOLETE { +// OBSOLETE SET_H_DR (regno, newval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-ps. */ +// OBSOLETE +// OBSOLETE USI +// OBSOLETE fr30bf_h_ps_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return GET_H_PS (); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-ps. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_ps_set (SIM_CPU *current_cpu, USI newval) +// OBSOLETE { +// OBSOLETE SET_H_PS (newval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-r13. */ +// OBSOLETE +// OBSOLETE SI +// OBSOLETE fr30bf_h_r13_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_r13); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-r13. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_r13_set (SIM_CPU *current_cpu, SI newval) +// OBSOLETE { +// OBSOLETE CPU (h_r13) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-r14. */ +// OBSOLETE +// OBSOLETE SI +// OBSOLETE fr30bf_h_r14_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_r14); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-r14. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_r14_set (SIM_CPU *current_cpu, SI newval) +// OBSOLETE { +// OBSOLETE CPU (h_r14) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-r15. */ +// OBSOLETE +// OBSOLETE SI +// OBSOLETE fr30bf_h_r15_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_r15); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-r15. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_r15_set (SIM_CPU *current_cpu, SI newval) +// OBSOLETE { +// OBSOLETE CPU (h_r15) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-nbit. */ +// OBSOLETE +// OBSOLETE BI +// OBSOLETE fr30bf_h_nbit_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_nbit); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-nbit. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_nbit_set (SIM_CPU *current_cpu, BI newval) +// OBSOLETE { +// OBSOLETE CPU (h_nbit) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-zbit. */ +// OBSOLETE +// OBSOLETE BI +// OBSOLETE fr30bf_h_zbit_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_zbit); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-zbit. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_zbit_set (SIM_CPU *current_cpu, BI newval) +// OBSOLETE { +// OBSOLETE CPU (h_zbit) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-vbit. */ +// OBSOLETE +// OBSOLETE BI +// OBSOLETE fr30bf_h_vbit_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_vbit); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-vbit. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_vbit_set (SIM_CPU *current_cpu, BI newval) +// OBSOLETE { +// OBSOLETE CPU (h_vbit) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-cbit. */ +// OBSOLETE +// OBSOLETE BI +// OBSOLETE fr30bf_h_cbit_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_cbit); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-cbit. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_cbit_set (SIM_CPU *current_cpu, BI newval) +// OBSOLETE { +// OBSOLETE CPU (h_cbit) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-ibit. */ +// OBSOLETE +// OBSOLETE BI +// OBSOLETE fr30bf_h_ibit_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_ibit); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-ibit. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_ibit_set (SIM_CPU *current_cpu, BI newval) +// OBSOLETE { +// OBSOLETE CPU (h_ibit) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-sbit. */ +// OBSOLETE +// OBSOLETE BI +// OBSOLETE fr30bf_h_sbit_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return GET_H_SBIT (); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-sbit. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_sbit_set (SIM_CPU *current_cpu, BI newval) +// OBSOLETE { +// OBSOLETE SET_H_SBIT (newval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-tbit. */ +// OBSOLETE +// OBSOLETE BI +// OBSOLETE fr30bf_h_tbit_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_tbit); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-tbit. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_tbit_set (SIM_CPU *current_cpu, BI newval) +// OBSOLETE { +// OBSOLETE CPU (h_tbit) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-d0bit. */ +// OBSOLETE +// OBSOLETE BI +// OBSOLETE fr30bf_h_d0bit_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_d0bit); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-d0bit. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_d0bit_set (SIM_CPU *current_cpu, BI newval) +// OBSOLETE { +// OBSOLETE CPU (h_d0bit) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-d1bit. */ +// OBSOLETE +// OBSOLETE BI +// OBSOLETE fr30bf_h_d1bit_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_d1bit); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-d1bit. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_d1bit_set (SIM_CPU *current_cpu, BI newval) +// OBSOLETE { +// OBSOLETE CPU (h_d1bit) = newval; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-ccr. */ +// OBSOLETE +// OBSOLETE UQI +// OBSOLETE fr30bf_h_ccr_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return GET_H_CCR (); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-ccr. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_ccr_set (SIM_CPU *current_cpu, UQI newval) +// OBSOLETE { +// OBSOLETE SET_H_CCR (newval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-scr. */ +// OBSOLETE +// OBSOLETE UQI +// OBSOLETE fr30bf_h_scr_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return GET_H_SCR (); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-scr. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_scr_set (SIM_CPU *current_cpu, UQI newval) +// OBSOLETE { +// OBSOLETE SET_H_SCR (newval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Get the value of h-ilm. */ +// OBSOLETE +// OBSOLETE UQI +// OBSOLETE fr30bf_h_ilm_get (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return GET_H_ILM (); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Set a value for h-ilm. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_ilm_set (SIM_CPU *current_cpu, UQI newval) +// OBSOLETE { +// OBSOLETE SET_H_ILM (newval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Record trace results for INSN. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn, +// OBSOLETE int *indices, TRACE_RECORD *tr) +// OBSOLETE { +// OBSOLETE } diff --git a/sim/fr30/cpu.h b/sim/fr30/cpu.h index 3a9e7c6..6505920 100644 --- a/sim/fr30/cpu.h +++ b/sim/fr30/cpu.h @@ -1,890 +1,890 @@ -/* CPU family header for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef CPU_FR30BF_H -#define CPU_FR30BF_H - -/* Maximum number of instructions that are fetched at a time. - This is for LIW type instructions sets (e.g. m32r). */ -#define MAX_LIW_INSNS 1 - -/* Maximum number of instructions that can be executed in parallel. */ -#define MAX_PARALLEL_INSNS 1 - -/* CPU state information. */ -typedef struct { - /* Hardware elements. */ - struct { - /* program counter */ - USI h_pc; -#define GET_H_PC() CPU (h_pc) -#define SET_H_PC(x) (CPU (h_pc) = (x)) - /* general registers */ - SI h_gr[16]; -#define GET_H_GR(a1) CPU (h_gr)[a1] -#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x)) - /* coprocessor registers */ - SI h_cr[16]; -#define GET_H_CR(a1) CPU (h_cr)[a1] -#define SET_H_CR(a1, x) (CPU (h_cr)[a1] = (x)) - /* dedicated registers */ - SI h_dr[6]; -#define GET_H_DR(index) fr30bf_h_dr_get_handler (current_cpu, index) -#define SET_H_DR(index, x) \ -do { \ -fr30bf_h_dr_set_handler (current_cpu, (index), (x));\ -;} while (0) - /* processor status */ - USI h_ps; -#define GET_H_PS() fr30bf_h_ps_get_handler (current_cpu) -#define SET_H_PS(x) \ -do { \ -fr30bf_h_ps_set_handler (current_cpu, (x));\ -;} while (0) - /* General Register 13 explicitly required */ - SI h_r13; -#define GET_H_R13() CPU (h_r13) -#define SET_H_R13(x) (CPU (h_r13) = (x)) - /* General Register 14 explicitly required */ - SI h_r14; -#define GET_H_R14() CPU (h_r14) -#define SET_H_R14(x) (CPU (h_r14) = (x)) - /* General Register 15 explicitly required */ - SI h_r15; -#define GET_H_R15() CPU (h_r15) -#define SET_H_R15(x) (CPU (h_r15) = (x)) - /* negative bit */ - BI h_nbit; -#define GET_H_NBIT() CPU (h_nbit) -#define SET_H_NBIT(x) (CPU (h_nbit) = (x)) - /* zero bit */ - BI h_zbit; -#define GET_H_ZBIT() CPU (h_zbit) -#define SET_H_ZBIT(x) (CPU (h_zbit) = (x)) - /* overflow bit */ - BI h_vbit; -#define GET_H_VBIT() CPU (h_vbit) -#define SET_H_VBIT(x) (CPU (h_vbit) = (x)) - /* carry bit */ - BI h_cbit; -#define GET_H_CBIT() CPU (h_cbit) -#define SET_H_CBIT(x) (CPU (h_cbit) = (x)) - /* interrupt enable bit */ - BI h_ibit; -#define GET_H_IBIT() CPU (h_ibit) -#define SET_H_IBIT(x) (CPU (h_ibit) = (x)) - /* stack bit */ - BI h_sbit; -#define GET_H_SBIT() fr30bf_h_sbit_get_handler (current_cpu) -#define SET_H_SBIT(x) \ -do { \ -fr30bf_h_sbit_set_handler (current_cpu, (x));\ -;} while (0) - /* trace trap bit */ - BI h_tbit; -#define GET_H_TBIT() CPU (h_tbit) -#define SET_H_TBIT(x) (CPU (h_tbit) = (x)) - /* division 0 bit */ - BI h_d0bit; -#define GET_H_D0BIT() CPU (h_d0bit) -#define SET_H_D0BIT(x) (CPU (h_d0bit) = (x)) - /* division 1 bit */ - BI h_d1bit; -#define GET_H_D1BIT() CPU (h_d1bit) -#define SET_H_D1BIT(x) (CPU (h_d1bit) = (x)) - /* condition code bits */ - UQI h_ccr; -#define GET_H_CCR() fr30bf_h_ccr_get_handler (current_cpu) -#define SET_H_CCR(x) \ -do { \ -fr30bf_h_ccr_set_handler (current_cpu, (x));\ -;} while (0) - /* system condition bits */ - UQI h_scr; -#define GET_H_SCR() fr30bf_h_scr_get_handler (current_cpu) -#define SET_H_SCR(x) \ -do { \ -fr30bf_h_scr_set_handler (current_cpu, (x));\ -;} while (0) - /* interrupt level mask */ - UQI h_ilm; -#define GET_H_ILM() fr30bf_h_ilm_get_handler (current_cpu) -#define SET_H_ILM(x) \ -do { \ -fr30bf_h_ilm_set_handler (current_cpu, (x));\ -;} while (0) - } hardware; -#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware) -} FR30BF_CPU_DATA; - -/* Cover fns for register access. */ -USI fr30bf_h_pc_get (SIM_CPU *); -void fr30bf_h_pc_set (SIM_CPU *, USI); -SI fr30bf_h_gr_get (SIM_CPU *, UINT); -void fr30bf_h_gr_set (SIM_CPU *, UINT, SI); -SI fr30bf_h_cr_get (SIM_CPU *, UINT); -void fr30bf_h_cr_set (SIM_CPU *, UINT, SI); -SI fr30bf_h_dr_get (SIM_CPU *, UINT); -void fr30bf_h_dr_set (SIM_CPU *, UINT, SI); -USI fr30bf_h_ps_get (SIM_CPU *); -void fr30bf_h_ps_set (SIM_CPU *, USI); -SI fr30bf_h_r13_get (SIM_CPU *); -void fr30bf_h_r13_set (SIM_CPU *, SI); -SI fr30bf_h_r14_get (SIM_CPU *); -void fr30bf_h_r14_set (SIM_CPU *, SI); -SI fr30bf_h_r15_get (SIM_CPU *); -void fr30bf_h_r15_set (SIM_CPU *, SI); -BI fr30bf_h_nbit_get (SIM_CPU *); -void fr30bf_h_nbit_set (SIM_CPU *, BI); -BI fr30bf_h_zbit_get (SIM_CPU *); -void fr30bf_h_zbit_set (SIM_CPU *, BI); -BI fr30bf_h_vbit_get (SIM_CPU *); -void fr30bf_h_vbit_set (SIM_CPU *, BI); -BI fr30bf_h_cbit_get (SIM_CPU *); -void fr30bf_h_cbit_set (SIM_CPU *, BI); -BI fr30bf_h_ibit_get (SIM_CPU *); -void fr30bf_h_ibit_set (SIM_CPU *, BI); -BI fr30bf_h_sbit_get (SIM_CPU *); -void fr30bf_h_sbit_set (SIM_CPU *, BI); -BI fr30bf_h_tbit_get (SIM_CPU *); -void fr30bf_h_tbit_set (SIM_CPU *, BI); -BI fr30bf_h_d0bit_get (SIM_CPU *); -void fr30bf_h_d0bit_set (SIM_CPU *, BI); -BI fr30bf_h_d1bit_get (SIM_CPU *); -void fr30bf_h_d1bit_set (SIM_CPU *, BI); -UQI fr30bf_h_ccr_get (SIM_CPU *); -void fr30bf_h_ccr_set (SIM_CPU *, UQI); -UQI fr30bf_h_scr_get (SIM_CPU *); -void fr30bf_h_scr_set (SIM_CPU *, UQI); -UQI fr30bf_h_ilm_get (SIM_CPU *); -void fr30bf_h_ilm_set (SIM_CPU *, UQI); - -/* These must be hand-written. */ -extern CPUREG_FETCH_FN fr30bf_fetch_register; -extern CPUREG_STORE_FN fr30bf_store_register; - -typedef struct { - UINT load_regs; - UINT load_regs_pending; -} MODEL_FR30_1_DATA; - -/* Instruction argument buffer. */ - -union sem_fields { - struct { /* no operands */ - int empty; - } fmt_empty; - struct { /* */ - IADDR i_label9; - } sfmt_brad; - struct { /* */ - UINT f_u8; - } sfmt_int; - struct { /* */ - IADDR i_label12; - } sfmt_call; - struct { /* */ - SI f_s10; - unsigned char in_h_gr_SI_15; - unsigned char out_h_gr_SI_15; - } sfmt_addsp; - struct { /* */ - USI f_dir10; - unsigned char in_h_gr_SI_15; - unsigned char out_h_gr_SI_15; - } sfmt_dmovr15pi; - struct { /* */ - UINT f_dir8; - unsigned char in_h_gr_SI_13; - unsigned char out_h_gr_SI_13; - } sfmt_dmovr13pib; - struct { /* */ - USI f_dir9; - unsigned char in_h_gr_SI_13; - unsigned char out_h_gr_SI_13; - } sfmt_dmovr13pih; - struct { /* */ - USI f_dir10; - unsigned char in_h_gr_SI_13; - unsigned char out_h_gr_SI_13; - } sfmt_dmovr13pi; - struct { /* */ - UINT f_Rs2; - unsigned char in_h_gr_SI_15; - unsigned char out_h_gr_SI_15; - } sfmt_ldr15dr; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_Rs1; - unsigned char in_Ri; - } sfmt_mov2dr; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_Rs1; - unsigned char out_Ri; - } sfmt_movdr; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_i32; - unsigned char out_Ri; - } sfmt_ldi32; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_i20; - unsigned char out_Ri; - } sfmt_ldi20; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_i8; - unsigned char out_Ri; - } sfmt_ldi8; - struct { /* */ - USI f_u10; - unsigned char in_h_gr_SI_14; - unsigned char in_h_gr_SI_15; - unsigned char out_h_gr_SI_14; - unsigned char out_h_gr_SI_15; - } sfmt_enter; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_SI_15; - unsigned char out_h_gr_SI_15; - } sfmt_str15gr; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - USI f_udisp6; - unsigned char in_Ri; - unsigned char in_h_gr_SI_15; - } sfmt_str15; - struct { /* */ - SI* i_Ri; - INT f_disp8; - UINT f_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_SI_14; - } sfmt_str14b; - struct { /* */ - SI* i_Ri; - SI f_disp9; - UINT f_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_SI_14; - } sfmt_str14h; - struct { /* */ - SI* i_Ri; - SI f_disp10; - UINT f_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_SI_14; - } sfmt_str14; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - unsigned char in_h_gr_SI_15; - unsigned char out_Ri; - unsigned char out_h_gr_SI_15; - } sfmt_ldr15gr; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - USI f_udisp6; - unsigned char in_h_gr_SI_15; - unsigned char out_Ri; - } sfmt_ldr15; - struct { /* */ - SI* i_Ri; - INT f_disp8; - UINT f_Ri; - unsigned char in_h_gr_SI_14; - unsigned char out_Ri; - } sfmt_ldr14ub; - struct { /* */ - SI* i_Ri; - SI f_disp9; - UINT f_Ri; - unsigned char in_h_gr_SI_14; - unsigned char out_Ri; - } sfmt_ldr14uh; - struct { /* */ - SI* i_Ri; - SI f_disp10; - UINT f_Ri; - unsigned char in_h_gr_SI_14; - unsigned char out_Ri; - } sfmt_ldr14; - struct { /* */ - SI* i_Ri; - SI f_m4; - UINT f_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } sfmt_add2; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_u4; - unsigned char in_Ri; - unsigned char out_Ri; - } sfmt_addi; - struct { /* */ - SI* i_Ri; - SI* i_Rj; - UINT f_Ri; - UINT f_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char in_h_gr_SI_13; - } sfmt_str13; - struct { /* */ - SI* i_Ri; - SI* i_Rj; - UINT f_Ri; - UINT f_Rj; - unsigned char in_Rj; - unsigned char in_h_gr_SI_13; - unsigned char out_Ri; - } sfmt_ldr13; - struct { /* */ - SI* i_Ri; - SI* i_Rj; - UINT f_Ri; - UINT f_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char out_Ri; - } sfmt_add; - struct { /* */ - UINT f_reglist_hi_st; - unsigned char in_h_gr_SI_10; - unsigned char in_h_gr_SI_11; - unsigned char in_h_gr_SI_12; - unsigned char in_h_gr_SI_13; - unsigned char in_h_gr_SI_14; - unsigned char in_h_gr_SI_15; - unsigned char in_h_gr_SI_8; - unsigned char in_h_gr_SI_9; - unsigned char out_h_gr_SI_15; - } sfmt_stm1; - struct { /* */ - UINT f_reglist_hi_ld; - unsigned char in_h_gr_SI_15; - unsigned char out_h_gr_SI_10; - unsigned char out_h_gr_SI_11; - unsigned char out_h_gr_SI_12; - unsigned char out_h_gr_SI_13; - unsigned char out_h_gr_SI_14; - unsigned char out_h_gr_SI_15; - unsigned char out_h_gr_SI_8; - unsigned char out_h_gr_SI_9; - } sfmt_ldm1; - struct { /* */ - UINT f_reglist_low_st; - unsigned char in_h_gr_SI_0; - unsigned char in_h_gr_SI_1; - unsigned char in_h_gr_SI_15; - unsigned char in_h_gr_SI_2; - unsigned char in_h_gr_SI_3; - unsigned char in_h_gr_SI_4; - unsigned char in_h_gr_SI_5; - unsigned char in_h_gr_SI_6; - unsigned char in_h_gr_SI_7; - unsigned char out_h_gr_SI_15; - } sfmt_stm0; - struct { /* */ - UINT f_reglist_low_ld; - unsigned char in_h_gr_SI_15; - unsigned char out_h_gr_SI_0; - unsigned char out_h_gr_SI_1; - unsigned char out_h_gr_SI_15; - unsigned char out_h_gr_SI_2; - unsigned char out_h_gr_SI_3; - unsigned char out_h_gr_SI_4; - unsigned char out_h_gr_SI_5; - unsigned char out_h_gr_SI_6; - unsigned char out_h_gr_SI_7; - } sfmt_ldm0; -#if WITH_SCACHE_PBB - /* Writeback handler. */ - struct { - /* Pointer to argbuf entry for insn whose results need writing back. */ - const struct argbuf *abuf; - } write; - /* x-before handler */ - struct { - /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ - int first_p; - } before; - /* x-after handler */ - struct { - int empty; - } after; - /* This entry is used to terminate each pbb. */ - struct { - /* Number of insns in pbb. */ - int insn_count; - /* Next pbb to execute. */ - SCACHE *next; - SCACHE *branch_target; - } chain; -#endif -}; - -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ - union sem semantic; - int written; - union sem_fields fields; -}; - -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; - -/* Macros to simplify extraction, reading and semantic code. - These define and assign the local vars that contain the insn's fields. */ - -#define EXTRACT_IFMT_EMPTY_VARS \ - unsigned int length; -#define EXTRACT_IFMT_EMPTY_CODE \ - length = 0; \ - -#define EXTRACT_IFMT_ADD_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_Rj; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_ADD_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_ADDI_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_u4; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_ADDI_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_ADD2_VARS \ - UINT f_op1; \ - UINT f_op2; \ - SI f_m4; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_ADD2_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_DIV0S_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_DIV0S_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_DIV3_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_op4; \ - unsigned int length; -#define EXTRACT_IFMT_DIV3_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_op4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDI8_VARS \ - UINT f_op1; \ - UINT f_i8; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_LDI8_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_i8 = EXTRACT_MSB0_UINT (insn, 16, 4, 8); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDI20_VARS \ - UINT f_op1; \ - UINT f_i20_4; \ - UINT f_i20_16; \ - UINT f_i20; \ - UINT f_op2; \ - UINT f_Ri; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - unsigned int length; -#define EXTRACT_IFMT_LDI20_CODE \ - length = 4; \ - word_1 = GETIMEMUHI (current_cpu, pc + 2); \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_i20_4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_i20_16 = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 0)); \ -{\ - f_i20 = ((((f_i20_4) << (16))) | (f_i20_16));\ -}\ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDI32_VARS \ - UINT f_op1; \ - UINT f_i32; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_Ri; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - UINT word_2; \ - unsigned int length; -#define EXTRACT_IFMT_LDI32_CODE \ - length = 6; \ - word_1 = GETIMEMUHI (current_cpu, pc + 2); \ - word_2 = GETIMEMUHI (current_cpu, pc + 4); \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_i32 = (0|(EXTRACT_MSB0_UINT (word_2, 16, 0, 16) << 0)|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 16)); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDR14_VARS \ - UINT f_op1; \ - SI f_disp10; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_LDR14_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDR14UH_VARS \ - UINT f_op1; \ - SI f_disp9; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_LDR14UH_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDR14UB_VARS \ - UINT f_op1; \ - INT f_disp8; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_LDR14UB_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDR15_VARS \ - UINT f_op1; \ - UINT f_op2; \ - USI f_udisp6; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_LDR15_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDR15DR_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_Rs2; \ - unsigned int length; -#define EXTRACT_IFMT_LDR15DR_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_MOVDR_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_Rs1; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_MOVDR_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_CALL_VARS \ - UINT f_op1; \ - UINT f_op5; \ - SI f_rel12; \ - unsigned int length; -#define EXTRACT_IFMT_CALL_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op5 = EXTRACT_MSB0_UINT (insn, 16, 4, 1); \ - f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); \ - -#define EXTRACT_IFMT_INT_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_u8; \ - unsigned int length; -#define EXTRACT_IFMT_INT_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_BRAD_VARS \ - UINT f_op1; \ - UINT f_cc; \ - SI f_rel9; \ - unsigned int length; -#define EXTRACT_IFMT_BRAD_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_cc = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); \ - -#define EXTRACT_IFMT_DMOVR13_VARS \ - UINT f_op1; \ - UINT f_op2; \ - USI f_dir10; \ - unsigned int length; -#define EXTRACT_IFMT_DMOVR13_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \ - -#define EXTRACT_IFMT_DMOVR13H_VARS \ - UINT f_op1; \ - UINT f_op2; \ - USI f_dir9; \ - unsigned int length; -#define EXTRACT_IFMT_DMOVR13H_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); \ - -#define EXTRACT_IFMT_DMOVR13B_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_dir8; \ - unsigned int length; -#define EXTRACT_IFMT_DMOVR13B_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_COPOP_VARS \ - UINT f_op1; \ - UINT f_ccc; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_CRj; \ - UINT f_u4c; \ - UINT f_CRi; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - unsigned int length; -#define EXTRACT_IFMT_COPOP_CODE \ - length = 4; \ - word_1 = GETIMEMUHI (current_cpu, pc + 2); \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_CRj = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \ - f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 4) << 0)); \ - -#define EXTRACT_IFMT_COPLD_VARS \ - UINT f_op1; \ - UINT f_ccc; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_Rjc; \ - UINT f_u4c; \ - UINT f_CRi; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - unsigned int length; -#define EXTRACT_IFMT_COPLD_CODE \ - length = 4; \ - word_1 = GETIMEMUHI (current_cpu, pc + 2); \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Rjc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \ - f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 4) << 0)); \ - -#define EXTRACT_IFMT_COPST_VARS \ - UINT f_op1; \ - UINT f_ccc; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_CRj; \ - UINT f_u4c; \ - UINT f_Ric; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - unsigned int length; -#define EXTRACT_IFMT_COPST_CODE \ - length = 4; \ - word_1 = GETIMEMUHI (current_cpu, pc + 2); \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_CRj = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \ - f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - f_Ric = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 4) << 0)); \ - -#define EXTRACT_IFMT_ADDSP_VARS \ - UINT f_op1; \ - UINT f_op2; \ - SI f_s10; \ - unsigned int length; -#define EXTRACT_IFMT_ADDSP_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); \ - -#define EXTRACT_IFMT_LDM0_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_reglist_low_ld; \ - unsigned int length; -#define EXTRACT_IFMT_LDM0_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_LDM1_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_reglist_hi_ld; \ - unsigned int length; -#define EXTRACT_IFMT_LDM1_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_STM0_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_reglist_low_st; \ - unsigned int length; -#define EXTRACT_IFMT_STM0_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_STM1_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_reglist_hi_st; \ - unsigned int length; -#define EXTRACT_IFMT_STM1_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_ENTER_VARS \ - UINT f_op1; \ - UINT f_op2; \ - USI f_u10; \ - unsigned int length; -#define EXTRACT_IFMT_ENTER_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \ - -/* Collection of various things for the trace handler to use. */ - -typedef struct trace_record { - IADDR pc; - /* FIXME:wip */ -} TRACE_RECORD; - -#endif /* CPU_FR30BF_H */ +// OBSOLETE /* CPU family header for fr30bf. +// OBSOLETE +// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN. +// OBSOLETE +// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// OBSOLETE +// OBSOLETE */ +// OBSOLETE +// OBSOLETE #ifndef CPU_FR30BF_H +// OBSOLETE #define CPU_FR30BF_H +// OBSOLETE +// OBSOLETE /* Maximum number of instructions that are fetched at a time. +// OBSOLETE This is for LIW type instructions sets (e.g. m32r). */ +// OBSOLETE #define MAX_LIW_INSNS 1 +// OBSOLETE +// OBSOLETE /* Maximum number of instructions that can be executed in parallel. */ +// OBSOLETE #define MAX_PARALLEL_INSNS 1 +// OBSOLETE +// OBSOLETE /* CPU state information. */ +// OBSOLETE typedef struct { +// OBSOLETE /* Hardware elements. */ +// OBSOLETE struct { +// OBSOLETE /* program counter */ +// OBSOLETE USI h_pc; +// OBSOLETE #define GET_H_PC() CPU (h_pc) +// OBSOLETE #define SET_H_PC(x) (CPU (h_pc) = (x)) +// OBSOLETE /* general registers */ +// OBSOLETE SI h_gr[16]; +// OBSOLETE #define GET_H_GR(a1) CPU (h_gr)[a1] +// OBSOLETE #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x)) +// OBSOLETE /* coprocessor registers */ +// OBSOLETE SI h_cr[16]; +// OBSOLETE #define GET_H_CR(a1) CPU (h_cr)[a1] +// OBSOLETE #define SET_H_CR(a1, x) (CPU (h_cr)[a1] = (x)) +// OBSOLETE /* dedicated registers */ +// OBSOLETE SI h_dr[6]; +// OBSOLETE #define GET_H_DR(index) fr30bf_h_dr_get_handler (current_cpu, index) +// OBSOLETE #define SET_H_DR(index, x) \ +// OBSOLETE do { \ +// OBSOLETE fr30bf_h_dr_set_handler (current_cpu, (index), (x));\ +// OBSOLETE ;} while (0) +// OBSOLETE /* processor status */ +// OBSOLETE USI h_ps; +// OBSOLETE #define GET_H_PS() fr30bf_h_ps_get_handler (current_cpu) +// OBSOLETE #define SET_H_PS(x) \ +// OBSOLETE do { \ +// OBSOLETE fr30bf_h_ps_set_handler (current_cpu, (x));\ +// OBSOLETE ;} while (0) +// OBSOLETE /* General Register 13 explicitly required */ +// OBSOLETE SI h_r13; +// OBSOLETE #define GET_H_R13() CPU (h_r13) +// OBSOLETE #define SET_H_R13(x) (CPU (h_r13) = (x)) +// OBSOLETE /* General Register 14 explicitly required */ +// OBSOLETE SI h_r14; +// OBSOLETE #define GET_H_R14() CPU (h_r14) +// OBSOLETE #define SET_H_R14(x) (CPU (h_r14) = (x)) +// OBSOLETE /* General Register 15 explicitly required */ +// OBSOLETE SI h_r15; +// OBSOLETE #define GET_H_R15() CPU (h_r15) +// OBSOLETE #define SET_H_R15(x) (CPU (h_r15) = (x)) +// OBSOLETE /* negative bit */ +// OBSOLETE BI h_nbit; +// OBSOLETE #define GET_H_NBIT() CPU (h_nbit) +// OBSOLETE #define SET_H_NBIT(x) (CPU (h_nbit) = (x)) +// OBSOLETE /* zero bit */ +// OBSOLETE BI h_zbit; +// OBSOLETE #define GET_H_ZBIT() CPU (h_zbit) +// OBSOLETE #define SET_H_ZBIT(x) (CPU (h_zbit) = (x)) +// OBSOLETE /* overflow bit */ +// OBSOLETE BI h_vbit; +// OBSOLETE #define GET_H_VBIT() CPU (h_vbit) +// OBSOLETE #define SET_H_VBIT(x) (CPU (h_vbit) = (x)) +// OBSOLETE /* carry bit */ +// OBSOLETE BI h_cbit; +// OBSOLETE #define GET_H_CBIT() CPU (h_cbit) +// OBSOLETE #define SET_H_CBIT(x) (CPU (h_cbit) = (x)) +// OBSOLETE /* interrupt enable bit */ +// OBSOLETE BI h_ibit; +// OBSOLETE #define GET_H_IBIT() CPU (h_ibit) +// OBSOLETE #define SET_H_IBIT(x) (CPU (h_ibit) = (x)) +// OBSOLETE /* stack bit */ +// OBSOLETE BI h_sbit; +// OBSOLETE #define GET_H_SBIT() fr30bf_h_sbit_get_handler (current_cpu) +// OBSOLETE #define SET_H_SBIT(x) \ +// OBSOLETE do { \ +// OBSOLETE fr30bf_h_sbit_set_handler (current_cpu, (x));\ +// OBSOLETE ;} while (0) +// OBSOLETE /* trace trap bit */ +// OBSOLETE BI h_tbit; +// OBSOLETE #define GET_H_TBIT() CPU (h_tbit) +// OBSOLETE #define SET_H_TBIT(x) (CPU (h_tbit) = (x)) +// OBSOLETE /* division 0 bit */ +// OBSOLETE BI h_d0bit; +// OBSOLETE #define GET_H_D0BIT() CPU (h_d0bit) +// OBSOLETE #define SET_H_D0BIT(x) (CPU (h_d0bit) = (x)) +// OBSOLETE /* division 1 bit */ +// OBSOLETE BI h_d1bit; +// OBSOLETE #define GET_H_D1BIT() CPU (h_d1bit) +// OBSOLETE #define SET_H_D1BIT(x) (CPU (h_d1bit) = (x)) +// OBSOLETE /* condition code bits */ +// OBSOLETE UQI h_ccr; +// OBSOLETE #define GET_H_CCR() fr30bf_h_ccr_get_handler (current_cpu) +// OBSOLETE #define SET_H_CCR(x) \ +// OBSOLETE do { \ +// OBSOLETE fr30bf_h_ccr_set_handler (current_cpu, (x));\ +// OBSOLETE ;} while (0) +// OBSOLETE /* system condition bits */ +// OBSOLETE UQI h_scr; +// OBSOLETE #define GET_H_SCR() fr30bf_h_scr_get_handler (current_cpu) +// OBSOLETE #define SET_H_SCR(x) \ +// OBSOLETE do { \ +// OBSOLETE fr30bf_h_scr_set_handler (current_cpu, (x));\ +// OBSOLETE ;} while (0) +// OBSOLETE /* interrupt level mask */ +// OBSOLETE UQI h_ilm; +// OBSOLETE #define GET_H_ILM() fr30bf_h_ilm_get_handler (current_cpu) +// OBSOLETE #define SET_H_ILM(x) \ +// OBSOLETE do { \ +// OBSOLETE fr30bf_h_ilm_set_handler (current_cpu, (x));\ +// OBSOLETE ;} while (0) +// OBSOLETE } hardware; +// OBSOLETE #define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware) +// OBSOLETE } FR30BF_CPU_DATA; +// OBSOLETE +// OBSOLETE /* Cover fns for register access. */ +// OBSOLETE USI fr30bf_h_pc_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_pc_set (SIM_CPU *, USI); +// OBSOLETE SI fr30bf_h_gr_get (SIM_CPU *, UINT); +// OBSOLETE void fr30bf_h_gr_set (SIM_CPU *, UINT, SI); +// OBSOLETE SI fr30bf_h_cr_get (SIM_CPU *, UINT); +// OBSOLETE void fr30bf_h_cr_set (SIM_CPU *, UINT, SI); +// OBSOLETE SI fr30bf_h_dr_get (SIM_CPU *, UINT); +// OBSOLETE void fr30bf_h_dr_set (SIM_CPU *, UINT, SI); +// OBSOLETE USI fr30bf_h_ps_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_ps_set (SIM_CPU *, USI); +// OBSOLETE SI fr30bf_h_r13_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_r13_set (SIM_CPU *, SI); +// OBSOLETE SI fr30bf_h_r14_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_r14_set (SIM_CPU *, SI); +// OBSOLETE SI fr30bf_h_r15_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_r15_set (SIM_CPU *, SI); +// OBSOLETE BI fr30bf_h_nbit_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_nbit_set (SIM_CPU *, BI); +// OBSOLETE BI fr30bf_h_zbit_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_zbit_set (SIM_CPU *, BI); +// OBSOLETE BI fr30bf_h_vbit_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_vbit_set (SIM_CPU *, BI); +// OBSOLETE BI fr30bf_h_cbit_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_cbit_set (SIM_CPU *, BI); +// OBSOLETE BI fr30bf_h_ibit_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_ibit_set (SIM_CPU *, BI); +// OBSOLETE BI fr30bf_h_sbit_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_sbit_set (SIM_CPU *, BI); +// OBSOLETE BI fr30bf_h_tbit_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_tbit_set (SIM_CPU *, BI); +// OBSOLETE BI fr30bf_h_d0bit_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_d0bit_set (SIM_CPU *, BI); +// OBSOLETE BI fr30bf_h_d1bit_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_d1bit_set (SIM_CPU *, BI); +// OBSOLETE UQI fr30bf_h_ccr_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_ccr_set (SIM_CPU *, UQI); +// OBSOLETE UQI fr30bf_h_scr_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_scr_set (SIM_CPU *, UQI); +// OBSOLETE UQI fr30bf_h_ilm_get (SIM_CPU *); +// OBSOLETE void fr30bf_h_ilm_set (SIM_CPU *, UQI); +// OBSOLETE +// OBSOLETE /* These must be hand-written. */ +// OBSOLETE extern CPUREG_FETCH_FN fr30bf_fetch_register; +// OBSOLETE extern CPUREG_STORE_FN fr30bf_store_register; +// OBSOLETE +// OBSOLETE typedef struct { +// OBSOLETE UINT load_regs; +// OBSOLETE UINT load_regs_pending; +// OBSOLETE } MODEL_FR30_1_DATA; +// OBSOLETE +// OBSOLETE /* Instruction argument buffer. */ +// OBSOLETE +// OBSOLETE union sem_fields { +// OBSOLETE struct { /* no operands */ +// OBSOLETE int empty; +// OBSOLETE } fmt_empty; +// OBSOLETE struct { /* */ +// OBSOLETE IADDR i_label9; +// OBSOLETE } sfmt_brad; +// OBSOLETE struct { /* */ +// OBSOLETE UINT f_u8; +// OBSOLETE } sfmt_int; +// OBSOLETE struct { /* */ +// OBSOLETE IADDR i_label12; +// OBSOLETE } sfmt_call; +// OBSOLETE struct { /* */ +// OBSOLETE SI f_s10; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char out_h_gr_SI_15; +// OBSOLETE } sfmt_addsp; +// OBSOLETE struct { /* */ +// OBSOLETE USI f_dir10; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char out_h_gr_SI_15; +// OBSOLETE } sfmt_dmovr15pi; +// OBSOLETE struct { /* */ +// OBSOLETE UINT f_dir8; +// OBSOLETE unsigned char in_h_gr_SI_13; +// OBSOLETE unsigned char out_h_gr_SI_13; +// OBSOLETE } sfmt_dmovr13pib; +// OBSOLETE struct { /* */ +// OBSOLETE USI f_dir9; +// OBSOLETE unsigned char in_h_gr_SI_13; +// OBSOLETE unsigned char out_h_gr_SI_13; +// OBSOLETE } sfmt_dmovr13pih; +// OBSOLETE struct { /* */ +// OBSOLETE USI f_dir10; +// OBSOLETE unsigned char in_h_gr_SI_13; +// OBSOLETE unsigned char out_h_gr_SI_13; +// OBSOLETE } sfmt_dmovr13pi; +// OBSOLETE struct { /* */ +// OBSOLETE UINT f_Rs2; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char out_h_gr_SI_15; +// OBSOLETE } sfmt_ldr15dr; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE UINT f_Ri; +// OBSOLETE UINT f_Rs1; +// OBSOLETE unsigned char in_Ri; +// OBSOLETE } sfmt_mov2dr; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE UINT f_Ri; +// OBSOLETE UINT f_Rs1; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_movdr; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE UINT f_Ri; +// OBSOLETE UINT f_i32; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_ldi32; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE UINT f_Ri; +// OBSOLETE UINT f_i20; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_ldi20; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE UINT f_Ri; +// OBSOLETE UINT f_i8; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_ldi8; +// OBSOLETE struct { /* */ +// OBSOLETE USI f_u10; +// OBSOLETE unsigned char in_h_gr_SI_14; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char out_h_gr_SI_14; +// OBSOLETE unsigned char out_h_gr_SI_15; +// OBSOLETE } sfmt_enter; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE UINT f_Ri; +// OBSOLETE unsigned char in_Ri; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char out_h_gr_SI_15; +// OBSOLETE } sfmt_str15gr; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE UINT f_Ri; +// OBSOLETE USI f_udisp6; +// OBSOLETE unsigned char in_Ri; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE } sfmt_str15; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE INT f_disp8; +// OBSOLETE UINT f_Ri; +// OBSOLETE unsigned char in_Ri; +// OBSOLETE unsigned char in_h_gr_SI_14; +// OBSOLETE } sfmt_str14b; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE SI f_disp9; +// OBSOLETE UINT f_Ri; +// OBSOLETE unsigned char in_Ri; +// OBSOLETE unsigned char in_h_gr_SI_14; +// OBSOLETE } sfmt_str14h; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE SI f_disp10; +// OBSOLETE UINT f_Ri; +// OBSOLETE unsigned char in_Ri; +// OBSOLETE unsigned char in_h_gr_SI_14; +// OBSOLETE } sfmt_str14; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE UINT f_Ri; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE unsigned char out_h_gr_SI_15; +// OBSOLETE } sfmt_ldr15gr; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE UINT f_Ri; +// OBSOLETE USI f_udisp6; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_ldr15; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE INT f_disp8; +// OBSOLETE UINT f_Ri; +// OBSOLETE unsigned char in_h_gr_SI_14; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_ldr14ub; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE SI f_disp9; +// OBSOLETE UINT f_Ri; +// OBSOLETE unsigned char in_h_gr_SI_14; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_ldr14uh; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE SI f_disp10; +// OBSOLETE UINT f_Ri; +// OBSOLETE unsigned char in_h_gr_SI_14; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_ldr14; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE SI f_m4; +// OBSOLETE UINT f_Ri; +// OBSOLETE unsigned char in_Ri; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_add2; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE UINT f_Ri; +// OBSOLETE UINT f_u4; +// OBSOLETE unsigned char in_Ri; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_addi; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE SI* i_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE UINT f_Rj; +// OBSOLETE unsigned char in_Ri; +// OBSOLETE unsigned char in_Rj; +// OBSOLETE unsigned char in_h_gr_SI_13; +// OBSOLETE } sfmt_str13; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE SI* i_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE UINT f_Rj; +// OBSOLETE unsigned char in_Rj; +// OBSOLETE unsigned char in_h_gr_SI_13; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_ldr13; +// OBSOLETE struct { /* */ +// OBSOLETE SI* i_Ri; +// OBSOLETE SI* i_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE UINT f_Rj; +// OBSOLETE unsigned char in_Ri; +// OBSOLETE unsigned char in_Rj; +// OBSOLETE unsigned char out_Ri; +// OBSOLETE } sfmt_add; +// OBSOLETE struct { /* */ +// OBSOLETE UINT f_reglist_hi_st; +// OBSOLETE unsigned char in_h_gr_SI_10; +// OBSOLETE unsigned char in_h_gr_SI_11; +// OBSOLETE unsigned char in_h_gr_SI_12; +// OBSOLETE unsigned char in_h_gr_SI_13; +// OBSOLETE unsigned char in_h_gr_SI_14; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char in_h_gr_SI_8; +// OBSOLETE unsigned char in_h_gr_SI_9; +// OBSOLETE unsigned char out_h_gr_SI_15; +// OBSOLETE } sfmt_stm1; +// OBSOLETE struct { /* */ +// OBSOLETE UINT f_reglist_hi_ld; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char out_h_gr_SI_10; +// OBSOLETE unsigned char out_h_gr_SI_11; +// OBSOLETE unsigned char out_h_gr_SI_12; +// OBSOLETE unsigned char out_h_gr_SI_13; +// OBSOLETE unsigned char out_h_gr_SI_14; +// OBSOLETE unsigned char out_h_gr_SI_15; +// OBSOLETE unsigned char out_h_gr_SI_8; +// OBSOLETE unsigned char out_h_gr_SI_9; +// OBSOLETE } sfmt_ldm1; +// OBSOLETE struct { /* */ +// OBSOLETE UINT f_reglist_low_st; +// OBSOLETE unsigned char in_h_gr_SI_0; +// OBSOLETE unsigned char in_h_gr_SI_1; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char in_h_gr_SI_2; +// OBSOLETE unsigned char in_h_gr_SI_3; +// OBSOLETE unsigned char in_h_gr_SI_4; +// OBSOLETE unsigned char in_h_gr_SI_5; +// OBSOLETE unsigned char in_h_gr_SI_6; +// OBSOLETE unsigned char in_h_gr_SI_7; +// OBSOLETE unsigned char out_h_gr_SI_15; +// OBSOLETE } sfmt_stm0; +// OBSOLETE struct { /* */ +// OBSOLETE UINT f_reglist_low_ld; +// OBSOLETE unsigned char in_h_gr_SI_15; +// OBSOLETE unsigned char out_h_gr_SI_0; +// OBSOLETE unsigned char out_h_gr_SI_1; +// OBSOLETE unsigned char out_h_gr_SI_15; +// OBSOLETE unsigned char out_h_gr_SI_2; +// OBSOLETE unsigned char out_h_gr_SI_3; +// OBSOLETE unsigned char out_h_gr_SI_4; +// OBSOLETE unsigned char out_h_gr_SI_5; +// OBSOLETE unsigned char out_h_gr_SI_6; +// OBSOLETE unsigned char out_h_gr_SI_7; +// OBSOLETE } sfmt_ldm0; +// OBSOLETE #if WITH_SCACHE_PBB +// OBSOLETE /* Writeback handler. */ +// OBSOLETE struct { +// OBSOLETE /* Pointer to argbuf entry for insn whose results need writing back. */ +// OBSOLETE const struct argbuf *abuf; +// OBSOLETE } write; +// OBSOLETE /* x-before handler */ +// OBSOLETE struct { +// OBSOLETE /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ +// OBSOLETE int first_p; +// OBSOLETE } before; +// OBSOLETE /* x-after handler */ +// OBSOLETE struct { +// OBSOLETE int empty; +// OBSOLETE } after; +// OBSOLETE /* This entry is used to terminate each pbb. */ +// OBSOLETE struct { +// OBSOLETE /* Number of insns in pbb. */ +// OBSOLETE int insn_count; +// OBSOLETE /* Next pbb to execute. */ +// OBSOLETE SCACHE *next; +// OBSOLETE SCACHE *branch_target; +// OBSOLETE } chain; +// OBSOLETE #endif +// OBSOLETE }; +// OBSOLETE +// OBSOLETE /* The ARGBUF struct. */ +// OBSOLETE struct argbuf { +// OBSOLETE /* These are the baseclass definitions. */ +// OBSOLETE IADDR addr; +// OBSOLETE const IDESC *idesc; +// OBSOLETE char trace_p; +// OBSOLETE char profile_p; +// OBSOLETE /* ??? Temporary hack for skip insns. */ +// OBSOLETE char skip_count; +// OBSOLETE char unused; +// OBSOLETE /* cpu specific data follows */ +// OBSOLETE union sem semantic; +// OBSOLETE int written; +// OBSOLETE union sem_fields fields; +// OBSOLETE }; +// OBSOLETE +// OBSOLETE /* A cached insn. +// OBSOLETE +// OBSOLETE ??? SCACHE used to contain more than just argbuf. We could delete the +// OBSOLETE type entirely and always just use ARGBUF, but for future concerns and as +// OBSOLETE a level of abstraction it is left in. */ +// OBSOLETE +// OBSOLETE struct scache { +// OBSOLETE struct argbuf argbuf; +// OBSOLETE }; +// OBSOLETE +// OBSOLETE /* Macros to simplify extraction, reading and semantic code. +// OBSOLETE These define and assign the local vars that contain the insn's fields. */ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_EMPTY_VARS \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_EMPTY_CODE \ +// OBSOLETE length = 0; \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_ADD_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_Rj; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_ADD_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_ADDI_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_u4; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_ADDI_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_ADD2_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE SI f_m4; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_ADD2_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_DIV0S_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_op3; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_DIV0S_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_DIV3_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_op3; \ +// OBSOLETE UINT f_op4; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_DIV3_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_op4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_LDI8_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_i8; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_LDI8_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_i8 = EXTRACT_MSB0_UINT (insn, 16, 4, 8); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_LDI20_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_i20_4; \ +// OBSOLETE UINT f_i20_16; \ +// OBSOLETE UINT f_i20; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE /* Contents of trailing part of insn. */ \ +// OBSOLETE UINT word_1; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_LDI20_CODE \ +// OBSOLETE length = 4; \ +// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_i20_4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_i20_16 = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 0)); \ +// OBSOLETE {\ +// OBSOLETE f_i20 = ((((f_i20_4) << (16))) | (f_i20_16));\ +// OBSOLETE }\ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_LDI32_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_i32; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_op3; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE /* Contents of trailing part of insn. */ \ +// OBSOLETE UINT word_1; \ +// OBSOLETE UINT word_2; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_LDI32_CODE \ +// OBSOLETE length = 6; \ +// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); \ +// OBSOLETE word_2 = GETIMEMUHI (current_cpu, pc + 4); \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_i32 = (0|(EXTRACT_MSB0_UINT (word_2, 16, 0, 16) << 0)|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 16)); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_LDR14_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE SI f_disp10; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_LDR14_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_LDR14UH_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE SI f_disp9; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_LDR14UH_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_LDR14UB_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE INT f_disp8; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_LDR14UB_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_LDR15_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE USI f_udisp6; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_LDR15_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_LDR15DR_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_op3; \ +// OBSOLETE UINT f_Rs2; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_LDR15DR_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_MOVDR_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_Rs1; \ +// OBSOLETE UINT f_Ri; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_MOVDR_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_CALL_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op5; \ +// OBSOLETE SI f_rel12; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_CALL_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op5 = EXTRACT_MSB0_UINT (insn, 16, 4, 1); \ +// OBSOLETE f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_INT_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_u8; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_INT_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_BRAD_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_cc; \ +// OBSOLETE SI f_rel9; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_BRAD_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_cc = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_DMOVR13_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE USI f_dir10; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_DMOVR13_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_DMOVR13H_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE USI f_dir9; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_DMOVR13H_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_DMOVR13B_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_dir8; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_DMOVR13B_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_COPOP_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_ccc; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_op3; \ +// OBSOLETE UINT f_CRj; \ +// OBSOLETE UINT f_u4c; \ +// OBSOLETE UINT f_CRi; \ +// OBSOLETE /* Contents of trailing part of insn. */ \ +// OBSOLETE UINT word_1; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_COPOP_CODE \ +// OBSOLETE length = 4; \ +// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_CRj = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \ +// OBSOLETE f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 4) << 0)); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_COPLD_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_ccc; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_op3; \ +// OBSOLETE UINT f_Rjc; \ +// OBSOLETE UINT f_u4c; \ +// OBSOLETE UINT f_CRi; \ +// OBSOLETE /* Contents of trailing part of insn. */ \ +// OBSOLETE UINT word_1; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_COPLD_CODE \ +// OBSOLETE length = 4; \ +// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_Rjc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \ +// OBSOLETE f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 4) << 0)); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_COPST_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_ccc; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_op3; \ +// OBSOLETE UINT f_CRj; \ +// OBSOLETE UINT f_u4c; \ +// OBSOLETE UINT f_Ric; \ +// OBSOLETE /* Contents of trailing part of insn. */ \ +// OBSOLETE UINT word_1; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_COPST_CODE \ +// OBSOLETE length = 4; \ +// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ +// OBSOLETE f_CRj = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \ +// OBSOLETE f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +// OBSOLETE f_Ric = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 4) << 0)); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_ADDSP_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE SI f_s10; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_ADDSP_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_LDM0_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_reglist_low_ld; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_LDM0_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_LDM1_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_reglist_hi_ld; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_LDM1_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_STM0_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_reglist_low_st; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_STM0_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_STM1_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE UINT f_reglist_hi_st; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_STM1_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ +// OBSOLETE +// OBSOLETE #define EXTRACT_IFMT_ENTER_VARS \ +// OBSOLETE UINT f_op1; \ +// OBSOLETE UINT f_op2; \ +// OBSOLETE USI f_u10; \ +// OBSOLETE unsigned int length; +// OBSOLETE #define EXTRACT_IFMT_ENTER_CODE \ +// OBSOLETE length = 2; \ +// OBSOLETE f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ +// OBSOLETE f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ +// OBSOLETE f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \ +// OBSOLETE +// OBSOLETE /* Collection of various things for the trace handler to use. */ +// OBSOLETE +// OBSOLETE typedef struct trace_record { +// OBSOLETE IADDR pc; +// OBSOLETE /* FIXME:wip */ +// OBSOLETE } TRACE_RECORD; +// OBSOLETE +// OBSOLETE #endif /* CPU_FR30BF_H */ diff --git a/sim/fr30/cpuall.h b/sim/fr30/cpuall.h index 296228d..e0c7c00 100644 --- a/sim/fr30/cpuall.h +++ b/sim/fr30/cpuall.h @@ -1,66 +1,66 @@ -/* Simulator CPU header for fr30. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef FR30_CPUALL_H -#define FR30_CPUALL_H - -/* Include files for each cpu family. */ - -#ifdef WANT_CPU_FR30BF -#include "eng.h" -#include "cgen-engine.h" -#include "cpu.h" -#include "decode.h" -#endif - -extern const MACH fr30_mach; - -#ifndef WANT_CPU -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ -}; -#endif - -#ifndef WANT_CPU -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; -#endif - -#endif /* FR30_CPUALL_H */ +// OBSOLETE /* Simulator CPU header for fr30. +// OBSOLETE +// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN. +// OBSOLETE +// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// OBSOLETE +// OBSOLETE */ +// OBSOLETE +// OBSOLETE #ifndef FR30_CPUALL_H +// OBSOLETE #define FR30_CPUALL_H +// OBSOLETE +// OBSOLETE /* Include files for each cpu family. */ +// OBSOLETE +// OBSOLETE #ifdef WANT_CPU_FR30BF +// OBSOLETE #include "eng.h" +// OBSOLETE #include "cgen-engine.h" +// OBSOLETE #include "cpu.h" +// OBSOLETE #include "decode.h" +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE extern const MACH fr30_mach; +// OBSOLETE +// OBSOLETE #ifndef WANT_CPU +// OBSOLETE /* The ARGBUF struct. */ +// OBSOLETE struct argbuf { +// OBSOLETE /* These are the baseclass definitions. */ +// OBSOLETE IADDR addr; +// OBSOLETE const IDESC *idesc; +// OBSOLETE char trace_p; +// OBSOLETE char profile_p; +// OBSOLETE /* ??? Temporary hack for skip insns. */ +// OBSOLETE char skip_count; +// OBSOLETE char unused; +// OBSOLETE /* cpu specific data follows */ +// OBSOLETE }; +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE #ifndef WANT_CPU +// OBSOLETE /* A cached insn. +// OBSOLETE +// OBSOLETE ??? SCACHE used to contain more than just argbuf. We could delete the +// OBSOLETE type entirely and always just use ARGBUF, but for future concerns and as +// OBSOLETE a level of abstraction it is left in. */ +// OBSOLETE +// OBSOLETE struct scache { +// OBSOLETE struct argbuf argbuf; +// OBSOLETE }; +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE #endif /* FR30_CPUALL_H */ diff --git a/sim/fr30/decode.c b/sim/fr30/decode.c index 445c3ab..dbbcce5 100644 --- a/sim/fr30/decode.c +++ b/sim/fr30/decode.c @@ -1,3453 +1,3453 @@ -/* Simulator instruction decoder for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU fr30bf -#define WANT_CPU_FR30BF - -#include "sim-main.h" -#include "sim-assert.h" - -/* The instruction descriptor array. - This is computed at runtime. Space for it is not malloc'd to save a - teensy bit of cpu in the decoder. Moving it to malloc space is trivial - but won't be done until necessary (we don't currently support the runtime - addition of instructions nor an SMP machine with different cpus). */ -static IDESC fr30bf_insn_data[FR30BF_INSN_XCHB + 1]; - -/* Commas between elements are contained in the macros. - Some of these are conditionally compiled out. */ - -static const struct insn_sem fr30bf_insn_sem[] = -{ - { VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, FR30BF_INSN_X_AFTER, FR30BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, FR30BF_INSN_X_BEFORE, FR30BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, FR30BF_INSN_X_CTI_CHAIN, FR30BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, FR30BF_INSN_X_CHAIN, FR30BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, FR30BF_INSN_X_BEGIN, FR30BF_SFMT_EMPTY }, - { FR30_INSN_ADD, FR30BF_INSN_ADD, FR30BF_SFMT_ADD }, - { FR30_INSN_ADDI, FR30BF_INSN_ADDI, FR30BF_SFMT_ADDI }, - { FR30_INSN_ADD2, FR30BF_INSN_ADD2, FR30BF_SFMT_ADD2 }, - { FR30_INSN_ADDC, FR30BF_INSN_ADDC, FR30BF_SFMT_ADDC }, - { FR30_INSN_ADDN, FR30BF_INSN_ADDN, FR30BF_SFMT_ADDN }, - { FR30_INSN_ADDNI, FR30BF_INSN_ADDNI, FR30BF_SFMT_ADDNI }, - { FR30_INSN_ADDN2, FR30BF_INSN_ADDN2, FR30BF_SFMT_ADDN2 }, - { FR30_INSN_SUB, FR30BF_INSN_SUB, FR30BF_SFMT_ADD }, - { FR30_INSN_SUBC, FR30BF_INSN_SUBC, FR30BF_SFMT_ADDC }, - { FR30_INSN_SUBN, FR30BF_INSN_SUBN, FR30BF_SFMT_ADDN }, - { FR30_INSN_CMP, FR30BF_INSN_CMP, FR30BF_SFMT_CMP }, - { FR30_INSN_CMPI, FR30BF_INSN_CMPI, FR30BF_SFMT_CMPI }, - { FR30_INSN_CMP2, FR30BF_INSN_CMP2, FR30BF_SFMT_CMP2 }, - { FR30_INSN_AND, FR30BF_INSN_AND, FR30BF_SFMT_AND }, - { FR30_INSN_OR, FR30BF_INSN_OR, FR30BF_SFMT_AND }, - { FR30_INSN_EOR, FR30BF_INSN_EOR, FR30BF_SFMT_AND }, - { FR30_INSN_ANDM, FR30BF_INSN_ANDM, FR30BF_SFMT_ANDM }, - { FR30_INSN_ANDH, FR30BF_INSN_ANDH, FR30BF_SFMT_ANDH }, - { FR30_INSN_ANDB, FR30BF_INSN_ANDB, FR30BF_SFMT_ANDB }, - { FR30_INSN_ORM, FR30BF_INSN_ORM, FR30BF_SFMT_ANDM }, - { FR30_INSN_ORH, FR30BF_INSN_ORH, FR30BF_SFMT_ANDH }, - { FR30_INSN_ORB, FR30BF_INSN_ORB, FR30BF_SFMT_ANDB }, - { FR30_INSN_EORM, FR30BF_INSN_EORM, FR30BF_SFMT_ANDM }, - { FR30_INSN_EORH, FR30BF_INSN_EORH, FR30BF_SFMT_ANDH }, - { FR30_INSN_EORB, FR30BF_INSN_EORB, FR30BF_SFMT_ANDB }, - { FR30_INSN_BANDL, FR30BF_INSN_BANDL, FR30BF_SFMT_BANDL }, - { FR30_INSN_BORL, FR30BF_INSN_BORL, FR30BF_SFMT_BANDL }, - { FR30_INSN_BEORL, FR30BF_INSN_BEORL, FR30BF_SFMT_BANDL }, - { FR30_INSN_BANDH, FR30BF_INSN_BANDH, FR30BF_SFMT_BANDL }, - { FR30_INSN_BORH, FR30BF_INSN_BORH, FR30BF_SFMT_BANDL }, - { FR30_INSN_BEORH, FR30BF_INSN_BEORH, FR30BF_SFMT_BANDL }, - { FR30_INSN_BTSTL, FR30BF_INSN_BTSTL, FR30BF_SFMT_BTSTL }, - { FR30_INSN_BTSTH, FR30BF_INSN_BTSTH, FR30BF_SFMT_BTSTL }, - { FR30_INSN_MUL, FR30BF_INSN_MUL, FR30BF_SFMT_MUL }, - { FR30_INSN_MULU, FR30BF_INSN_MULU, FR30BF_SFMT_MULU }, - { FR30_INSN_MULH, FR30BF_INSN_MULH, FR30BF_SFMT_MULH }, - { FR30_INSN_MULUH, FR30BF_INSN_MULUH, FR30BF_SFMT_MULH }, - { FR30_INSN_DIV0S, FR30BF_INSN_DIV0S, FR30BF_SFMT_DIV0S }, - { FR30_INSN_DIV0U, FR30BF_INSN_DIV0U, FR30BF_SFMT_DIV0U }, - { FR30_INSN_DIV1, FR30BF_INSN_DIV1, FR30BF_SFMT_DIV1 }, - { FR30_INSN_DIV2, FR30BF_INSN_DIV2, FR30BF_SFMT_DIV2 }, - { FR30_INSN_DIV3, FR30BF_INSN_DIV3, FR30BF_SFMT_DIV3 }, - { FR30_INSN_DIV4S, FR30BF_INSN_DIV4S, FR30BF_SFMT_DIV4S }, - { FR30_INSN_LSL, FR30BF_INSN_LSL, FR30BF_SFMT_LSL }, - { FR30_INSN_LSLI, FR30BF_INSN_LSLI, FR30BF_SFMT_LSLI }, - { FR30_INSN_LSL2, FR30BF_INSN_LSL2, FR30BF_SFMT_LSLI }, - { FR30_INSN_LSR, FR30BF_INSN_LSR, FR30BF_SFMT_LSL }, - { FR30_INSN_LSRI, FR30BF_INSN_LSRI, FR30BF_SFMT_LSLI }, - { FR30_INSN_LSR2, FR30BF_INSN_LSR2, FR30BF_SFMT_LSLI }, - { FR30_INSN_ASR, FR30BF_INSN_ASR, FR30BF_SFMT_LSL }, - { FR30_INSN_ASRI, FR30BF_INSN_ASRI, FR30BF_SFMT_LSLI }, - { FR30_INSN_ASR2, FR30BF_INSN_ASR2, FR30BF_SFMT_LSLI }, - { FR30_INSN_LDI8, FR30BF_INSN_LDI8, FR30BF_SFMT_LDI8 }, - { FR30_INSN_LDI20, FR30BF_INSN_LDI20, FR30BF_SFMT_LDI20 }, - { FR30_INSN_LDI32, FR30BF_INSN_LDI32, FR30BF_SFMT_LDI32 }, - { FR30_INSN_LD, FR30BF_INSN_LD, FR30BF_SFMT_LD }, - { FR30_INSN_LDUH, FR30BF_INSN_LDUH, FR30BF_SFMT_LDUH }, - { FR30_INSN_LDUB, FR30BF_INSN_LDUB, FR30BF_SFMT_LDUB }, - { FR30_INSN_LDR13, FR30BF_INSN_LDR13, FR30BF_SFMT_LDR13 }, - { FR30_INSN_LDR13UH, FR30BF_INSN_LDR13UH, FR30BF_SFMT_LDR13UH }, - { FR30_INSN_LDR13UB, FR30BF_INSN_LDR13UB, FR30BF_SFMT_LDR13UB }, - { FR30_INSN_LDR14, FR30BF_INSN_LDR14, FR30BF_SFMT_LDR14 }, - { FR30_INSN_LDR14UH, FR30BF_INSN_LDR14UH, FR30BF_SFMT_LDR14UH }, - { FR30_INSN_LDR14UB, FR30BF_INSN_LDR14UB, FR30BF_SFMT_LDR14UB }, - { FR30_INSN_LDR15, FR30BF_INSN_LDR15, FR30BF_SFMT_LDR15 }, - { FR30_INSN_LDR15GR, FR30BF_INSN_LDR15GR, FR30BF_SFMT_LDR15GR }, - { FR30_INSN_LDR15DR, FR30BF_INSN_LDR15DR, FR30BF_SFMT_LDR15DR }, - { FR30_INSN_LDR15PS, FR30BF_INSN_LDR15PS, FR30BF_SFMT_LDR15PS }, - { FR30_INSN_ST, FR30BF_INSN_ST, FR30BF_SFMT_ST }, - { FR30_INSN_STH, FR30BF_INSN_STH, FR30BF_SFMT_STH }, - { FR30_INSN_STB, FR30BF_INSN_STB, FR30BF_SFMT_STB }, - { FR30_INSN_STR13, FR30BF_INSN_STR13, FR30BF_SFMT_STR13 }, - { FR30_INSN_STR13H, FR30BF_INSN_STR13H, FR30BF_SFMT_STR13H }, - { FR30_INSN_STR13B, FR30BF_INSN_STR13B, FR30BF_SFMT_STR13B }, - { FR30_INSN_STR14, FR30BF_INSN_STR14, FR30BF_SFMT_STR14 }, - { FR30_INSN_STR14H, FR30BF_INSN_STR14H, FR30BF_SFMT_STR14H }, - { FR30_INSN_STR14B, FR30BF_INSN_STR14B, FR30BF_SFMT_STR14B }, - { FR30_INSN_STR15, FR30BF_INSN_STR15, FR30BF_SFMT_STR15 }, - { FR30_INSN_STR15GR, FR30BF_INSN_STR15GR, FR30BF_SFMT_STR15GR }, - { FR30_INSN_STR15DR, FR30BF_INSN_STR15DR, FR30BF_SFMT_STR15DR }, - { FR30_INSN_STR15PS, FR30BF_INSN_STR15PS, FR30BF_SFMT_STR15PS }, - { FR30_INSN_MOV, FR30BF_INSN_MOV, FR30BF_SFMT_MOV }, - { FR30_INSN_MOVDR, FR30BF_INSN_MOVDR, FR30BF_SFMT_MOVDR }, - { FR30_INSN_MOVPS, FR30BF_INSN_MOVPS, FR30BF_SFMT_MOVPS }, - { FR30_INSN_MOV2DR, FR30BF_INSN_MOV2DR, FR30BF_SFMT_MOV2DR }, - { FR30_INSN_MOV2PS, FR30BF_INSN_MOV2PS, FR30BF_SFMT_MOV2PS }, - { FR30_INSN_JMP, FR30BF_INSN_JMP, FR30BF_SFMT_JMP }, - { FR30_INSN_JMPD, FR30BF_INSN_JMPD, FR30BF_SFMT_JMP }, - { FR30_INSN_CALLR, FR30BF_INSN_CALLR, FR30BF_SFMT_CALLR }, - { FR30_INSN_CALLRD, FR30BF_INSN_CALLRD, FR30BF_SFMT_CALLR }, - { FR30_INSN_CALL, FR30BF_INSN_CALL, FR30BF_SFMT_CALL }, - { FR30_INSN_CALLD, FR30BF_INSN_CALLD, FR30BF_SFMT_CALL }, - { FR30_INSN_RET, FR30BF_INSN_RET, FR30BF_SFMT_RET }, - { FR30_INSN_RET_D, FR30BF_INSN_RET_D, FR30BF_SFMT_RET }, - { FR30_INSN_INT, FR30BF_INSN_INT, FR30BF_SFMT_INT }, - { FR30_INSN_INTE, FR30BF_INSN_INTE, FR30BF_SFMT_INTE }, - { FR30_INSN_RETI, FR30BF_INSN_RETI, FR30BF_SFMT_RETI }, - { FR30_INSN_BRAD, FR30BF_INSN_BRAD, FR30BF_SFMT_BRAD }, - { FR30_INSN_BRA, FR30BF_INSN_BRA, FR30BF_SFMT_BRAD }, - { FR30_INSN_BNOD, FR30BF_INSN_BNOD, FR30BF_SFMT_BNOD }, - { FR30_INSN_BNO, FR30BF_INSN_BNO, FR30BF_SFMT_BNOD }, - { FR30_INSN_BEQD, FR30BF_INSN_BEQD, FR30BF_SFMT_BEQD }, - { FR30_INSN_BEQ, FR30BF_INSN_BEQ, FR30BF_SFMT_BEQD }, - { FR30_INSN_BNED, FR30BF_INSN_BNED, FR30BF_SFMT_BEQD }, - { FR30_INSN_BNE, FR30BF_INSN_BNE, FR30BF_SFMT_BEQD }, - { FR30_INSN_BCD, FR30BF_INSN_BCD, FR30BF_SFMT_BCD }, - { FR30_INSN_BC, FR30BF_INSN_BC, FR30BF_SFMT_BCD }, - { FR30_INSN_BNCD, FR30BF_INSN_BNCD, FR30BF_SFMT_BCD }, - { FR30_INSN_BNC, FR30BF_INSN_BNC, FR30BF_SFMT_BCD }, - { FR30_INSN_BND, FR30BF_INSN_BND, FR30BF_SFMT_BND }, - { FR30_INSN_BN, FR30BF_INSN_BN, FR30BF_SFMT_BND }, - { FR30_INSN_BPD, FR30BF_INSN_BPD, FR30BF_SFMT_BND }, - { FR30_INSN_BP, FR30BF_INSN_BP, FR30BF_SFMT_BND }, - { FR30_INSN_BVD, FR30BF_INSN_BVD, FR30BF_SFMT_BVD }, - { FR30_INSN_BV, FR30BF_INSN_BV, FR30BF_SFMT_BVD }, - { FR30_INSN_BNVD, FR30BF_INSN_BNVD, FR30BF_SFMT_BVD }, - { FR30_INSN_BNV, FR30BF_INSN_BNV, FR30BF_SFMT_BVD }, - { FR30_INSN_BLTD, FR30BF_INSN_BLTD, FR30BF_SFMT_BLTD }, - { FR30_INSN_BLT, FR30BF_INSN_BLT, FR30BF_SFMT_BLTD }, - { FR30_INSN_BGED, FR30BF_INSN_BGED, FR30BF_SFMT_BLTD }, - { FR30_INSN_BGE, FR30BF_INSN_BGE, FR30BF_SFMT_BLTD }, - { FR30_INSN_BLED, FR30BF_INSN_BLED, FR30BF_SFMT_BLED }, - { FR30_INSN_BLE, FR30BF_INSN_BLE, FR30BF_SFMT_BLED }, - { FR30_INSN_BGTD, FR30BF_INSN_BGTD, FR30BF_SFMT_BLED }, - { FR30_INSN_BGT, FR30BF_INSN_BGT, FR30BF_SFMT_BLED }, - { FR30_INSN_BLSD, FR30BF_INSN_BLSD, FR30BF_SFMT_BLSD }, - { FR30_INSN_BLS, FR30BF_INSN_BLS, FR30BF_SFMT_BLSD }, - { FR30_INSN_BHID, FR30BF_INSN_BHID, FR30BF_SFMT_BLSD }, - { FR30_INSN_BHI, FR30BF_INSN_BHI, FR30BF_SFMT_BLSD }, - { FR30_INSN_DMOVR13, FR30BF_INSN_DMOVR13, FR30BF_SFMT_DMOVR13 }, - { FR30_INSN_DMOVR13H, FR30BF_INSN_DMOVR13H, FR30BF_SFMT_DMOVR13H }, - { FR30_INSN_DMOVR13B, FR30BF_INSN_DMOVR13B, FR30BF_SFMT_DMOVR13B }, - { FR30_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PI, FR30BF_SFMT_DMOVR13PI }, - { FR30_INSN_DMOVR13PIH, FR30BF_INSN_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIH }, - { FR30_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR13PIB, FR30BF_SFMT_DMOVR13PIB }, - { FR30_INSN_DMOVR15PI, FR30BF_INSN_DMOVR15PI, FR30BF_SFMT_DMOVR15PI }, - { FR30_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13, FR30BF_SFMT_DMOV2R13 }, - { FR30_INSN_DMOV2R13H, FR30BF_INSN_DMOV2R13H, FR30BF_SFMT_DMOV2R13H }, - { FR30_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13B, FR30BF_SFMT_DMOV2R13B }, - { FR30_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PI }, - { FR30_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIH }, - { FR30_INSN_DMOV2R13PIB, FR30BF_INSN_DMOV2R13PIB, FR30BF_SFMT_DMOV2R13PIB }, - { FR30_INSN_DMOV2R15PD, FR30BF_INSN_DMOV2R15PD, FR30BF_SFMT_DMOV2R15PD }, - { FR30_INSN_LDRES, FR30BF_INSN_LDRES, FR30BF_SFMT_LDRES }, - { FR30_INSN_STRES, FR30BF_INSN_STRES, FR30BF_SFMT_LDRES }, - { FR30_INSN_COPOP, FR30BF_INSN_COPOP, FR30BF_SFMT_COPOP }, - { FR30_INSN_COPLD, FR30BF_INSN_COPLD, FR30BF_SFMT_COPOP }, - { FR30_INSN_COPST, FR30BF_INSN_COPST, FR30BF_SFMT_COPOP }, - { FR30_INSN_COPSV, FR30BF_INSN_COPSV, FR30BF_SFMT_COPOP }, - { FR30_INSN_NOP, FR30BF_INSN_NOP, FR30BF_SFMT_BNOD }, - { FR30_INSN_ANDCCR, FR30BF_INSN_ANDCCR, FR30BF_SFMT_ANDCCR }, - { FR30_INSN_ORCCR, FR30BF_INSN_ORCCR, FR30BF_SFMT_ANDCCR }, - { FR30_INSN_STILM, FR30BF_INSN_STILM, FR30BF_SFMT_STILM }, - { FR30_INSN_ADDSP, FR30BF_INSN_ADDSP, FR30BF_SFMT_ADDSP }, - { FR30_INSN_EXTSB, FR30BF_INSN_EXTSB, FR30BF_SFMT_EXTSB }, - { FR30_INSN_EXTUB, FR30BF_INSN_EXTUB, FR30BF_SFMT_EXTUB }, - { FR30_INSN_EXTSH, FR30BF_INSN_EXTSH, FR30BF_SFMT_EXTSH }, - { FR30_INSN_EXTUH, FR30BF_INSN_EXTUH, FR30BF_SFMT_EXTUH }, - { FR30_INSN_LDM0, FR30BF_INSN_LDM0, FR30BF_SFMT_LDM0 }, - { FR30_INSN_LDM1, FR30BF_INSN_LDM1, FR30BF_SFMT_LDM1 }, - { FR30_INSN_STM0, FR30BF_INSN_STM0, FR30BF_SFMT_STM0 }, - { FR30_INSN_STM1, FR30BF_INSN_STM1, FR30BF_SFMT_STM1 }, - { FR30_INSN_ENTER, FR30BF_INSN_ENTER, FR30BF_SFMT_ENTER }, - { FR30_INSN_LEAVE, FR30BF_INSN_LEAVE, FR30BF_SFMT_LEAVE }, - { FR30_INSN_XCHB, FR30BF_INSN_XCHB, FR30BF_SFMT_XCHB }, -}; - -static const struct insn_sem fr30bf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY -}; - -/* Initialize an IDESC from the compile-time computable parts. */ - -static INLINE void -init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) -{ - const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; - - id->num = t->index; - id->sfmt = t->sfmt; - if ((int) t->type <= 0) - id->idata = & cgen_virtual_insn_table[- (int) t->type]; - else - id->idata = & insn_table[t->type]; - id->attrs = CGEN_INSN_ATTRS (id->idata); - /* Oh my god, a magic number. */ - id->length = CGEN_INSN_BITSIZE (id->idata) / 8; - -#if WITH_PROFILE_MODEL_P - id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; - { - SIM_DESC sd = CPU_STATE (cpu); - SIM_ASSERT (t->index == id->timing->num); - } -#endif - - /* Semantic pointers are initialized elsewhere. */ -} - -/* Initialize the instruction descriptor table. */ - -void -fr30bf_init_idesc_table (SIM_CPU *cpu) -{ - IDESC *id,*tabend; - const struct insn_sem *t,*tend; - int tabsize = sizeof (fr30bf_insn_data) / sizeof (IDESC); - IDESC *table = fr30bf_insn_data; - - memset (table, 0, tabsize * sizeof (IDESC)); - - /* First set all entries to the `invalid insn'. */ - t = & fr30bf_insn_sem_invalid; - for (id = table, tabend = table + tabsize; id < tabend; ++id) - init_idesc (cpu, id, t); - - /* Now fill in the values for the chosen cpu. */ - for (t = fr30bf_insn_sem, tend = t + sizeof (fr30bf_insn_sem) / sizeof (*t); - t != tend; ++t) - { - init_idesc (cpu, & table[t->index], t); - } - - /* Link the IDESC table into the cpu. */ - CPU_IDESC (cpu) = table; -} - -/* Given an instruction, return a pointer to its IDESC entry. */ - -const IDESC * -fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, - ARGBUF *abuf) -{ - /* Result of decoder. */ - FR30BF_INSN_TYPE itype; - - { - CGEN_INSN_INT insn = base_insn; - - { - unsigned int val = (((insn >> 8) & (255 << 0))); - switch (val) - { - case 0 : itype = FR30BF_INSN_LDR13;goto extract_sfmt_ldr13; - case 1 : itype = FR30BF_INSN_LDR13UH;goto extract_sfmt_ldr13uh; - case 2 : itype = FR30BF_INSN_LDR13UB;goto extract_sfmt_ldr13ub; - case 3 : itype = FR30BF_INSN_LDR15;goto extract_sfmt_ldr15; - case 4 : itype = FR30BF_INSN_LD;goto extract_sfmt_ld; - case 5 : itype = FR30BF_INSN_LDUH;goto extract_sfmt_lduh; - case 6 : itype = FR30BF_INSN_LDUB;goto extract_sfmt_ldub; - case 7 : - { - unsigned int val = (((insn >> 6) & (1 << 1)) | ((insn >> 4) & (1 << 0))); - switch (val) - { - case 0 : itype = FR30BF_INSN_LDR15GR;goto extract_sfmt_ldr15gr; - case 1 : itype = FR30BF_INSN_MOV2PS;goto extract_sfmt_mov2ps; - case 2 : itype = FR30BF_INSN_LDR15DR;goto extract_sfmt_ldr15dr; - case 3 : itype = FR30BF_INSN_LDR15PS;goto extract_sfmt_ldr15ps; - default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 8 : itype = FR30BF_INSN_DMOV2R13;goto extract_sfmt_dmov2r13; - case 9 : itype = FR30BF_INSN_DMOV2R13H;goto extract_sfmt_dmov2r13h; - case 10 : itype = FR30BF_INSN_DMOV2R13B;goto extract_sfmt_dmov2r13b; - case 11 : itype = FR30BF_INSN_DMOV2R15PD;goto extract_sfmt_dmov2r15pd; - case 12 : itype = FR30BF_INSN_DMOV2R13PI;goto extract_sfmt_dmov2r13pi; - case 13 : itype = FR30BF_INSN_DMOV2R13PIH;goto extract_sfmt_dmov2r13pih; - case 14 : itype = FR30BF_INSN_DMOV2R13PIB;goto extract_sfmt_dmov2r13pib; - case 15 : itype = FR30BF_INSN_ENTER;goto extract_sfmt_enter; - case 16 : itype = FR30BF_INSN_STR13;goto extract_sfmt_str13; - case 17 : itype = FR30BF_INSN_STR13H;goto extract_sfmt_str13h; - case 18 : itype = FR30BF_INSN_STR13B;goto extract_sfmt_str13b; - case 19 : itype = FR30BF_INSN_STR15;goto extract_sfmt_str15; - case 20 : itype = FR30BF_INSN_ST;goto extract_sfmt_st; - case 21 : itype = FR30BF_INSN_STH;goto extract_sfmt_sth; - case 22 : itype = FR30BF_INSN_STB;goto extract_sfmt_stb; - case 23 : - { - unsigned int val = (((insn >> 6) & (1 << 1)) | ((insn >> 4) & (1 << 0))); - switch (val) - { - case 0 : itype = FR30BF_INSN_STR15GR;goto extract_sfmt_str15gr; - case 1 : itype = FR30BF_INSN_MOVPS;goto extract_sfmt_movps; - case 2 : itype = FR30BF_INSN_STR15DR;goto extract_sfmt_str15dr; - case 3 : itype = FR30BF_INSN_STR15PS;goto extract_sfmt_str15ps; - default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 24 : itype = FR30BF_INSN_DMOVR13;goto extract_sfmt_dmovr13; - case 25 : itype = FR30BF_INSN_DMOVR13H;goto extract_sfmt_dmovr13h; - case 26 : itype = FR30BF_INSN_DMOVR13B;goto extract_sfmt_dmovr13b; - case 27 : itype = FR30BF_INSN_DMOVR15PI;goto extract_sfmt_dmovr15pi; - case 28 : itype = FR30BF_INSN_DMOVR13PI;goto extract_sfmt_dmovr13pi; - case 29 : itype = FR30BF_INSN_DMOVR13PIH;goto extract_sfmt_dmovr13pih; - case 30 : itype = FR30BF_INSN_DMOVR13PIB;goto extract_sfmt_dmovr13pib; - case 31 : itype = FR30BF_INSN_INT;goto extract_sfmt_int; - case 32 : /* fall through */ - case 33 : /* fall through */ - case 34 : /* fall through */ - case 35 : /* fall through */ - case 36 : /* fall through */ - case 37 : /* fall through */ - case 38 : /* fall through */ - case 39 : /* fall through */ - case 40 : /* fall through */ - case 41 : /* fall through */ - case 42 : /* fall through */ - case 43 : /* fall through */ - case 44 : /* fall through */ - case 45 : /* fall through */ - case 46 : /* fall through */ - case 47 : itype = FR30BF_INSN_LDR14;goto extract_sfmt_ldr14; - case 48 : /* fall through */ - case 49 : /* fall through */ - case 50 : /* fall through */ - case 51 : /* fall through */ - case 52 : /* fall through */ - case 53 : /* fall through */ - case 54 : /* fall through */ - case 55 : /* fall through */ - case 56 : /* fall through */ - case 57 : /* fall through */ - case 58 : /* fall through */ - case 59 : /* fall through */ - case 60 : /* fall through */ - case 61 : /* fall through */ - case 62 : /* fall through */ - case 63 : itype = FR30BF_INSN_STR14;goto extract_sfmt_str14; - case 64 : /* fall through */ - case 65 : /* fall through */ - case 66 : /* fall through */ - case 67 : /* fall through */ - case 68 : /* fall through */ - case 69 : /* fall through */ - case 70 : /* fall through */ - case 71 : /* fall through */ - case 72 : /* fall through */ - case 73 : /* fall through */ - case 74 : /* fall through */ - case 75 : /* fall through */ - case 76 : /* fall through */ - case 77 : /* fall through */ - case 78 : /* fall through */ - case 79 : itype = FR30BF_INSN_LDR14UH;goto extract_sfmt_ldr14uh; - case 80 : /* fall through */ - case 81 : /* fall through */ - case 82 : /* fall through */ - case 83 : /* fall through */ - case 84 : /* fall through */ - case 85 : /* fall through */ - case 86 : /* fall through */ - case 87 : /* fall through */ - case 88 : /* fall through */ - case 89 : /* fall through */ - case 90 : /* fall through */ - case 91 : /* fall through */ - case 92 : /* fall through */ - case 93 : /* fall through */ - case 94 : /* fall through */ - case 95 : itype = FR30BF_INSN_STR14H;goto extract_sfmt_str14h; - case 96 : /* fall through */ - case 97 : /* fall through */ - case 98 : /* fall through */ - case 99 : /* fall through */ - case 100 : /* fall through */ - case 101 : /* fall through */ - case 102 : /* fall through */ - case 103 : /* fall through */ - case 104 : /* fall through */ - case 105 : /* fall through */ - case 106 : /* fall through */ - case 107 : /* fall through */ - case 108 : /* fall through */ - case 109 : /* fall through */ - case 110 : /* fall through */ - case 111 : itype = FR30BF_INSN_LDR14UB;goto extract_sfmt_ldr14ub; - case 112 : /* fall through */ - case 113 : /* fall through */ - case 114 : /* fall through */ - case 115 : /* fall through */ - case 116 : /* fall through */ - case 117 : /* fall through */ - case 118 : /* fall through */ - case 119 : /* fall through */ - case 120 : /* fall through */ - case 121 : /* fall through */ - case 122 : /* fall through */ - case 123 : /* fall through */ - case 124 : /* fall through */ - case 125 : /* fall through */ - case 126 : /* fall through */ - case 127 : itype = FR30BF_INSN_STR14B;goto extract_sfmt_str14b; - case 128 : itype = FR30BF_INSN_BANDL;goto extract_sfmt_bandl; - case 129 : itype = FR30BF_INSN_BANDH;goto extract_sfmt_bandl; - case 130 : itype = FR30BF_INSN_AND;goto extract_sfmt_and; - case 131 : itype = FR30BF_INSN_ANDCCR;goto extract_sfmt_andccr; - case 132 : itype = FR30BF_INSN_ANDM;goto extract_sfmt_andm; - case 133 : itype = FR30BF_INSN_ANDH;goto extract_sfmt_andh; - case 134 : itype = FR30BF_INSN_ANDB;goto extract_sfmt_andb; - case 135 : itype = FR30BF_INSN_STILM;goto extract_sfmt_stilm; - case 136 : itype = FR30BF_INSN_BTSTL;goto extract_sfmt_btstl; - case 137 : itype = FR30BF_INSN_BTSTH;goto extract_sfmt_btstl; - case 138 : itype = FR30BF_INSN_XCHB;goto extract_sfmt_xchb; - case 139 : itype = FR30BF_INSN_MOV;goto extract_sfmt_mov; - case 140 : itype = FR30BF_INSN_LDM0;goto extract_sfmt_ldm0; - case 141 : itype = FR30BF_INSN_LDM1;goto extract_sfmt_ldm1; - case 142 : itype = FR30BF_INSN_STM0;goto extract_sfmt_stm0; - case 143 : itype = FR30BF_INSN_STM1;goto extract_sfmt_stm1; - case 144 : itype = FR30BF_INSN_BORL;goto extract_sfmt_bandl; - case 145 : itype = FR30BF_INSN_BORH;goto extract_sfmt_bandl; - case 146 : itype = FR30BF_INSN_OR;goto extract_sfmt_and; - case 147 : itype = FR30BF_INSN_ORCCR;goto extract_sfmt_andccr; - case 148 : itype = FR30BF_INSN_ORM;goto extract_sfmt_andm; - case 149 : itype = FR30BF_INSN_ORH;goto extract_sfmt_andh; - case 150 : itype = FR30BF_INSN_ORB;goto extract_sfmt_andb; - case 151 : - { - unsigned int val = (((insn >> 4) & (15 << 0))); - switch (val) - { - case 0 : itype = FR30BF_INSN_JMP;goto extract_sfmt_jmp; - case 1 : itype = FR30BF_INSN_CALLR;goto extract_sfmt_callr; - case 2 : itype = FR30BF_INSN_RET;goto extract_sfmt_ret; - case 3 : itype = FR30BF_INSN_RETI;goto extract_sfmt_reti; - case 4 : itype = FR30BF_INSN_DIV0S;goto extract_sfmt_div0s; - case 5 : itype = FR30BF_INSN_DIV0U;goto extract_sfmt_div0u; - case 6 : itype = FR30BF_INSN_DIV1;goto extract_sfmt_div1; - case 7 : itype = FR30BF_INSN_DIV2;goto extract_sfmt_div2; - case 8 : itype = FR30BF_INSN_EXTSB;goto extract_sfmt_extsb; - case 9 : itype = FR30BF_INSN_EXTUB;goto extract_sfmt_extub; - case 10 : itype = FR30BF_INSN_EXTSH;goto extract_sfmt_extsh; - case 11 : itype = FR30BF_INSN_EXTUH;goto extract_sfmt_extuh; - default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 152 : itype = FR30BF_INSN_BEORL;goto extract_sfmt_bandl; - case 153 : itype = FR30BF_INSN_BEORH;goto extract_sfmt_bandl; - case 154 : itype = FR30BF_INSN_EOR;goto extract_sfmt_and; - case 155 : itype = FR30BF_INSN_LDI20;goto extract_sfmt_ldi20; - case 156 : itype = FR30BF_INSN_EORM;goto extract_sfmt_andm; - case 157 : itype = FR30BF_INSN_EORH;goto extract_sfmt_andh; - case 158 : itype = FR30BF_INSN_EORB;goto extract_sfmt_andb; - case 159 : - { - unsigned int val = (((insn >> 4) & (15 << 0))); - switch (val) - { - case 0 : itype = FR30BF_INSN_JMPD;goto extract_sfmt_jmp; - case 1 : itype = FR30BF_INSN_CALLRD;goto extract_sfmt_callr; - case 2 : itype = FR30BF_INSN_RET_D;goto extract_sfmt_ret; - case 3 : itype = FR30BF_INSN_INTE;goto extract_sfmt_inte; - case 6 : itype = FR30BF_INSN_DIV3;goto extract_sfmt_div3; - case 7 : itype = FR30BF_INSN_DIV4S;goto extract_sfmt_div4s; - case 8 : itype = FR30BF_INSN_LDI32;goto extract_sfmt_ldi32; - case 9 : itype = FR30BF_INSN_LEAVE;goto extract_sfmt_leave; - case 10 : itype = FR30BF_INSN_NOP;goto extract_sfmt_bnod; - case 12 : itype = FR30BF_INSN_COPOP;goto extract_sfmt_copop; - case 13 : itype = FR30BF_INSN_COPLD;goto extract_sfmt_copop; - case 14 : itype = FR30BF_INSN_COPST;goto extract_sfmt_copop; - case 15 : itype = FR30BF_INSN_COPSV;goto extract_sfmt_copop; - default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 160 : itype = FR30BF_INSN_ADDNI;goto extract_sfmt_addni; - case 161 : itype = FR30BF_INSN_ADDN2;goto extract_sfmt_addn2; - case 162 : itype = FR30BF_INSN_ADDN;goto extract_sfmt_addn; - case 163 : itype = FR30BF_INSN_ADDSP;goto extract_sfmt_addsp; - case 164 : itype = FR30BF_INSN_ADDI;goto extract_sfmt_addi; - case 165 : itype = FR30BF_INSN_ADD2;goto extract_sfmt_add2; - case 166 : itype = FR30BF_INSN_ADD;goto extract_sfmt_add; - case 167 : itype = FR30BF_INSN_ADDC;goto extract_sfmt_addc; - case 168 : itype = FR30BF_INSN_CMPI;goto extract_sfmt_cmpi; - case 169 : itype = FR30BF_INSN_CMP2;goto extract_sfmt_cmp2; - case 170 : itype = FR30BF_INSN_CMP;goto extract_sfmt_cmp; - case 171 : itype = FR30BF_INSN_MULU;goto extract_sfmt_mulu; - case 172 : itype = FR30BF_INSN_SUB;goto extract_sfmt_add; - case 173 : itype = FR30BF_INSN_SUBC;goto extract_sfmt_addc; - case 174 : itype = FR30BF_INSN_SUBN;goto extract_sfmt_addn; - case 175 : itype = FR30BF_INSN_MUL;goto extract_sfmt_mul; - case 176 : itype = FR30BF_INSN_LSRI;goto extract_sfmt_lsli; - case 177 : itype = FR30BF_INSN_LSR2;goto extract_sfmt_lsli; - case 178 : itype = FR30BF_INSN_LSR;goto extract_sfmt_lsl; - case 179 : itype = FR30BF_INSN_MOV2DR;goto extract_sfmt_mov2dr; - case 180 : itype = FR30BF_INSN_LSLI;goto extract_sfmt_lsli; - case 181 : itype = FR30BF_INSN_LSL2;goto extract_sfmt_lsli; - case 182 : itype = FR30BF_INSN_LSL;goto extract_sfmt_lsl; - case 183 : itype = FR30BF_INSN_MOVDR;goto extract_sfmt_movdr; - case 184 : itype = FR30BF_INSN_ASRI;goto extract_sfmt_lsli; - case 185 : itype = FR30BF_INSN_ASR2;goto extract_sfmt_lsli; - case 186 : itype = FR30BF_INSN_ASR;goto extract_sfmt_lsl; - case 187 : itype = FR30BF_INSN_MULUH;goto extract_sfmt_mulh; - case 188 : itype = FR30BF_INSN_LDRES;goto extract_sfmt_ldres; - case 189 : itype = FR30BF_INSN_STRES;goto extract_sfmt_ldres; - case 191 : itype = FR30BF_INSN_MULH;goto extract_sfmt_mulh; - case 192 : /* fall through */ - case 193 : /* fall through */ - case 194 : /* fall through */ - case 195 : /* fall through */ - case 196 : /* fall through */ - case 197 : /* fall through */ - case 198 : /* fall through */ - case 199 : /* fall through */ - case 200 : /* fall through */ - case 201 : /* fall through */ - case 202 : /* fall through */ - case 203 : /* fall through */ - case 204 : /* fall through */ - case 205 : /* fall through */ - case 206 : /* fall through */ - case 207 : itype = FR30BF_INSN_LDI8;goto extract_sfmt_ldi8; - case 208 : /* fall through */ - case 209 : /* fall through */ - case 210 : /* fall through */ - case 211 : /* fall through */ - case 212 : /* fall through */ - case 213 : /* fall through */ - case 214 : /* fall through */ - case 215 : itype = FR30BF_INSN_CALL;goto extract_sfmt_call; - case 216 : /* fall through */ - case 217 : /* fall through */ - case 218 : /* fall through */ - case 219 : /* fall through */ - case 220 : /* fall through */ - case 221 : /* fall through */ - case 222 : /* fall through */ - case 223 : itype = FR30BF_INSN_CALLD;goto extract_sfmt_call; - case 224 : itype = FR30BF_INSN_BRA;goto extract_sfmt_brad; - case 225 : itype = FR30BF_INSN_BNO;goto extract_sfmt_bnod; - case 226 : itype = FR30BF_INSN_BEQ;goto extract_sfmt_beqd; - case 227 : itype = FR30BF_INSN_BNE;goto extract_sfmt_beqd; - case 228 : itype = FR30BF_INSN_BC;goto extract_sfmt_bcd; - case 229 : itype = FR30BF_INSN_BNC;goto extract_sfmt_bcd; - case 230 : itype = FR30BF_INSN_BN;goto extract_sfmt_bnd; - case 231 : itype = FR30BF_INSN_BP;goto extract_sfmt_bnd; - case 232 : itype = FR30BF_INSN_BV;goto extract_sfmt_bvd; - case 233 : itype = FR30BF_INSN_BNV;goto extract_sfmt_bvd; - case 234 : itype = FR30BF_INSN_BLT;goto extract_sfmt_bltd; - case 235 : itype = FR30BF_INSN_BGE;goto extract_sfmt_bltd; - case 236 : itype = FR30BF_INSN_BLE;goto extract_sfmt_bled; - case 237 : itype = FR30BF_INSN_BGT;goto extract_sfmt_bled; - case 238 : itype = FR30BF_INSN_BLS;goto extract_sfmt_blsd; - case 239 : itype = FR30BF_INSN_BHI;goto extract_sfmt_blsd; - case 240 : itype = FR30BF_INSN_BRAD;goto extract_sfmt_brad; - case 241 : itype = FR30BF_INSN_BNOD;goto extract_sfmt_bnod; - case 242 : itype = FR30BF_INSN_BEQD;goto extract_sfmt_beqd; - case 243 : itype = FR30BF_INSN_BNED;goto extract_sfmt_beqd; - case 244 : itype = FR30BF_INSN_BCD;goto extract_sfmt_bcd; - case 245 : itype = FR30BF_INSN_BNCD;goto extract_sfmt_bcd; - case 246 : itype = FR30BF_INSN_BND;goto extract_sfmt_bnd; - case 247 : itype = FR30BF_INSN_BPD;goto extract_sfmt_bnd; - case 248 : itype = FR30BF_INSN_BVD;goto extract_sfmt_bvd; - case 249 : itype = FR30BF_INSN_BNVD;goto extract_sfmt_bvd; - case 250 : itype = FR30BF_INSN_BLTD;goto extract_sfmt_bltd; - case 251 : itype = FR30BF_INSN_BGED;goto extract_sfmt_bltd; - case 252 : itype = FR30BF_INSN_BLED;goto extract_sfmt_bled; - case 253 : itype = FR30BF_INSN_BGTD;goto extract_sfmt_bled; - case 254 : itype = FR30BF_INSN_BLSD;goto extract_sfmt_blsd; - case 255 : itype = FR30BF_INSN_BHID;goto extract_sfmt_blsd; - default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - } - - /* The instruction has been decoded, now extract the fields. */ - - extract_sfmt_empty: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_add: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addi: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_add2: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add2.f - SI f_m4; - UINT f_Ri; - - f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_m4) = f_m4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addc: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addc", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addn: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addni: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addni", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addn2: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add2.f - SI f_m4; - UINT f_Ri; - - f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_m4) = f_m4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmp: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpi: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmp2: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add2.f - SI f_m4; - UINT f_Ri; - - f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_m4) = f_m4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_and: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_andm: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andm", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_andh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andh", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_andb: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andb", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bandl: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bandl", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_btstl: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btstl", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mul: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mul", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mulu: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulu", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mulh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulh", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_div0s: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0s", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_div0u: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0u", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_div1: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div1", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_div2: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div2", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_div3: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div3", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_div4s: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div4s", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_lsl: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsl", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lsli: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsli", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldi8: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldi8.f - UINT f_i8; - UINT f_Ri; - - f_i8 = EXTRACT_MSB0_UINT (insn, 16, 4, 8); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_i8) = f_i8; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_i8 0x%x", 'x', f_i8, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldi20: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldi20.f - UINT f_i20_16; - UINT f_i20_4; - UINT f_Ri; - UINT f_i20; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUHI (current_cpu, pc + 2); - f_i20_16 = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 0)); - f_i20_4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); -{ - f_i20 = ((((f_i20_4) << (16))) | (f_i20_16)); -} - - /* Record the fields for the semantic handler. */ - FLD (f_i20) = f_i20; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi20", "f_i20 0x%x", 'x', f_i20, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldi32: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldi32.f - UINT f_i32; - UINT f_Ri; - /* Contents of trailing part of insn. */ - UINT word_1; - UINT word_2; - - word_1 = GETIMEMUHI (current_cpu, pc + 2); - word_2 = GETIMEMUHI (current_cpu, pc + 4); - f_i32 = (0|(EXTRACT_MSB0_UINT (word_2, 16, 0, 16) << 0)|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 16)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_i32) = f_i32; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi32", "f_i32 0x%x", 'x', f_i32, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rj) = f_Rj; - FLD (f_Ri) = f_Ri; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lduh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rj) = f_Rj; - FLD (f_Ri) = f_Ri; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lduh", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldub: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rj) = f_Rj; - FLD (f_Ri) = f_Ri; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldub", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr13: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rj) = f_Rj; - FLD (f_Ri) = f_Ri; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr13", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rj) = f_Rj; - FLD (in_h_gr_SI_13) = 13; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr13uh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rj) = f_Rj; - FLD (f_Ri) = f_Ri; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr13uh", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rj) = f_Rj; - FLD (in_h_gr_SI_13) = 13; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr13ub: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rj) = f_Rj; - FLD (f_Ri) = f_Ri; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr13ub", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rj) = f_Rj; - FLD (in_h_gr_SI_13) = 13; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr14: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr14.f - SI f_disp10; - UINT f_Ri; - - f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10) = f_disp10; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14", "f_disp10 0x%x", 'x', f_disp10, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_14) = 14; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr14uh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr14uh.f - SI f_disp9; - UINT f_Ri; - - f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_disp9) = f_disp9; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14uh", "f_disp9 0x%x", 'x', f_disp9, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_14) = 14; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr14ub: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr14ub.f - INT f_disp8; - UINT f_Ri; - - f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_disp8) = f_disp8; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14ub", "f_disp8 0x%x", 'x', f_disp8, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_14) = 14; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr15: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr15.f - USI f_udisp6; - UINT f_Ri; - - f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_udisp6) = f_udisp6; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15", "f_udisp6 0x%x", 'x', f_udisp6, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr15gr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr15gr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_Ri) = f_Ri; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr15dr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - UINT f_Rs2; - - f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rs2) = f_Rs2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr15ps: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addsp.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15ps", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_sth: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stb: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str13: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str13", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (in_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str13h: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str13h", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (in_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str13b: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str13b", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (in_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str14: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str14.f - SI f_disp10; - UINT f_Ri; - - f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_disp10) = f_disp10; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14", "f_Ri 0x%x", 'x', f_Ri, "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str14h: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str14h.f - SI f_disp9; - UINT f_Ri; - - f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_disp9) = f_disp9; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14h", "f_Ri 0x%x", 'x', f_Ri, "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str14b: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str14b.f - INT f_disp8; - UINT f_Ri; - - f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_disp8) = f_disp8; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14b", "f_Ri 0x%x", 'x', f_Ri, "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str15: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str15.f - USI f_udisp6; - UINT f_Ri; - - f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_udisp6) = f_udisp6; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15", "f_Ri 0x%x", 'x', f_Ri, "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str15gr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_str15gr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str15dr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - UINT f_Rs2; - - f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rs2) = f_Rs2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str15ps: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addsp.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15ps", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mov: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldr13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rj) = f_Rj; - FLD (f_Ri) = f_Ri; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_movdr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_movdr.f - UINT f_Rs1; - UINT f_Ri; - - f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rs1) = f_Rs1; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movdr", "f_Rs1 0x%x", 'x', f_Rs1, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_movps: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_movdr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movps", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mov2dr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Rs1; - UINT f_Ri; - - f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rs1) = f_Rs1; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2dr", "f_Ri 0x%x", 'x', f_Ri, "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mov2ps: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2ps", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_jmp: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_callr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_call: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_call.f - SI f_rel12; - - f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label12) = f_rel12; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_call", "label12 0x%x", 'x', f_rel12, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ret: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_int: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_int.f - UINT f_u8; - - f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_u8) = f_u8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_int", "f_u8 0x%x", 'x', f_u8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_inte: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_inte", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_reti: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_reti", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_brad: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_brad", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bnod: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnod", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_beqd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bcd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bnd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bvd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bvd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bltd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bltd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bled: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bled", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_blsd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_blsd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13h: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - USI f_dir9; - - f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13b: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - UINT f_dir8; - - f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13pi: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_13) = 13; - FLD (out_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13pih: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - USI f_dir9; - - f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_13) = 13; - FLD (out_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13pib: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - UINT f_dir8; - - f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_13) = 13; - FLD (out_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr15pi: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr15pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13h: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - USI f_dir9; - - f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13b: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - UINT f_dir8; - - f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13pi: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_13) = 13; - FLD (out_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13pih: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - USI f_dir9; - - f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_13) = 13; - FLD (out_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13pib: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - UINT f_dir8; - - f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_13) = 13; - FLD (out_h_gr_SI_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r15pd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r15pd", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldres: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add2.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldres", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_copop: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUHI (current_cpu, pc + 2); - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_copop", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_andccr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_int.f - UINT f_u8; - - f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_u8) = f_u8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andccr", "f_u8 0x%x", 'x', f_u8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stilm: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_int.f - UINT f_u8; - - f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_u8) = f_u8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stilm", "f_u8 0x%x", 'x', f_u8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_addsp: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_addsp.f - SI f_s10; - - f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_s10) = f_s10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addsp", "f_s10 0x%x", 'x', f_s10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_extsb: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add2.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsb", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_extub: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add2.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extub", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_extsh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add2.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsh", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_extuh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add2.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extuh", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldm0: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldm0.f - UINT f_reglist_low_ld; - - f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_reglist_low_ld) = f_reglist_low_ld; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm0", "f_reglist_low_ld 0x%x", 'x', f_reglist_low_ld, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_0) = 0; - FLD (out_h_gr_SI_1) = 1; - FLD (out_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_2) = 2; - FLD (out_h_gr_SI_3) = 3; - FLD (out_h_gr_SI_4) = 4; - FLD (out_h_gr_SI_5) = 5; - FLD (out_h_gr_SI_6) = 6; - FLD (out_h_gr_SI_7) = 7; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldm1: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_ldm1.f - UINT f_reglist_hi_ld; - - f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_reglist_hi_ld) = f_reglist_hi_ld; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm1", "f_reglist_hi_ld 0x%x", 'x', f_reglist_hi_ld, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_10) = 10; - FLD (out_h_gr_SI_11) = 11; - FLD (out_h_gr_SI_12) = 12; - FLD (out_h_gr_SI_13) = 13; - FLD (out_h_gr_SI_14) = 14; - FLD (out_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_8) = 8; - FLD (out_h_gr_SI_9) = 9; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stm0: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stm0.f - UINT f_reglist_low_st; - - f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_reglist_low_st) = f_reglist_low_st; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm0", "f_reglist_low_st 0x%x", 'x', f_reglist_low_st, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_0) = 0; - FLD (in_h_gr_SI_1) = 1; - FLD (in_h_gr_SI_15) = 15; - FLD (in_h_gr_SI_2) = 2; - FLD (in_h_gr_SI_3) = 3; - FLD (in_h_gr_SI_4) = 4; - FLD (in_h_gr_SI_5) = 5; - FLD (in_h_gr_SI_6) = 6; - FLD (in_h_gr_SI_7) = 7; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stm1: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_stm1.f - UINT f_reglist_hi_st; - - f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_reglist_hi_st) = f_reglist_hi_st; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm1", "f_reglist_hi_st 0x%x", 'x', f_reglist_hi_st, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_10) = 10; - FLD (in_h_gr_SI_11) = 11; - FLD (in_h_gr_SI_12) = 12; - FLD (in_h_gr_SI_13) = 13; - FLD (in_h_gr_SI_14) = 14; - FLD (in_h_gr_SI_15) = 15; - FLD (in_h_gr_SI_8) = 8; - FLD (in_h_gr_SI_9) = 9; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_enter: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_enter.f - USI f_u10; - - f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_u10) = f_u10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_enter", "f_u10 0x%x", 'x', f_u10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_14) = 14; - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_14) = 14; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_leave: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_enter.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_leave", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_SI_14) = 14; - FLD (in_h_gr_SI_15) = 15; - FLD (out_h_gr_SI_14) = 14; - FLD (out_h_gr_SI_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_xchb: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; - CGEN_INSN_INT insn = base_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_xchb", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - -} +// OBSOLETE /* Simulator instruction decoder for fr30bf. +// OBSOLETE +// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN. +// OBSOLETE +// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// OBSOLETE +// OBSOLETE */ +// OBSOLETE +// OBSOLETE #define WANT_CPU fr30bf +// OBSOLETE #define WANT_CPU_FR30BF +// OBSOLETE +// OBSOLETE #include "sim-main.h" +// OBSOLETE #include "sim-assert.h" +// OBSOLETE +// OBSOLETE /* The instruction descriptor array. +// OBSOLETE This is computed at runtime. Space for it is not malloc'd to save a +// OBSOLETE teensy bit of cpu in the decoder. Moving it to malloc space is trivial +// OBSOLETE but won't be done until necessary (we don't currently support the runtime +// OBSOLETE addition of instructions nor an SMP machine with different cpus). */ +// OBSOLETE static IDESC fr30bf_insn_data[FR30BF_INSN_XCHB + 1]; +// OBSOLETE +// OBSOLETE /* Commas between elements are contained in the macros. +// OBSOLETE Some of these are conditionally compiled out. */ +// OBSOLETE +// OBSOLETE static const struct insn_sem fr30bf_insn_sem[] = +// OBSOLETE { +// OBSOLETE { VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY }, +// OBSOLETE { VIRTUAL_INSN_X_AFTER, FR30BF_INSN_X_AFTER, FR30BF_SFMT_EMPTY }, +// OBSOLETE { VIRTUAL_INSN_X_BEFORE, FR30BF_INSN_X_BEFORE, FR30BF_SFMT_EMPTY }, +// OBSOLETE { VIRTUAL_INSN_X_CTI_CHAIN, FR30BF_INSN_X_CTI_CHAIN, FR30BF_SFMT_EMPTY }, +// OBSOLETE { VIRTUAL_INSN_X_CHAIN, FR30BF_INSN_X_CHAIN, FR30BF_SFMT_EMPTY }, +// OBSOLETE { VIRTUAL_INSN_X_BEGIN, FR30BF_INSN_X_BEGIN, FR30BF_SFMT_EMPTY }, +// OBSOLETE { FR30_INSN_ADD, FR30BF_INSN_ADD, FR30BF_SFMT_ADD }, +// OBSOLETE { FR30_INSN_ADDI, FR30BF_INSN_ADDI, FR30BF_SFMT_ADDI }, +// OBSOLETE { FR30_INSN_ADD2, FR30BF_INSN_ADD2, FR30BF_SFMT_ADD2 }, +// OBSOLETE { FR30_INSN_ADDC, FR30BF_INSN_ADDC, FR30BF_SFMT_ADDC }, +// OBSOLETE { FR30_INSN_ADDN, FR30BF_INSN_ADDN, FR30BF_SFMT_ADDN }, +// OBSOLETE { FR30_INSN_ADDNI, FR30BF_INSN_ADDNI, FR30BF_SFMT_ADDNI }, +// OBSOLETE { FR30_INSN_ADDN2, FR30BF_INSN_ADDN2, FR30BF_SFMT_ADDN2 }, +// OBSOLETE { FR30_INSN_SUB, FR30BF_INSN_SUB, FR30BF_SFMT_ADD }, +// OBSOLETE { FR30_INSN_SUBC, FR30BF_INSN_SUBC, FR30BF_SFMT_ADDC }, +// OBSOLETE { FR30_INSN_SUBN, FR30BF_INSN_SUBN, FR30BF_SFMT_ADDN }, +// OBSOLETE { FR30_INSN_CMP, FR30BF_INSN_CMP, FR30BF_SFMT_CMP }, +// OBSOLETE { FR30_INSN_CMPI, FR30BF_INSN_CMPI, FR30BF_SFMT_CMPI }, +// OBSOLETE { FR30_INSN_CMP2, FR30BF_INSN_CMP2, FR30BF_SFMT_CMP2 }, +// OBSOLETE { FR30_INSN_AND, FR30BF_INSN_AND, FR30BF_SFMT_AND }, +// OBSOLETE { FR30_INSN_OR, FR30BF_INSN_OR, FR30BF_SFMT_AND }, +// OBSOLETE { FR30_INSN_EOR, FR30BF_INSN_EOR, FR30BF_SFMT_AND }, +// OBSOLETE { FR30_INSN_ANDM, FR30BF_INSN_ANDM, FR30BF_SFMT_ANDM }, +// OBSOLETE { FR30_INSN_ANDH, FR30BF_INSN_ANDH, FR30BF_SFMT_ANDH }, +// OBSOLETE { FR30_INSN_ANDB, FR30BF_INSN_ANDB, FR30BF_SFMT_ANDB }, +// OBSOLETE { FR30_INSN_ORM, FR30BF_INSN_ORM, FR30BF_SFMT_ANDM }, +// OBSOLETE { FR30_INSN_ORH, FR30BF_INSN_ORH, FR30BF_SFMT_ANDH }, +// OBSOLETE { FR30_INSN_ORB, FR30BF_INSN_ORB, FR30BF_SFMT_ANDB }, +// OBSOLETE { FR30_INSN_EORM, FR30BF_INSN_EORM, FR30BF_SFMT_ANDM }, +// OBSOLETE { FR30_INSN_EORH, FR30BF_INSN_EORH, FR30BF_SFMT_ANDH }, +// OBSOLETE { FR30_INSN_EORB, FR30BF_INSN_EORB, FR30BF_SFMT_ANDB }, +// OBSOLETE { FR30_INSN_BANDL, FR30BF_INSN_BANDL, FR30BF_SFMT_BANDL }, +// OBSOLETE { FR30_INSN_BORL, FR30BF_INSN_BORL, FR30BF_SFMT_BANDL }, +// OBSOLETE { FR30_INSN_BEORL, FR30BF_INSN_BEORL, FR30BF_SFMT_BANDL }, +// OBSOLETE { FR30_INSN_BANDH, FR30BF_INSN_BANDH, FR30BF_SFMT_BANDL }, +// OBSOLETE { FR30_INSN_BORH, FR30BF_INSN_BORH, FR30BF_SFMT_BANDL }, +// OBSOLETE { FR30_INSN_BEORH, FR30BF_INSN_BEORH, FR30BF_SFMT_BANDL }, +// OBSOLETE { FR30_INSN_BTSTL, FR30BF_INSN_BTSTL, FR30BF_SFMT_BTSTL }, +// OBSOLETE { FR30_INSN_BTSTH, FR30BF_INSN_BTSTH, FR30BF_SFMT_BTSTL }, +// OBSOLETE { FR30_INSN_MUL, FR30BF_INSN_MUL, FR30BF_SFMT_MUL }, +// OBSOLETE { FR30_INSN_MULU, FR30BF_INSN_MULU, FR30BF_SFMT_MULU }, +// OBSOLETE { FR30_INSN_MULH, FR30BF_INSN_MULH, FR30BF_SFMT_MULH }, +// OBSOLETE { FR30_INSN_MULUH, FR30BF_INSN_MULUH, FR30BF_SFMT_MULH }, +// OBSOLETE { FR30_INSN_DIV0S, FR30BF_INSN_DIV0S, FR30BF_SFMT_DIV0S }, +// OBSOLETE { FR30_INSN_DIV0U, FR30BF_INSN_DIV0U, FR30BF_SFMT_DIV0U }, +// OBSOLETE { FR30_INSN_DIV1, FR30BF_INSN_DIV1, FR30BF_SFMT_DIV1 }, +// OBSOLETE { FR30_INSN_DIV2, FR30BF_INSN_DIV2, FR30BF_SFMT_DIV2 }, +// OBSOLETE { FR30_INSN_DIV3, FR30BF_INSN_DIV3, FR30BF_SFMT_DIV3 }, +// OBSOLETE { FR30_INSN_DIV4S, FR30BF_INSN_DIV4S, FR30BF_SFMT_DIV4S }, +// OBSOLETE { FR30_INSN_LSL, FR30BF_INSN_LSL, FR30BF_SFMT_LSL }, +// OBSOLETE { FR30_INSN_LSLI, FR30BF_INSN_LSLI, FR30BF_SFMT_LSLI }, +// OBSOLETE { FR30_INSN_LSL2, FR30BF_INSN_LSL2, FR30BF_SFMT_LSLI }, +// OBSOLETE { FR30_INSN_LSR, FR30BF_INSN_LSR, FR30BF_SFMT_LSL }, +// OBSOLETE { FR30_INSN_LSRI, FR30BF_INSN_LSRI, FR30BF_SFMT_LSLI }, +// OBSOLETE { FR30_INSN_LSR2, FR30BF_INSN_LSR2, FR30BF_SFMT_LSLI }, +// OBSOLETE { FR30_INSN_ASR, FR30BF_INSN_ASR, FR30BF_SFMT_LSL }, +// OBSOLETE { FR30_INSN_ASRI, FR30BF_INSN_ASRI, FR30BF_SFMT_LSLI }, +// OBSOLETE { FR30_INSN_ASR2, FR30BF_INSN_ASR2, FR30BF_SFMT_LSLI }, +// OBSOLETE { FR30_INSN_LDI8, FR30BF_INSN_LDI8, FR30BF_SFMT_LDI8 }, +// OBSOLETE { FR30_INSN_LDI20, FR30BF_INSN_LDI20, FR30BF_SFMT_LDI20 }, +// OBSOLETE { FR30_INSN_LDI32, FR30BF_INSN_LDI32, FR30BF_SFMT_LDI32 }, +// OBSOLETE { FR30_INSN_LD, FR30BF_INSN_LD, FR30BF_SFMT_LD }, +// OBSOLETE { FR30_INSN_LDUH, FR30BF_INSN_LDUH, FR30BF_SFMT_LDUH }, +// OBSOLETE { FR30_INSN_LDUB, FR30BF_INSN_LDUB, FR30BF_SFMT_LDUB }, +// OBSOLETE { FR30_INSN_LDR13, FR30BF_INSN_LDR13, FR30BF_SFMT_LDR13 }, +// OBSOLETE { FR30_INSN_LDR13UH, FR30BF_INSN_LDR13UH, FR30BF_SFMT_LDR13UH }, +// OBSOLETE { FR30_INSN_LDR13UB, FR30BF_INSN_LDR13UB, FR30BF_SFMT_LDR13UB }, +// OBSOLETE { FR30_INSN_LDR14, FR30BF_INSN_LDR14, FR30BF_SFMT_LDR14 }, +// OBSOLETE { FR30_INSN_LDR14UH, FR30BF_INSN_LDR14UH, FR30BF_SFMT_LDR14UH }, +// OBSOLETE { FR30_INSN_LDR14UB, FR30BF_INSN_LDR14UB, FR30BF_SFMT_LDR14UB }, +// OBSOLETE { FR30_INSN_LDR15, FR30BF_INSN_LDR15, FR30BF_SFMT_LDR15 }, +// OBSOLETE { FR30_INSN_LDR15GR, FR30BF_INSN_LDR15GR, FR30BF_SFMT_LDR15GR }, +// OBSOLETE { FR30_INSN_LDR15DR, FR30BF_INSN_LDR15DR, FR30BF_SFMT_LDR15DR }, +// OBSOLETE { FR30_INSN_LDR15PS, FR30BF_INSN_LDR15PS, FR30BF_SFMT_LDR15PS }, +// OBSOLETE { FR30_INSN_ST, FR30BF_INSN_ST, FR30BF_SFMT_ST }, +// OBSOLETE { FR30_INSN_STH, FR30BF_INSN_STH, FR30BF_SFMT_STH }, +// OBSOLETE { FR30_INSN_STB, FR30BF_INSN_STB, FR30BF_SFMT_STB }, +// OBSOLETE { FR30_INSN_STR13, FR30BF_INSN_STR13, FR30BF_SFMT_STR13 }, +// OBSOLETE { FR30_INSN_STR13H, FR30BF_INSN_STR13H, FR30BF_SFMT_STR13H }, +// OBSOLETE { FR30_INSN_STR13B, FR30BF_INSN_STR13B, FR30BF_SFMT_STR13B }, +// OBSOLETE { FR30_INSN_STR14, FR30BF_INSN_STR14, FR30BF_SFMT_STR14 }, +// OBSOLETE { FR30_INSN_STR14H, FR30BF_INSN_STR14H, FR30BF_SFMT_STR14H }, +// OBSOLETE { FR30_INSN_STR14B, FR30BF_INSN_STR14B, FR30BF_SFMT_STR14B }, +// OBSOLETE { FR30_INSN_STR15, FR30BF_INSN_STR15, FR30BF_SFMT_STR15 }, +// OBSOLETE { FR30_INSN_STR15GR, FR30BF_INSN_STR15GR, FR30BF_SFMT_STR15GR }, +// OBSOLETE { FR30_INSN_STR15DR, FR30BF_INSN_STR15DR, FR30BF_SFMT_STR15DR }, +// OBSOLETE { FR30_INSN_STR15PS, FR30BF_INSN_STR15PS, FR30BF_SFMT_STR15PS }, +// OBSOLETE { FR30_INSN_MOV, FR30BF_INSN_MOV, FR30BF_SFMT_MOV }, +// OBSOLETE { FR30_INSN_MOVDR, FR30BF_INSN_MOVDR, FR30BF_SFMT_MOVDR }, +// OBSOLETE { FR30_INSN_MOVPS, FR30BF_INSN_MOVPS, FR30BF_SFMT_MOVPS }, +// OBSOLETE { FR30_INSN_MOV2DR, FR30BF_INSN_MOV2DR, FR30BF_SFMT_MOV2DR }, +// OBSOLETE { FR30_INSN_MOV2PS, FR30BF_INSN_MOV2PS, FR30BF_SFMT_MOV2PS }, +// OBSOLETE { FR30_INSN_JMP, FR30BF_INSN_JMP, FR30BF_SFMT_JMP }, +// OBSOLETE { FR30_INSN_JMPD, FR30BF_INSN_JMPD, FR30BF_SFMT_JMP }, +// OBSOLETE { FR30_INSN_CALLR, FR30BF_INSN_CALLR, FR30BF_SFMT_CALLR }, +// OBSOLETE { FR30_INSN_CALLRD, FR30BF_INSN_CALLRD, FR30BF_SFMT_CALLR }, +// OBSOLETE { FR30_INSN_CALL, FR30BF_INSN_CALL, FR30BF_SFMT_CALL }, +// OBSOLETE { FR30_INSN_CALLD, FR30BF_INSN_CALLD, FR30BF_SFMT_CALL }, +// OBSOLETE { FR30_INSN_RET, FR30BF_INSN_RET, FR30BF_SFMT_RET }, +// OBSOLETE { FR30_INSN_RET_D, FR30BF_INSN_RET_D, FR30BF_SFMT_RET }, +// OBSOLETE { FR30_INSN_INT, FR30BF_INSN_INT, FR30BF_SFMT_INT }, +// OBSOLETE { FR30_INSN_INTE, FR30BF_INSN_INTE, FR30BF_SFMT_INTE }, +// OBSOLETE { FR30_INSN_RETI, FR30BF_INSN_RETI, FR30BF_SFMT_RETI }, +// OBSOLETE { FR30_INSN_BRAD, FR30BF_INSN_BRAD, FR30BF_SFMT_BRAD }, +// OBSOLETE { FR30_INSN_BRA, FR30BF_INSN_BRA, FR30BF_SFMT_BRAD }, +// OBSOLETE { FR30_INSN_BNOD, FR30BF_INSN_BNOD, FR30BF_SFMT_BNOD }, +// OBSOLETE { FR30_INSN_BNO, FR30BF_INSN_BNO, FR30BF_SFMT_BNOD }, +// OBSOLETE { FR30_INSN_BEQD, FR30BF_INSN_BEQD, FR30BF_SFMT_BEQD }, +// OBSOLETE { FR30_INSN_BEQ, FR30BF_INSN_BEQ, FR30BF_SFMT_BEQD }, +// OBSOLETE { FR30_INSN_BNED, FR30BF_INSN_BNED, FR30BF_SFMT_BEQD }, +// OBSOLETE { FR30_INSN_BNE, FR30BF_INSN_BNE, FR30BF_SFMT_BEQD }, +// OBSOLETE { FR30_INSN_BCD, FR30BF_INSN_BCD, FR30BF_SFMT_BCD }, +// OBSOLETE { FR30_INSN_BC, FR30BF_INSN_BC, FR30BF_SFMT_BCD }, +// OBSOLETE { FR30_INSN_BNCD, FR30BF_INSN_BNCD, FR30BF_SFMT_BCD }, +// OBSOLETE { FR30_INSN_BNC, FR30BF_INSN_BNC, FR30BF_SFMT_BCD }, +// OBSOLETE { FR30_INSN_BND, FR30BF_INSN_BND, FR30BF_SFMT_BND }, +// OBSOLETE { FR30_INSN_BN, FR30BF_INSN_BN, FR30BF_SFMT_BND }, +// OBSOLETE { FR30_INSN_BPD, FR30BF_INSN_BPD, FR30BF_SFMT_BND }, +// OBSOLETE { FR30_INSN_BP, FR30BF_INSN_BP, FR30BF_SFMT_BND }, +// OBSOLETE { FR30_INSN_BVD, FR30BF_INSN_BVD, FR30BF_SFMT_BVD }, +// OBSOLETE { FR30_INSN_BV, FR30BF_INSN_BV, FR30BF_SFMT_BVD }, +// OBSOLETE { FR30_INSN_BNVD, FR30BF_INSN_BNVD, FR30BF_SFMT_BVD }, +// OBSOLETE { FR30_INSN_BNV, FR30BF_INSN_BNV, FR30BF_SFMT_BVD }, +// OBSOLETE { FR30_INSN_BLTD, FR30BF_INSN_BLTD, FR30BF_SFMT_BLTD }, +// OBSOLETE { FR30_INSN_BLT, FR30BF_INSN_BLT, FR30BF_SFMT_BLTD }, +// OBSOLETE { FR30_INSN_BGED, FR30BF_INSN_BGED, FR30BF_SFMT_BLTD }, +// OBSOLETE { FR30_INSN_BGE, FR30BF_INSN_BGE, FR30BF_SFMT_BLTD }, +// OBSOLETE { FR30_INSN_BLED, FR30BF_INSN_BLED, FR30BF_SFMT_BLED }, +// OBSOLETE { FR30_INSN_BLE, FR30BF_INSN_BLE, FR30BF_SFMT_BLED }, +// OBSOLETE { FR30_INSN_BGTD, FR30BF_INSN_BGTD, FR30BF_SFMT_BLED }, +// OBSOLETE { FR30_INSN_BGT, FR30BF_INSN_BGT, FR30BF_SFMT_BLED }, +// OBSOLETE { FR30_INSN_BLSD, FR30BF_INSN_BLSD, FR30BF_SFMT_BLSD }, +// OBSOLETE { FR30_INSN_BLS, FR30BF_INSN_BLS, FR30BF_SFMT_BLSD }, +// OBSOLETE { FR30_INSN_BHID, FR30BF_INSN_BHID, FR30BF_SFMT_BLSD }, +// OBSOLETE { FR30_INSN_BHI, FR30BF_INSN_BHI, FR30BF_SFMT_BLSD }, +// OBSOLETE { FR30_INSN_DMOVR13, FR30BF_INSN_DMOVR13, FR30BF_SFMT_DMOVR13 }, +// OBSOLETE { FR30_INSN_DMOVR13H, FR30BF_INSN_DMOVR13H, FR30BF_SFMT_DMOVR13H }, +// OBSOLETE { FR30_INSN_DMOVR13B, FR30BF_INSN_DMOVR13B, FR30BF_SFMT_DMOVR13B }, +// OBSOLETE { FR30_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PI, FR30BF_SFMT_DMOVR13PI }, +// OBSOLETE { FR30_INSN_DMOVR13PIH, FR30BF_INSN_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIH }, +// OBSOLETE { FR30_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR13PIB, FR30BF_SFMT_DMOVR13PIB }, +// OBSOLETE { FR30_INSN_DMOVR15PI, FR30BF_INSN_DMOVR15PI, FR30BF_SFMT_DMOVR15PI }, +// OBSOLETE { FR30_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13, FR30BF_SFMT_DMOV2R13 }, +// OBSOLETE { FR30_INSN_DMOV2R13H, FR30BF_INSN_DMOV2R13H, FR30BF_SFMT_DMOV2R13H }, +// OBSOLETE { FR30_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13B, FR30BF_SFMT_DMOV2R13B }, +// OBSOLETE { FR30_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PI }, +// OBSOLETE { FR30_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIH }, +// OBSOLETE { FR30_INSN_DMOV2R13PIB, FR30BF_INSN_DMOV2R13PIB, FR30BF_SFMT_DMOV2R13PIB }, +// OBSOLETE { FR30_INSN_DMOV2R15PD, FR30BF_INSN_DMOV2R15PD, FR30BF_SFMT_DMOV2R15PD }, +// OBSOLETE { FR30_INSN_LDRES, FR30BF_INSN_LDRES, FR30BF_SFMT_LDRES }, +// OBSOLETE { FR30_INSN_STRES, FR30BF_INSN_STRES, FR30BF_SFMT_LDRES }, +// OBSOLETE { FR30_INSN_COPOP, FR30BF_INSN_COPOP, FR30BF_SFMT_COPOP }, +// OBSOLETE { FR30_INSN_COPLD, FR30BF_INSN_COPLD, FR30BF_SFMT_COPOP }, +// OBSOLETE { FR30_INSN_COPST, FR30BF_INSN_COPST, FR30BF_SFMT_COPOP }, +// OBSOLETE { FR30_INSN_COPSV, FR30BF_INSN_COPSV, FR30BF_SFMT_COPOP }, +// OBSOLETE { FR30_INSN_NOP, FR30BF_INSN_NOP, FR30BF_SFMT_BNOD }, +// OBSOLETE { FR30_INSN_ANDCCR, FR30BF_INSN_ANDCCR, FR30BF_SFMT_ANDCCR }, +// OBSOLETE { FR30_INSN_ORCCR, FR30BF_INSN_ORCCR, FR30BF_SFMT_ANDCCR }, +// OBSOLETE { FR30_INSN_STILM, FR30BF_INSN_STILM, FR30BF_SFMT_STILM }, +// OBSOLETE { FR30_INSN_ADDSP, FR30BF_INSN_ADDSP, FR30BF_SFMT_ADDSP }, +// OBSOLETE { FR30_INSN_EXTSB, FR30BF_INSN_EXTSB, FR30BF_SFMT_EXTSB }, +// OBSOLETE { FR30_INSN_EXTUB, FR30BF_INSN_EXTUB, FR30BF_SFMT_EXTUB }, +// OBSOLETE { FR30_INSN_EXTSH, FR30BF_INSN_EXTSH, FR30BF_SFMT_EXTSH }, +// OBSOLETE { FR30_INSN_EXTUH, FR30BF_INSN_EXTUH, FR30BF_SFMT_EXTUH }, +// OBSOLETE { FR30_INSN_LDM0, FR30BF_INSN_LDM0, FR30BF_SFMT_LDM0 }, +// OBSOLETE { FR30_INSN_LDM1, FR30BF_INSN_LDM1, FR30BF_SFMT_LDM1 }, +// OBSOLETE { FR30_INSN_STM0, FR30BF_INSN_STM0, FR30BF_SFMT_STM0 }, +// OBSOLETE { FR30_INSN_STM1, FR30BF_INSN_STM1, FR30BF_SFMT_STM1 }, +// OBSOLETE { FR30_INSN_ENTER, FR30BF_INSN_ENTER, FR30BF_SFMT_ENTER }, +// OBSOLETE { FR30_INSN_LEAVE, FR30BF_INSN_LEAVE, FR30BF_SFMT_LEAVE }, +// OBSOLETE { FR30_INSN_XCHB, FR30BF_INSN_XCHB, FR30BF_SFMT_XCHB }, +// OBSOLETE }; +// OBSOLETE +// OBSOLETE static const struct insn_sem fr30bf_insn_sem_invalid = { +// OBSOLETE VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY +// OBSOLETE }; +// OBSOLETE +// OBSOLETE /* Initialize an IDESC from the compile-time computable parts. */ +// OBSOLETE +// OBSOLETE static INLINE void +// OBSOLETE init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) +// OBSOLETE { +// OBSOLETE const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; +// OBSOLETE +// OBSOLETE id->num = t->index; +// OBSOLETE id->sfmt = t->sfmt; +// OBSOLETE if ((int) t->type <= 0) +// OBSOLETE id->idata = & cgen_virtual_insn_table[- (int) t->type]; +// OBSOLETE else +// OBSOLETE id->idata = & insn_table[t->type]; +// OBSOLETE id->attrs = CGEN_INSN_ATTRS (id->idata); +// OBSOLETE /* Oh my god, a magic number. */ +// OBSOLETE id->length = CGEN_INSN_BITSIZE (id->idata) / 8; +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; +// OBSOLETE { +// OBSOLETE SIM_DESC sd = CPU_STATE (cpu); +// OBSOLETE SIM_ASSERT (t->index == id->timing->num); +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE /* Semantic pointers are initialized elsewhere. */ +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Initialize the instruction descriptor table. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_init_idesc_table (SIM_CPU *cpu) +// OBSOLETE { +// OBSOLETE IDESC *id,*tabend; +// OBSOLETE const struct insn_sem *t,*tend; +// OBSOLETE int tabsize = sizeof (fr30bf_insn_data) / sizeof (IDESC); +// OBSOLETE IDESC *table = fr30bf_insn_data; +// OBSOLETE +// OBSOLETE memset (table, 0, tabsize * sizeof (IDESC)); +// OBSOLETE +// OBSOLETE /* First set all entries to the `invalid insn'. */ +// OBSOLETE t = & fr30bf_insn_sem_invalid; +// OBSOLETE for (id = table, tabend = table + tabsize; id < tabend; ++id) +// OBSOLETE init_idesc (cpu, id, t); +// OBSOLETE +// OBSOLETE /* Now fill in the values for the chosen cpu. */ +// OBSOLETE for (t = fr30bf_insn_sem, tend = t + sizeof (fr30bf_insn_sem) / sizeof (*t); +// OBSOLETE t != tend; ++t) +// OBSOLETE { +// OBSOLETE init_idesc (cpu, & table[t->index], t); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Link the IDESC table into the cpu. */ +// OBSOLETE CPU_IDESC (cpu) = table; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Given an instruction, return a pointer to its IDESC entry. */ +// OBSOLETE +// OBSOLETE const IDESC * +// OBSOLETE fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, +// OBSOLETE CGEN_INSN_INT base_insn, +// OBSOLETE ARGBUF *abuf) +// OBSOLETE { +// OBSOLETE /* Result of decoder. */ +// OBSOLETE FR30BF_INSN_TYPE itype; +// OBSOLETE +// OBSOLETE { +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE +// OBSOLETE { +// OBSOLETE unsigned int val = (((insn >> 8) & (255 << 0))); +// OBSOLETE switch (val) +// OBSOLETE { +// OBSOLETE case 0 : itype = FR30BF_INSN_LDR13;goto extract_sfmt_ldr13; +// OBSOLETE case 1 : itype = FR30BF_INSN_LDR13UH;goto extract_sfmt_ldr13uh; +// OBSOLETE case 2 : itype = FR30BF_INSN_LDR13UB;goto extract_sfmt_ldr13ub; +// OBSOLETE case 3 : itype = FR30BF_INSN_LDR15;goto extract_sfmt_ldr15; +// OBSOLETE case 4 : itype = FR30BF_INSN_LD;goto extract_sfmt_ld; +// OBSOLETE case 5 : itype = FR30BF_INSN_LDUH;goto extract_sfmt_lduh; +// OBSOLETE case 6 : itype = FR30BF_INSN_LDUB;goto extract_sfmt_ldub; +// OBSOLETE case 7 : +// OBSOLETE { +// OBSOLETE unsigned int val = (((insn >> 6) & (1 << 1)) | ((insn >> 4) & (1 << 0))); +// OBSOLETE switch (val) +// OBSOLETE { +// OBSOLETE case 0 : itype = FR30BF_INSN_LDR15GR;goto extract_sfmt_ldr15gr; +// OBSOLETE case 1 : itype = FR30BF_INSN_MOV2PS;goto extract_sfmt_mov2ps; +// OBSOLETE case 2 : itype = FR30BF_INSN_LDR15DR;goto extract_sfmt_ldr15dr; +// OBSOLETE case 3 : itype = FR30BF_INSN_LDR15PS;goto extract_sfmt_ldr15ps; +// OBSOLETE default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; +// OBSOLETE } +// OBSOLETE } +// OBSOLETE case 8 : itype = FR30BF_INSN_DMOV2R13;goto extract_sfmt_dmov2r13; +// OBSOLETE case 9 : itype = FR30BF_INSN_DMOV2R13H;goto extract_sfmt_dmov2r13h; +// OBSOLETE case 10 : itype = FR30BF_INSN_DMOV2R13B;goto extract_sfmt_dmov2r13b; +// OBSOLETE case 11 : itype = FR30BF_INSN_DMOV2R15PD;goto extract_sfmt_dmov2r15pd; +// OBSOLETE case 12 : itype = FR30BF_INSN_DMOV2R13PI;goto extract_sfmt_dmov2r13pi; +// OBSOLETE case 13 : itype = FR30BF_INSN_DMOV2R13PIH;goto extract_sfmt_dmov2r13pih; +// OBSOLETE case 14 : itype = FR30BF_INSN_DMOV2R13PIB;goto extract_sfmt_dmov2r13pib; +// OBSOLETE case 15 : itype = FR30BF_INSN_ENTER;goto extract_sfmt_enter; +// OBSOLETE case 16 : itype = FR30BF_INSN_STR13;goto extract_sfmt_str13; +// OBSOLETE case 17 : itype = FR30BF_INSN_STR13H;goto extract_sfmt_str13h; +// OBSOLETE case 18 : itype = FR30BF_INSN_STR13B;goto extract_sfmt_str13b; +// OBSOLETE case 19 : itype = FR30BF_INSN_STR15;goto extract_sfmt_str15; +// OBSOLETE case 20 : itype = FR30BF_INSN_ST;goto extract_sfmt_st; +// OBSOLETE case 21 : itype = FR30BF_INSN_STH;goto extract_sfmt_sth; +// OBSOLETE case 22 : itype = FR30BF_INSN_STB;goto extract_sfmt_stb; +// OBSOLETE case 23 : +// OBSOLETE { +// OBSOLETE unsigned int val = (((insn >> 6) & (1 << 1)) | ((insn >> 4) & (1 << 0))); +// OBSOLETE switch (val) +// OBSOLETE { +// OBSOLETE case 0 : itype = FR30BF_INSN_STR15GR;goto extract_sfmt_str15gr; +// OBSOLETE case 1 : itype = FR30BF_INSN_MOVPS;goto extract_sfmt_movps; +// OBSOLETE case 2 : itype = FR30BF_INSN_STR15DR;goto extract_sfmt_str15dr; +// OBSOLETE case 3 : itype = FR30BF_INSN_STR15PS;goto extract_sfmt_str15ps; +// OBSOLETE default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; +// OBSOLETE } +// OBSOLETE } +// OBSOLETE case 24 : itype = FR30BF_INSN_DMOVR13;goto extract_sfmt_dmovr13; +// OBSOLETE case 25 : itype = FR30BF_INSN_DMOVR13H;goto extract_sfmt_dmovr13h; +// OBSOLETE case 26 : itype = FR30BF_INSN_DMOVR13B;goto extract_sfmt_dmovr13b; +// OBSOLETE case 27 : itype = FR30BF_INSN_DMOVR15PI;goto extract_sfmt_dmovr15pi; +// OBSOLETE case 28 : itype = FR30BF_INSN_DMOVR13PI;goto extract_sfmt_dmovr13pi; +// OBSOLETE case 29 : itype = FR30BF_INSN_DMOVR13PIH;goto extract_sfmt_dmovr13pih; +// OBSOLETE case 30 : itype = FR30BF_INSN_DMOVR13PIB;goto extract_sfmt_dmovr13pib; +// OBSOLETE case 31 : itype = FR30BF_INSN_INT;goto extract_sfmt_int; +// OBSOLETE case 32 : /* fall through */ +// OBSOLETE case 33 : /* fall through */ +// OBSOLETE case 34 : /* fall through */ +// OBSOLETE case 35 : /* fall through */ +// OBSOLETE case 36 : /* fall through */ +// OBSOLETE case 37 : /* fall through */ +// OBSOLETE case 38 : /* fall through */ +// OBSOLETE case 39 : /* fall through */ +// OBSOLETE case 40 : /* fall through */ +// OBSOLETE case 41 : /* fall through */ +// OBSOLETE case 42 : /* fall through */ +// OBSOLETE case 43 : /* fall through */ +// OBSOLETE case 44 : /* fall through */ +// OBSOLETE case 45 : /* fall through */ +// OBSOLETE case 46 : /* fall through */ +// OBSOLETE case 47 : itype = FR30BF_INSN_LDR14;goto extract_sfmt_ldr14; +// OBSOLETE case 48 : /* fall through */ +// OBSOLETE case 49 : /* fall through */ +// OBSOLETE case 50 : /* fall through */ +// OBSOLETE case 51 : /* fall through */ +// OBSOLETE case 52 : /* fall through */ +// OBSOLETE case 53 : /* fall through */ +// OBSOLETE case 54 : /* fall through */ +// OBSOLETE case 55 : /* fall through */ +// OBSOLETE case 56 : /* fall through */ +// OBSOLETE case 57 : /* fall through */ +// OBSOLETE case 58 : /* fall through */ +// OBSOLETE case 59 : /* fall through */ +// OBSOLETE case 60 : /* fall through */ +// OBSOLETE case 61 : /* fall through */ +// OBSOLETE case 62 : /* fall through */ +// OBSOLETE case 63 : itype = FR30BF_INSN_STR14;goto extract_sfmt_str14; +// OBSOLETE case 64 : /* fall through */ +// OBSOLETE case 65 : /* fall through */ +// OBSOLETE case 66 : /* fall through */ +// OBSOLETE case 67 : /* fall through */ +// OBSOLETE case 68 : /* fall through */ +// OBSOLETE case 69 : /* fall through */ +// OBSOLETE case 70 : /* fall through */ +// OBSOLETE case 71 : /* fall through */ +// OBSOLETE case 72 : /* fall through */ +// OBSOLETE case 73 : /* fall through */ +// OBSOLETE case 74 : /* fall through */ +// OBSOLETE case 75 : /* fall through */ +// OBSOLETE case 76 : /* fall through */ +// OBSOLETE case 77 : /* fall through */ +// OBSOLETE case 78 : /* fall through */ +// OBSOLETE case 79 : itype = FR30BF_INSN_LDR14UH;goto extract_sfmt_ldr14uh; +// OBSOLETE case 80 : /* fall through */ +// OBSOLETE case 81 : /* fall through */ +// OBSOLETE case 82 : /* fall through */ +// OBSOLETE case 83 : /* fall through */ +// OBSOLETE case 84 : /* fall through */ +// OBSOLETE case 85 : /* fall through */ +// OBSOLETE case 86 : /* fall through */ +// OBSOLETE case 87 : /* fall through */ +// OBSOLETE case 88 : /* fall through */ +// OBSOLETE case 89 : /* fall through */ +// OBSOLETE case 90 : /* fall through */ +// OBSOLETE case 91 : /* fall through */ +// OBSOLETE case 92 : /* fall through */ +// OBSOLETE case 93 : /* fall through */ +// OBSOLETE case 94 : /* fall through */ +// OBSOLETE case 95 : itype = FR30BF_INSN_STR14H;goto extract_sfmt_str14h; +// OBSOLETE case 96 : /* fall through */ +// OBSOLETE case 97 : /* fall through */ +// OBSOLETE case 98 : /* fall through */ +// OBSOLETE case 99 : /* fall through */ +// OBSOLETE case 100 : /* fall through */ +// OBSOLETE case 101 : /* fall through */ +// OBSOLETE case 102 : /* fall through */ +// OBSOLETE case 103 : /* fall through */ +// OBSOLETE case 104 : /* fall through */ +// OBSOLETE case 105 : /* fall through */ +// OBSOLETE case 106 : /* fall through */ +// OBSOLETE case 107 : /* fall through */ +// OBSOLETE case 108 : /* fall through */ +// OBSOLETE case 109 : /* fall through */ +// OBSOLETE case 110 : /* fall through */ +// OBSOLETE case 111 : itype = FR30BF_INSN_LDR14UB;goto extract_sfmt_ldr14ub; +// OBSOLETE case 112 : /* fall through */ +// OBSOLETE case 113 : /* fall through */ +// OBSOLETE case 114 : /* fall through */ +// OBSOLETE case 115 : /* fall through */ +// OBSOLETE case 116 : /* fall through */ +// OBSOLETE case 117 : /* fall through */ +// OBSOLETE case 118 : /* fall through */ +// OBSOLETE case 119 : /* fall through */ +// OBSOLETE case 120 : /* fall through */ +// OBSOLETE case 121 : /* fall through */ +// OBSOLETE case 122 : /* fall through */ +// OBSOLETE case 123 : /* fall through */ +// OBSOLETE case 124 : /* fall through */ +// OBSOLETE case 125 : /* fall through */ +// OBSOLETE case 126 : /* fall through */ +// OBSOLETE case 127 : itype = FR30BF_INSN_STR14B;goto extract_sfmt_str14b; +// OBSOLETE case 128 : itype = FR30BF_INSN_BANDL;goto extract_sfmt_bandl; +// OBSOLETE case 129 : itype = FR30BF_INSN_BANDH;goto extract_sfmt_bandl; +// OBSOLETE case 130 : itype = FR30BF_INSN_AND;goto extract_sfmt_and; +// OBSOLETE case 131 : itype = FR30BF_INSN_ANDCCR;goto extract_sfmt_andccr; +// OBSOLETE case 132 : itype = FR30BF_INSN_ANDM;goto extract_sfmt_andm; +// OBSOLETE case 133 : itype = FR30BF_INSN_ANDH;goto extract_sfmt_andh; +// OBSOLETE case 134 : itype = FR30BF_INSN_ANDB;goto extract_sfmt_andb; +// OBSOLETE case 135 : itype = FR30BF_INSN_STILM;goto extract_sfmt_stilm; +// OBSOLETE case 136 : itype = FR30BF_INSN_BTSTL;goto extract_sfmt_btstl; +// OBSOLETE case 137 : itype = FR30BF_INSN_BTSTH;goto extract_sfmt_btstl; +// OBSOLETE case 138 : itype = FR30BF_INSN_XCHB;goto extract_sfmt_xchb; +// OBSOLETE case 139 : itype = FR30BF_INSN_MOV;goto extract_sfmt_mov; +// OBSOLETE case 140 : itype = FR30BF_INSN_LDM0;goto extract_sfmt_ldm0; +// OBSOLETE case 141 : itype = FR30BF_INSN_LDM1;goto extract_sfmt_ldm1; +// OBSOLETE case 142 : itype = FR30BF_INSN_STM0;goto extract_sfmt_stm0; +// OBSOLETE case 143 : itype = FR30BF_INSN_STM1;goto extract_sfmt_stm1; +// OBSOLETE case 144 : itype = FR30BF_INSN_BORL;goto extract_sfmt_bandl; +// OBSOLETE case 145 : itype = FR30BF_INSN_BORH;goto extract_sfmt_bandl; +// OBSOLETE case 146 : itype = FR30BF_INSN_OR;goto extract_sfmt_and; +// OBSOLETE case 147 : itype = FR30BF_INSN_ORCCR;goto extract_sfmt_andccr; +// OBSOLETE case 148 : itype = FR30BF_INSN_ORM;goto extract_sfmt_andm; +// OBSOLETE case 149 : itype = FR30BF_INSN_ORH;goto extract_sfmt_andh; +// OBSOLETE case 150 : itype = FR30BF_INSN_ORB;goto extract_sfmt_andb; +// OBSOLETE case 151 : +// OBSOLETE { +// OBSOLETE unsigned int val = (((insn >> 4) & (15 << 0))); +// OBSOLETE switch (val) +// OBSOLETE { +// OBSOLETE case 0 : itype = FR30BF_INSN_JMP;goto extract_sfmt_jmp; +// OBSOLETE case 1 : itype = FR30BF_INSN_CALLR;goto extract_sfmt_callr; +// OBSOLETE case 2 : itype = FR30BF_INSN_RET;goto extract_sfmt_ret; +// OBSOLETE case 3 : itype = FR30BF_INSN_RETI;goto extract_sfmt_reti; +// OBSOLETE case 4 : itype = FR30BF_INSN_DIV0S;goto extract_sfmt_div0s; +// OBSOLETE case 5 : itype = FR30BF_INSN_DIV0U;goto extract_sfmt_div0u; +// OBSOLETE case 6 : itype = FR30BF_INSN_DIV1;goto extract_sfmt_div1; +// OBSOLETE case 7 : itype = FR30BF_INSN_DIV2;goto extract_sfmt_div2; +// OBSOLETE case 8 : itype = FR30BF_INSN_EXTSB;goto extract_sfmt_extsb; +// OBSOLETE case 9 : itype = FR30BF_INSN_EXTUB;goto extract_sfmt_extub; +// OBSOLETE case 10 : itype = FR30BF_INSN_EXTSH;goto extract_sfmt_extsh; +// OBSOLETE case 11 : itype = FR30BF_INSN_EXTUH;goto extract_sfmt_extuh; +// OBSOLETE default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; +// OBSOLETE } +// OBSOLETE } +// OBSOLETE case 152 : itype = FR30BF_INSN_BEORL;goto extract_sfmt_bandl; +// OBSOLETE case 153 : itype = FR30BF_INSN_BEORH;goto extract_sfmt_bandl; +// OBSOLETE case 154 : itype = FR30BF_INSN_EOR;goto extract_sfmt_and; +// OBSOLETE case 155 : itype = FR30BF_INSN_LDI20;goto extract_sfmt_ldi20; +// OBSOLETE case 156 : itype = FR30BF_INSN_EORM;goto extract_sfmt_andm; +// OBSOLETE case 157 : itype = FR30BF_INSN_EORH;goto extract_sfmt_andh; +// OBSOLETE case 158 : itype = FR30BF_INSN_EORB;goto extract_sfmt_andb; +// OBSOLETE case 159 : +// OBSOLETE { +// OBSOLETE unsigned int val = (((insn >> 4) & (15 << 0))); +// OBSOLETE switch (val) +// OBSOLETE { +// OBSOLETE case 0 : itype = FR30BF_INSN_JMPD;goto extract_sfmt_jmp; +// OBSOLETE case 1 : itype = FR30BF_INSN_CALLRD;goto extract_sfmt_callr; +// OBSOLETE case 2 : itype = FR30BF_INSN_RET_D;goto extract_sfmt_ret; +// OBSOLETE case 3 : itype = FR30BF_INSN_INTE;goto extract_sfmt_inte; +// OBSOLETE case 6 : itype = FR30BF_INSN_DIV3;goto extract_sfmt_div3; +// OBSOLETE case 7 : itype = FR30BF_INSN_DIV4S;goto extract_sfmt_div4s; +// OBSOLETE case 8 : itype = FR30BF_INSN_LDI32;goto extract_sfmt_ldi32; +// OBSOLETE case 9 : itype = FR30BF_INSN_LEAVE;goto extract_sfmt_leave; +// OBSOLETE case 10 : itype = FR30BF_INSN_NOP;goto extract_sfmt_bnod; +// OBSOLETE case 12 : itype = FR30BF_INSN_COPOP;goto extract_sfmt_copop; +// OBSOLETE case 13 : itype = FR30BF_INSN_COPLD;goto extract_sfmt_copop; +// OBSOLETE case 14 : itype = FR30BF_INSN_COPST;goto extract_sfmt_copop; +// OBSOLETE case 15 : itype = FR30BF_INSN_COPSV;goto extract_sfmt_copop; +// OBSOLETE default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; +// OBSOLETE } +// OBSOLETE } +// OBSOLETE case 160 : itype = FR30BF_INSN_ADDNI;goto extract_sfmt_addni; +// OBSOLETE case 161 : itype = FR30BF_INSN_ADDN2;goto extract_sfmt_addn2; +// OBSOLETE case 162 : itype = FR30BF_INSN_ADDN;goto extract_sfmt_addn; +// OBSOLETE case 163 : itype = FR30BF_INSN_ADDSP;goto extract_sfmt_addsp; +// OBSOLETE case 164 : itype = FR30BF_INSN_ADDI;goto extract_sfmt_addi; +// OBSOLETE case 165 : itype = FR30BF_INSN_ADD2;goto extract_sfmt_add2; +// OBSOLETE case 166 : itype = FR30BF_INSN_ADD;goto extract_sfmt_add; +// OBSOLETE case 167 : itype = FR30BF_INSN_ADDC;goto extract_sfmt_addc; +// OBSOLETE case 168 : itype = FR30BF_INSN_CMPI;goto extract_sfmt_cmpi; +// OBSOLETE case 169 : itype = FR30BF_INSN_CMP2;goto extract_sfmt_cmp2; +// OBSOLETE case 170 : itype = FR30BF_INSN_CMP;goto extract_sfmt_cmp; +// OBSOLETE case 171 : itype = FR30BF_INSN_MULU;goto extract_sfmt_mulu; +// OBSOLETE case 172 : itype = FR30BF_INSN_SUB;goto extract_sfmt_add; +// OBSOLETE case 173 : itype = FR30BF_INSN_SUBC;goto extract_sfmt_addc; +// OBSOLETE case 174 : itype = FR30BF_INSN_SUBN;goto extract_sfmt_addn; +// OBSOLETE case 175 : itype = FR30BF_INSN_MUL;goto extract_sfmt_mul; +// OBSOLETE case 176 : itype = FR30BF_INSN_LSRI;goto extract_sfmt_lsli; +// OBSOLETE case 177 : itype = FR30BF_INSN_LSR2;goto extract_sfmt_lsli; +// OBSOLETE case 178 : itype = FR30BF_INSN_LSR;goto extract_sfmt_lsl; +// OBSOLETE case 179 : itype = FR30BF_INSN_MOV2DR;goto extract_sfmt_mov2dr; +// OBSOLETE case 180 : itype = FR30BF_INSN_LSLI;goto extract_sfmt_lsli; +// OBSOLETE case 181 : itype = FR30BF_INSN_LSL2;goto extract_sfmt_lsli; +// OBSOLETE case 182 : itype = FR30BF_INSN_LSL;goto extract_sfmt_lsl; +// OBSOLETE case 183 : itype = FR30BF_INSN_MOVDR;goto extract_sfmt_movdr; +// OBSOLETE case 184 : itype = FR30BF_INSN_ASRI;goto extract_sfmt_lsli; +// OBSOLETE case 185 : itype = FR30BF_INSN_ASR2;goto extract_sfmt_lsli; +// OBSOLETE case 186 : itype = FR30BF_INSN_ASR;goto extract_sfmt_lsl; +// OBSOLETE case 187 : itype = FR30BF_INSN_MULUH;goto extract_sfmt_mulh; +// OBSOLETE case 188 : itype = FR30BF_INSN_LDRES;goto extract_sfmt_ldres; +// OBSOLETE case 189 : itype = FR30BF_INSN_STRES;goto extract_sfmt_ldres; +// OBSOLETE case 191 : itype = FR30BF_INSN_MULH;goto extract_sfmt_mulh; +// OBSOLETE case 192 : /* fall through */ +// OBSOLETE case 193 : /* fall through */ +// OBSOLETE case 194 : /* fall through */ +// OBSOLETE case 195 : /* fall through */ +// OBSOLETE case 196 : /* fall through */ +// OBSOLETE case 197 : /* fall through */ +// OBSOLETE case 198 : /* fall through */ +// OBSOLETE case 199 : /* fall through */ +// OBSOLETE case 200 : /* fall through */ +// OBSOLETE case 201 : /* fall through */ +// OBSOLETE case 202 : /* fall through */ +// OBSOLETE case 203 : /* fall through */ +// OBSOLETE case 204 : /* fall through */ +// OBSOLETE case 205 : /* fall through */ +// OBSOLETE case 206 : /* fall through */ +// OBSOLETE case 207 : itype = FR30BF_INSN_LDI8;goto extract_sfmt_ldi8; +// OBSOLETE case 208 : /* fall through */ +// OBSOLETE case 209 : /* fall through */ +// OBSOLETE case 210 : /* fall through */ +// OBSOLETE case 211 : /* fall through */ +// OBSOLETE case 212 : /* fall through */ +// OBSOLETE case 213 : /* fall through */ +// OBSOLETE case 214 : /* fall through */ +// OBSOLETE case 215 : itype = FR30BF_INSN_CALL;goto extract_sfmt_call; +// OBSOLETE case 216 : /* fall through */ +// OBSOLETE case 217 : /* fall through */ +// OBSOLETE case 218 : /* fall through */ +// OBSOLETE case 219 : /* fall through */ +// OBSOLETE case 220 : /* fall through */ +// OBSOLETE case 221 : /* fall through */ +// OBSOLETE case 222 : /* fall through */ +// OBSOLETE case 223 : itype = FR30BF_INSN_CALLD;goto extract_sfmt_call; +// OBSOLETE case 224 : itype = FR30BF_INSN_BRA;goto extract_sfmt_brad; +// OBSOLETE case 225 : itype = FR30BF_INSN_BNO;goto extract_sfmt_bnod; +// OBSOLETE case 226 : itype = FR30BF_INSN_BEQ;goto extract_sfmt_beqd; +// OBSOLETE case 227 : itype = FR30BF_INSN_BNE;goto extract_sfmt_beqd; +// OBSOLETE case 228 : itype = FR30BF_INSN_BC;goto extract_sfmt_bcd; +// OBSOLETE case 229 : itype = FR30BF_INSN_BNC;goto extract_sfmt_bcd; +// OBSOLETE case 230 : itype = FR30BF_INSN_BN;goto extract_sfmt_bnd; +// OBSOLETE case 231 : itype = FR30BF_INSN_BP;goto extract_sfmt_bnd; +// OBSOLETE case 232 : itype = FR30BF_INSN_BV;goto extract_sfmt_bvd; +// OBSOLETE case 233 : itype = FR30BF_INSN_BNV;goto extract_sfmt_bvd; +// OBSOLETE case 234 : itype = FR30BF_INSN_BLT;goto extract_sfmt_bltd; +// OBSOLETE case 235 : itype = FR30BF_INSN_BGE;goto extract_sfmt_bltd; +// OBSOLETE case 236 : itype = FR30BF_INSN_BLE;goto extract_sfmt_bled; +// OBSOLETE case 237 : itype = FR30BF_INSN_BGT;goto extract_sfmt_bled; +// OBSOLETE case 238 : itype = FR30BF_INSN_BLS;goto extract_sfmt_blsd; +// OBSOLETE case 239 : itype = FR30BF_INSN_BHI;goto extract_sfmt_blsd; +// OBSOLETE case 240 : itype = FR30BF_INSN_BRAD;goto extract_sfmt_brad; +// OBSOLETE case 241 : itype = FR30BF_INSN_BNOD;goto extract_sfmt_bnod; +// OBSOLETE case 242 : itype = FR30BF_INSN_BEQD;goto extract_sfmt_beqd; +// OBSOLETE case 243 : itype = FR30BF_INSN_BNED;goto extract_sfmt_beqd; +// OBSOLETE case 244 : itype = FR30BF_INSN_BCD;goto extract_sfmt_bcd; +// OBSOLETE case 245 : itype = FR30BF_INSN_BNCD;goto extract_sfmt_bcd; +// OBSOLETE case 246 : itype = FR30BF_INSN_BND;goto extract_sfmt_bnd; +// OBSOLETE case 247 : itype = FR30BF_INSN_BPD;goto extract_sfmt_bnd; +// OBSOLETE case 248 : itype = FR30BF_INSN_BVD;goto extract_sfmt_bvd; +// OBSOLETE case 249 : itype = FR30BF_INSN_BNVD;goto extract_sfmt_bvd; +// OBSOLETE case 250 : itype = FR30BF_INSN_BLTD;goto extract_sfmt_bltd; +// OBSOLETE case 251 : itype = FR30BF_INSN_BGED;goto extract_sfmt_bltd; +// OBSOLETE case 252 : itype = FR30BF_INSN_BLED;goto extract_sfmt_bled; +// OBSOLETE case 253 : itype = FR30BF_INSN_BGTD;goto extract_sfmt_bled; +// OBSOLETE case 254 : itype = FR30BF_INSN_BLSD;goto extract_sfmt_blsd; +// OBSOLETE case 255 : itype = FR30BF_INSN_BHID;goto extract_sfmt_blsd; +// OBSOLETE default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* The instruction has been decoded, now extract the fields. */ +// OBSOLETE +// OBSOLETE extract_sfmt_empty: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_add: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_addi: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE UINT f_u4; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_u4) = f_u4; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_add2: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE SI f_m4; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_m4) = f_m4; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_addc: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addc", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_addn: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_addni: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE UINT f_u4; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_u4) = f_u4; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addni", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_addn2: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE SI f_m4; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_m4) = f_m4; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_cmp: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_cmpi: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE UINT f_u4; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_u4) = f_u4; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_cmp2: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE SI f_m4; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_m4) = f_m4; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_and: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_andm: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andm", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_andh: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andh", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_andb: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andb", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_bandl: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE UINT f_u4; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_u4) = f_u4; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bandl", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_btstl: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE UINT f_u4; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_u4) = f_u4; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btstl", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_mul: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mul", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_mulu: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulu", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_mulh: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulh", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_div0s: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0s", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_div0u: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0u", (char *) 0)); +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_div1: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div1", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_div2: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div2", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_div3: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div3", (char *) 0)); +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_div4s: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div4s", (char *) 0)); +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_lsl: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsl", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_lsli: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE UINT f_u4; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_u4) = f_u4; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsli", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldi8: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi8.f +// OBSOLETE UINT f_i8; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_i8 = EXTRACT_MSB0_UINT (insn, 16, 4, 8); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_i8) = f_i8; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_i8 0x%x", 'x', f_i8, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldi20: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi20.f +// OBSOLETE UINT f_i20_16; +// OBSOLETE UINT f_i20_4; +// OBSOLETE UINT f_Ri; +// OBSOLETE UINT f_i20; +// OBSOLETE /* Contents of trailing part of insn. */ +// OBSOLETE UINT word_1; +// OBSOLETE +// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); +// OBSOLETE f_i20_16 = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 0)); +// OBSOLETE f_i20_4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE { +// OBSOLETE f_i20 = ((((f_i20_4) << (16))) | (f_i20_16)); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_i20) = f_i20; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi20", "f_i20 0x%x", 'x', f_i20, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldi32: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi32.f +// OBSOLETE UINT f_i32; +// OBSOLETE UINT f_Ri; +// OBSOLETE /* Contents of trailing part of insn. */ +// OBSOLETE UINT word_1; +// OBSOLETE UINT word_2; +// OBSOLETE +// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); +// OBSOLETE word_2 = GETIMEMUHI (current_cpu, pc + 4); +// OBSOLETE f_i32 = (0|(EXTRACT_MSB0_UINT (word_2, 16, 0, 16) << 0)|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 16)); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_i32) = f_i32; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi32", "f_i32 0x%x", 'x', f_i32, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ld: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_lduh: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lduh", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldub: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldub", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldr13: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr13", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldr13uh: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr13uh", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldr13ub: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr13ub", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldr14: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14.f +// OBSOLETE SI f_disp10; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_disp10) = f_disp10; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14", "f_disp10 0x%x", 'x', f_disp10, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_14) = 14; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldr14uh: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14uh.f +// OBSOLETE SI f_disp9; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_disp9) = f_disp9; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14uh", "f_disp9 0x%x", 'x', f_disp9, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_14) = 14; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldr14ub: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14ub.f +// OBSOLETE INT f_disp8; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_disp8) = f_disp8; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14ub", "f_disp8 0x%x", 'x', f_disp8, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_14) = 14; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldr15: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15.f +// OBSOLETE USI f_udisp6; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_udisp6) = f_udisp6; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15", "f_udisp6 0x%x", 'x', f_udisp6, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldr15gr: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15gr.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldr15dr: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15dr.f +// OBSOLETE UINT f_Rs2; +// OBSOLETE +// OBSOLETE f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Rs2) = f_Rs2; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldr15ps: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15ps", (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_st: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_sth: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_stb: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_str13: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str13", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_str13h: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str13h", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_str13b: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str13b", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_str14: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14.f +// OBSOLETE SI f_disp10; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_disp10) = f_disp10; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14", "f_Ri 0x%x", 'x', f_Ri, "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_h_gr_SI_14) = 14; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_str14h: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14h.f +// OBSOLETE SI f_disp9; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_disp9) = f_disp9; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14h", "f_Ri 0x%x", 'x', f_Ri, "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_h_gr_SI_14) = 14; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_str14b: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14b.f +// OBSOLETE INT f_disp8; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_disp8) = f_disp8; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14b", "f_Ri 0x%x", 'x', f_Ri, "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_h_gr_SI_14) = 14; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_str15: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str15.f +// OBSOLETE USI f_udisp6; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_udisp6) = f_udisp6; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15", "f_Ri 0x%x", 'x', f_Ri, "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_str15gr: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str15gr.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_str15dr: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15dr.f +// OBSOLETE UINT f_Rs2; +// OBSOLETE +// OBSOLETE f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Rs2) = f_Rs2; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_str15ps: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15ps", (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_mov: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_movdr: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_movdr.f +// OBSOLETE UINT f_Rs1; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Rs1) = f_Rs1; +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movdr", "f_Rs1 0x%x", 'x', f_Rs1, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_movps: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_movdr.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movps", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_mov2dr: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE UINT f_Rs1; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rs1) = f_Rs1; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2dr", "f_Ri 0x%x", 'x', f_Ri, "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_mov2ps: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2ps", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_jmp: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_callr: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_call: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_call.f +// OBSOLETE SI f_rel12; +// OBSOLETE +// OBSOLETE f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (i_label12) = f_rel12; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_call", "label12 0x%x", 'x', f_rel12, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ret: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_int: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE UINT f_u8; +// OBSOLETE +// OBSOLETE f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_u8) = f_u8; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_int", "f_u8 0x%x", 'x', f_u8, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_inte: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_inte", (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_reti: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_reti", (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_brad: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE SI f_rel9; +// OBSOLETE +// OBSOLETE f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (i_label9) = f_rel9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_brad", "label9 0x%x", 'x', f_rel9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_bnod: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnod", (char *) 0)); +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_beqd: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE SI f_rel9; +// OBSOLETE +// OBSOLETE f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (i_label9) = f_rel9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqd", "label9 0x%x", 'x', f_rel9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_bcd: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE SI f_rel9; +// OBSOLETE +// OBSOLETE f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (i_label9) = f_rel9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcd", "label9 0x%x", 'x', f_rel9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_bnd: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE SI f_rel9; +// OBSOLETE +// OBSOLETE f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (i_label9) = f_rel9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnd", "label9 0x%x", 'x', f_rel9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_bvd: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE SI f_rel9; +// OBSOLETE +// OBSOLETE f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (i_label9) = f_rel9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bvd", "label9 0x%x", 'x', f_rel9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_bltd: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE SI f_rel9; +// OBSOLETE +// OBSOLETE f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (i_label9) = f_rel9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bltd", "label9 0x%x", 'x', f_rel9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_bled: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE SI f_rel9; +// OBSOLETE +// OBSOLETE f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (i_label9) = f_rel9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bled", "label9 0x%x", 'x', f_rel9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_blsd: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE SI f_rel9; +// OBSOLETE +// OBSOLETE f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (i_label9) = f_rel9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_blsd", "label9 0x%x", 'x', f_rel9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmovr13: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE USI f_dir10; +// OBSOLETE +// OBSOLETE f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir10) = f_dir10; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmovr13h: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE USI f_dir9; +// OBSOLETE +// OBSOLETE f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir9) = f_dir9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmovr13b: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE UINT f_dir8; +// OBSOLETE +// OBSOLETE f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir8) = f_dir8; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmovr13pi: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE USI f_dir10; +// OBSOLETE +// OBSOLETE f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir10) = f_dir10; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE FLD (out_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmovr13pih: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE USI f_dir9; +// OBSOLETE +// OBSOLETE f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir9) = f_dir9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE FLD (out_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmovr13pib: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE UINT f_dir8; +// OBSOLETE +// OBSOLETE f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir8) = f_dir8; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE FLD (out_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmovr15pi: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr15pi.f +// OBSOLETE USI f_dir10; +// OBSOLETE +// OBSOLETE f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir10) = f_dir10; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr15pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmov2r13: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE USI f_dir10; +// OBSOLETE +// OBSOLETE f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir10) = f_dir10; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (out_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmov2r13h: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE USI f_dir9; +// OBSOLETE +// OBSOLETE f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir9) = f_dir9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (out_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmov2r13b: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE UINT f_dir8; +// OBSOLETE +// OBSOLETE f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir8) = f_dir8; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (out_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmov2r13pi: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE USI f_dir10; +// OBSOLETE +// OBSOLETE f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir10) = f_dir10; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE FLD (out_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmov2r13pih: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE USI f_dir9; +// OBSOLETE +// OBSOLETE f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir9) = f_dir9; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE FLD (out_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmov2r13pib: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE UINT f_dir8; +// OBSOLETE +// OBSOLETE f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir8) = f_dir8; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE FLD (out_h_gr_SI_13) = 13; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_dmov2r15pd: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr15pi.f +// OBSOLETE USI f_dir10; +// OBSOLETE +// OBSOLETE f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_dir10) = f_dir10; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r15pd", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldres: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldres", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_copop: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE /* Contents of trailing part of insn. */ +// OBSOLETE UINT word_1; +// OBSOLETE +// OBSOLETE word_1 = GETIMEMUHI (current_cpu, pc + 2); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_copop", (char *) 0)); +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_andccr: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE UINT f_u8; +// OBSOLETE +// OBSOLETE f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_u8) = f_u8; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andccr", "f_u8 0x%x", 'x', f_u8, (char *) 0)); +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_stilm: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE UINT f_u8; +// OBSOLETE +// OBSOLETE f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_u8) = f_u8; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stilm", "f_u8 0x%x", 'x', f_u8, (char *) 0)); +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_addsp: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE SI f_s10; +// OBSOLETE +// OBSOLETE f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_s10) = f_s10; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addsp", "f_s10 0x%x", 'x', f_s10, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_extsb: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsb", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_extub: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extub", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_extsh: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsh", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_extuh: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extuh", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldm0: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldm0.f +// OBSOLETE UINT f_reglist_low_ld; +// OBSOLETE +// OBSOLETE f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_reglist_low_ld) = f_reglist_low_ld; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm0", "f_reglist_low_ld 0x%x", 'x', f_reglist_low_ld, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_0) = 0; +// OBSOLETE FLD (out_h_gr_SI_1) = 1; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_2) = 2; +// OBSOLETE FLD (out_h_gr_SI_3) = 3; +// OBSOLETE FLD (out_h_gr_SI_4) = 4; +// OBSOLETE FLD (out_h_gr_SI_5) = 5; +// OBSOLETE FLD (out_h_gr_SI_6) = 6; +// OBSOLETE FLD (out_h_gr_SI_7) = 7; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_ldm1: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldm1.f +// OBSOLETE UINT f_reglist_hi_ld; +// OBSOLETE +// OBSOLETE f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_reglist_hi_ld) = f_reglist_hi_ld; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm1", "f_reglist_hi_ld 0x%x", 'x', f_reglist_hi_ld, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_10) = 10; +// OBSOLETE FLD (out_h_gr_SI_11) = 11; +// OBSOLETE FLD (out_h_gr_SI_12) = 12; +// OBSOLETE FLD (out_h_gr_SI_13) = 13; +// OBSOLETE FLD (out_h_gr_SI_14) = 14; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_8) = 8; +// OBSOLETE FLD (out_h_gr_SI_9) = 9; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_stm0: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_stm0.f +// OBSOLETE UINT f_reglist_low_st; +// OBSOLETE +// OBSOLETE f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_reglist_low_st) = f_reglist_low_st; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm0", "f_reglist_low_st 0x%x", 'x', f_reglist_low_st, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_0) = 0; +// OBSOLETE FLD (in_h_gr_SI_1) = 1; +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (in_h_gr_SI_2) = 2; +// OBSOLETE FLD (in_h_gr_SI_3) = 3; +// OBSOLETE FLD (in_h_gr_SI_4) = 4; +// OBSOLETE FLD (in_h_gr_SI_5) = 5; +// OBSOLETE FLD (in_h_gr_SI_6) = 6; +// OBSOLETE FLD (in_h_gr_SI_7) = 7; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_stm1: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_stm1.f +// OBSOLETE UINT f_reglist_hi_st; +// OBSOLETE +// OBSOLETE f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_reglist_hi_st) = f_reglist_hi_st; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm1", "f_reglist_hi_st 0x%x", 'x', f_reglist_hi_st, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_10) = 10; +// OBSOLETE FLD (in_h_gr_SI_11) = 11; +// OBSOLETE FLD (in_h_gr_SI_12) = 12; +// OBSOLETE FLD (in_h_gr_SI_13) = 13; +// OBSOLETE FLD (in_h_gr_SI_14) = 14; +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (in_h_gr_SI_8) = 8; +// OBSOLETE FLD (in_h_gr_SI_9) = 9; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_enter: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_enter.f +// OBSOLETE USI f_u10; +// OBSOLETE +// OBSOLETE f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_u10) = f_u10; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_enter", "f_u10 0x%x", 'x', f_u10, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_14) = 14; +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_14) = 14; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_leave: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_enter.f +// OBSOLETE +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_leave", (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_h_gr_SI_14) = 14; +// OBSOLETE FLD (in_h_gr_SI_15) = 15; +// OBSOLETE FLD (out_h_gr_SI_14) = 14; +// OBSOLETE FLD (out_h_gr_SI_15) = 15; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE extract_sfmt_xchb: +// OBSOLETE { +// OBSOLETE const IDESC *idesc = &fr30bf_insn_data[itype]; +// OBSOLETE CGEN_INSN_INT insn = base_insn; +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE UINT f_Rj; +// OBSOLETE UINT f_Ri; +// OBSOLETE +// OBSOLETE f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); +// OBSOLETE f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); +// OBSOLETE +// OBSOLETE /* Record the fields for the semantic handler. */ +// OBSOLETE FLD (f_Ri) = f_Ri; +// OBSOLETE FLD (f_Rj) = f_Rj; +// OBSOLETE FLD (i_Ri) = & CPU (h_gr)[f_Ri]; +// OBSOLETE FLD (i_Rj) = & CPU (h_gr)[f_Rj]; +// OBSOLETE TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_xchb", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE /* Record the fields for profiling. */ +// OBSOLETE if (PROFILE_MODEL_P (current_cpu)) +// OBSOLETE { +// OBSOLETE FLD (in_Ri) = f_Ri; +// OBSOLETE FLD (in_Rj) = f_Rj; +// OBSOLETE FLD (out_Ri) = f_Ri; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE #undef FLD +// OBSOLETE return idesc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE } diff --git a/sim/fr30/decode.h b/sim/fr30/decode.h index 65f6181..452c3f9 100644 --- a/sim/fr30/decode.h +++ b/sim/fr30/decode.h @@ -1,127 +1,127 @@ -/* Decode header for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef FR30BF_DECODE_H -#define FR30BF_DECODE_H - -extern const IDESC *fr30bf_decode (SIM_CPU *, IADDR, - CGEN_INSN_INT, - ARGBUF *); -extern void fr30bf_init_idesc_table (SIM_CPU *); -extern void fr30bf_sem_init_idesc_table (SIM_CPU *); -extern void fr30bf_semf_init_idesc_table (SIM_CPU *); - -/* Enum declaration for instructions in cpu family fr30bf. */ -typedef enum fr30bf_insn_type { - FR30BF_INSN_X_INVALID, FR30BF_INSN_X_AFTER, FR30BF_INSN_X_BEFORE, FR30BF_INSN_X_CTI_CHAIN - , FR30BF_INSN_X_CHAIN, FR30BF_INSN_X_BEGIN, FR30BF_INSN_ADD, FR30BF_INSN_ADDI - , FR30BF_INSN_ADD2, FR30BF_INSN_ADDC, FR30BF_INSN_ADDN, FR30BF_INSN_ADDNI - , FR30BF_INSN_ADDN2, FR30BF_INSN_SUB, FR30BF_INSN_SUBC, FR30BF_INSN_SUBN - , FR30BF_INSN_CMP, FR30BF_INSN_CMPI, FR30BF_INSN_CMP2, FR30BF_INSN_AND - , FR30BF_INSN_OR, FR30BF_INSN_EOR, FR30BF_INSN_ANDM, FR30BF_INSN_ANDH - , FR30BF_INSN_ANDB, FR30BF_INSN_ORM, FR30BF_INSN_ORH, FR30BF_INSN_ORB - , FR30BF_INSN_EORM, FR30BF_INSN_EORH, FR30BF_INSN_EORB, FR30BF_INSN_BANDL - , FR30BF_INSN_BORL, FR30BF_INSN_BEORL, FR30BF_INSN_BANDH, FR30BF_INSN_BORH - , FR30BF_INSN_BEORH, FR30BF_INSN_BTSTL, FR30BF_INSN_BTSTH, FR30BF_INSN_MUL - , FR30BF_INSN_MULU, FR30BF_INSN_MULH, FR30BF_INSN_MULUH, FR30BF_INSN_DIV0S - , FR30BF_INSN_DIV0U, FR30BF_INSN_DIV1, FR30BF_INSN_DIV2, FR30BF_INSN_DIV3 - , FR30BF_INSN_DIV4S, FR30BF_INSN_LSL, FR30BF_INSN_LSLI, FR30BF_INSN_LSL2 - , FR30BF_INSN_LSR, FR30BF_INSN_LSRI, FR30BF_INSN_LSR2, FR30BF_INSN_ASR - , FR30BF_INSN_ASRI, FR30BF_INSN_ASR2, FR30BF_INSN_LDI8, FR30BF_INSN_LDI20 - , FR30BF_INSN_LDI32, FR30BF_INSN_LD, FR30BF_INSN_LDUH, FR30BF_INSN_LDUB - , FR30BF_INSN_LDR13, FR30BF_INSN_LDR13UH, FR30BF_INSN_LDR13UB, FR30BF_INSN_LDR14 - , FR30BF_INSN_LDR14UH, FR30BF_INSN_LDR14UB, FR30BF_INSN_LDR15, FR30BF_INSN_LDR15GR - , FR30BF_INSN_LDR15DR, FR30BF_INSN_LDR15PS, FR30BF_INSN_ST, FR30BF_INSN_STH - , FR30BF_INSN_STB, FR30BF_INSN_STR13, FR30BF_INSN_STR13H, FR30BF_INSN_STR13B - , FR30BF_INSN_STR14, FR30BF_INSN_STR14H, FR30BF_INSN_STR14B, FR30BF_INSN_STR15 - , FR30BF_INSN_STR15GR, FR30BF_INSN_STR15DR, FR30BF_INSN_STR15PS, FR30BF_INSN_MOV - , FR30BF_INSN_MOVDR, FR30BF_INSN_MOVPS, FR30BF_INSN_MOV2DR, FR30BF_INSN_MOV2PS - , FR30BF_INSN_JMP, FR30BF_INSN_JMPD, FR30BF_INSN_CALLR, FR30BF_INSN_CALLRD - , FR30BF_INSN_CALL, FR30BF_INSN_CALLD, FR30BF_INSN_RET, FR30BF_INSN_RET_D - , FR30BF_INSN_INT, FR30BF_INSN_INTE, FR30BF_INSN_RETI, FR30BF_INSN_BRAD - , FR30BF_INSN_BRA, FR30BF_INSN_BNOD, FR30BF_INSN_BNO, FR30BF_INSN_BEQD - , FR30BF_INSN_BEQ, FR30BF_INSN_BNED, FR30BF_INSN_BNE, FR30BF_INSN_BCD - , FR30BF_INSN_BC, FR30BF_INSN_BNCD, FR30BF_INSN_BNC, FR30BF_INSN_BND - , FR30BF_INSN_BN, FR30BF_INSN_BPD, FR30BF_INSN_BP, FR30BF_INSN_BVD - , FR30BF_INSN_BV, FR30BF_INSN_BNVD, FR30BF_INSN_BNV, FR30BF_INSN_BLTD - , FR30BF_INSN_BLT, FR30BF_INSN_BGED, FR30BF_INSN_BGE, FR30BF_INSN_BLED - , FR30BF_INSN_BLE, FR30BF_INSN_BGTD, FR30BF_INSN_BGT, FR30BF_INSN_BLSD - , FR30BF_INSN_BLS, FR30BF_INSN_BHID, FR30BF_INSN_BHI, FR30BF_INSN_DMOVR13 - , FR30BF_INSN_DMOVR13H, FR30BF_INSN_DMOVR13B, FR30BF_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PIH - , FR30BF_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR15PI, FR30BF_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13H - , FR30BF_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIB - , FR30BF_INSN_DMOV2R15PD, FR30BF_INSN_LDRES, FR30BF_INSN_STRES, FR30BF_INSN_COPOP - , FR30BF_INSN_COPLD, FR30BF_INSN_COPST, FR30BF_INSN_COPSV, FR30BF_INSN_NOP - , FR30BF_INSN_ANDCCR, FR30BF_INSN_ORCCR, FR30BF_INSN_STILM, FR30BF_INSN_ADDSP - , FR30BF_INSN_EXTSB, FR30BF_INSN_EXTUB, FR30BF_INSN_EXTSH, FR30BF_INSN_EXTUH - , FR30BF_INSN_LDM0, FR30BF_INSN_LDM1, FR30BF_INSN_STM0, FR30BF_INSN_STM1 - , FR30BF_INSN_ENTER, FR30BF_INSN_LEAVE, FR30BF_INSN_XCHB, FR30BF_INSN_MAX -} FR30BF_INSN_TYPE; - -/* Enum declaration for semantic formats in cpu family fr30bf. */ -typedef enum fr30bf_sfmt_type { - FR30BF_SFMT_EMPTY, FR30BF_SFMT_ADD, FR30BF_SFMT_ADDI, FR30BF_SFMT_ADD2 - , FR30BF_SFMT_ADDC, FR30BF_SFMT_ADDN, FR30BF_SFMT_ADDNI, FR30BF_SFMT_ADDN2 - , FR30BF_SFMT_CMP, FR30BF_SFMT_CMPI, FR30BF_SFMT_CMP2, FR30BF_SFMT_AND - , FR30BF_SFMT_ANDM, FR30BF_SFMT_ANDH, FR30BF_SFMT_ANDB, FR30BF_SFMT_BANDL - , FR30BF_SFMT_BTSTL, FR30BF_SFMT_MUL, FR30BF_SFMT_MULU, FR30BF_SFMT_MULH - , FR30BF_SFMT_DIV0S, FR30BF_SFMT_DIV0U, FR30BF_SFMT_DIV1, FR30BF_SFMT_DIV2 - , FR30BF_SFMT_DIV3, FR30BF_SFMT_DIV4S, FR30BF_SFMT_LSL, FR30BF_SFMT_LSLI - , FR30BF_SFMT_LDI8, FR30BF_SFMT_LDI20, FR30BF_SFMT_LDI32, FR30BF_SFMT_LD - , FR30BF_SFMT_LDUH, FR30BF_SFMT_LDUB, FR30BF_SFMT_LDR13, FR30BF_SFMT_LDR13UH - , FR30BF_SFMT_LDR13UB, FR30BF_SFMT_LDR14, FR30BF_SFMT_LDR14UH, FR30BF_SFMT_LDR14UB - , FR30BF_SFMT_LDR15, FR30BF_SFMT_LDR15GR, FR30BF_SFMT_LDR15DR, FR30BF_SFMT_LDR15PS - , FR30BF_SFMT_ST, FR30BF_SFMT_STH, FR30BF_SFMT_STB, FR30BF_SFMT_STR13 - , FR30BF_SFMT_STR13H, FR30BF_SFMT_STR13B, FR30BF_SFMT_STR14, FR30BF_SFMT_STR14H - , FR30BF_SFMT_STR14B, FR30BF_SFMT_STR15, FR30BF_SFMT_STR15GR, FR30BF_SFMT_STR15DR - , FR30BF_SFMT_STR15PS, FR30BF_SFMT_MOV, FR30BF_SFMT_MOVDR, FR30BF_SFMT_MOVPS - , FR30BF_SFMT_MOV2DR, FR30BF_SFMT_MOV2PS, FR30BF_SFMT_JMP, FR30BF_SFMT_CALLR - , FR30BF_SFMT_CALL, FR30BF_SFMT_RET, FR30BF_SFMT_INT, FR30BF_SFMT_INTE - , FR30BF_SFMT_RETI, FR30BF_SFMT_BRAD, FR30BF_SFMT_BNOD, FR30BF_SFMT_BEQD - , FR30BF_SFMT_BCD, FR30BF_SFMT_BND, FR30BF_SFMT_BVD, FR30BF_SFMT_BLTD - , FR30BF_SFMT_BLED, FR30BF_SFMT_BLSD, FR30BF_SFMT_DMOVR13, FR30BF_SFMT_DMOVR13H - , FR30BF_SFMT_DMOVR13B, FR30BF_SFMT_DMOVR13PI, FR30BF_SFMT_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIB - , FR30BF_SFMT_DMOVR15PI, FR30BF_SFMT_DMOV2R13, FR30BF_SFMT_DMOV2R13H, FR30BF_SFMT_DMOV2R13B - , FR30BF_SFMT_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIB, FR30BF_SFMT_DMOV2R15PD - , FR30BF_SFMT_LDRES, FR30BF_SFMT_COPOP, FR30BF_SFMT_ANDCCR, FR30BF_SFMT_STILM - , FR30BF_SFMT_ADDSP, FR30BF_SFMT_EXTSB, FR30BF_SFMT_EXTUB, FR30BF_SFMT_EXTSH - , FR30BF_SFMT_EXTUH, FR30BF_SFMT_LDM0, FR30BF_SFMT_LDM1, FR30BF_SFMT_STM0 - , FR30BF_SFMT_STM1, FR30BF_SFMT_ENTER, FR30BF_SFMT_LEAVE, FR30BF_SFMT_XCHB -} FR30BF_SFMT_TYPE; - -/* Function unit handlers (user written). */ - -extern int fr30bf_model_fr30_1_u_stm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/); -extern int fr30bf_model_fr30_1_u_ldm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/); -extern int fr30bf_model_fr30_1_u_store (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/); -extern int fr30bf_model_fr30_1_u_load (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rj*/, INT /*Ri*/); -extern int fr30bf_model_fr30_1_u_cti (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/); -extern int fr30bf_model_fr30_1_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/, INT /*Ri*/); - -/* Profiling before/after handlers (user written) */ - -extern void fr30bf_model_insn_before (SIM_CPU *, int /*first_p*/); -extern void fr30bf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/); - -#endif /* FR30BF_DECODE_H */ +// OBSOLETE /* Decode header for fr30bf. +// OBSOLETE +// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN. +// OBSOLETE +// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// OBSOLETE +// OBSOLETE */ +// OBSOLETE +// OBSOLETE #ifndef FR30BF_DECODE_H +// OBSOLETE #define FR30BF_DECODE_H +// OBSOLETE +// OBSOLETE extern const IDESC *fr30bf_decode (SIM_CPU *, IADDR, +// OBSOLETE CGEN_INSN_INT, +// OBSOLETE ARGBUF *); +// OBSOLETE extern void fr30bf_init_idesc_table (SIM_CPU *); +// OBSOLETE extern void fr30bf_sem_init_idesc_table (SIM_CPU *); +// OBSOLETE extern void fr30bf_semf_init_idesc_table (SIM_CPU *); +// OBSOLETE +// OBSOLETE /* Enum declaration for instructions in cpu family fr30bf. */ +// OBSOLETE typedef enum fr30bf_insn_type { +// OBSOLETE FR30BF_INSN_X_INVALID, FR30BF_INSN_X_AFTER, FR30BF_INSN_X_BEFORE, FR30BF_INSN_X_CTI_CHAIN +// OBSOLETE , FR30BF_INSN_X_CHAIN, FR30BF_INSN_X_BEGIN, FR30BF_INSN_ADD, FR30BF_INSN_ADDI +// OBSOLETE , FR30BF_INSN_ADD2, FR30BF_INSN_ADDC, FR30BF_INSN_ADDN, FR30BF_INSN_ADDNI +// OBSOLETE , FR30BF_INSN_ADDN2, FR30BF_INSN_SUB, FR30BF_INSN_SUBC, FR30BF_INSN_SUBN +// OBSOLETE , FR30BF_INSN_CMP, FR30BF_INSN_CMPI, FR30BF_INSN_CMP2, FR30BF_INSN_AND +// OBSOLETE , FR30BF_INSN_OR, FR30BF_INSN_EOR, FR30BF_INSN_ANDM, FR30BF_INSN_ANDH +// OBSOLETE , FR30BF_INSN_ANDB, FR30BF_INSN_ORM, FR30BF_INSN_ORH, FR30BF_INSN_ORB +// OBSOLETE , FR30BF_INSN_EORM, FR30BF_INSN_EORH, FR30BF_INSN_EORB, FR30BF_INSN_BANDL +// OBSOLETE , FR30BF_INSN_BORL, FR30BF_INSN_BEORL, FR30BF_INSN_BANDH, FR30BF_INSN_BORH +// OBSOLETE , FR30BF_INSN_BEORH, FR30BF_INSN_BTSTL, FR30BF_INSN_BTSTH, FR30BF_INSN_MUL +// OBSOLETE , FR30BF_INSN_MULU, FR30BF_INSN_MULH, FR30BF_INSN_MULUH, FR30BF_INSN_DIV0S +// OBSOLETE , FR30BF_INSN_DIV0U, FR30BF_INSN_DIV1, FR30BF_INSN_DIV2, FR30BF_INSN_DIV3 +// OBSOLETE , FR30BF_INSN_DIV4S, FR30BF_INSN_LSL, FR30BF_INSN_LSLI, FR30BF_INSN_LSL2 +// OBSOLETE , FR30BF_INSN_LSR, FR30BF_INSN_LSRI, FR30BF_INSN_LSR2, FR30BF_INSN_ASR +// OBSOLETE , FR30BF_INSN_ASRI, FR30BF_INSN_ASR2, FR30BF_INSN_LDI8, FR30BF_INSN_LDI20 +// OBSOLETE , FR30BF_INSN_LDI32, FR30BF_INSN_LD, FR30BF_INSN_LDUH, FR30BF_INSN_LDUB +// OBSOLETE , FR30BF_INSN_LDR13, FR30BF_INSN_LDR13UH, FR30BF_INSN_LDR13UB, FR30BF_INSN_LDR14 +// OBSOLETE , FR30BF_INSN_LDR14UH, FR30BF_INSN_LDR14UB, FR30BF_INSN_LDR15, FR30BF_INSN_LDR15GR +// OBSOLETE , FR30BF_INSN_LDR15DR, FR30BF_INSN_LDR15PS, FR30BF_INSN_ST, FR30BF_INSN_STH +// OBSOLETE , FR30BF_INSN_STB, FR30BF_INSN_STR13, FR30BF_INSN_STR13H, FR30BF_INSN_STR13B +// OBSOLETE , FR30BF_INSN_STR14, FR30BF_INSN_STR14H, FR30BF_INSN_STR14B, FR30BF_INSN_STR15 +// OBSOLETE , FR30BF_INSN_STR15GR, FR30BF_INSN_STR15DR, FR30BF_INSN_STR15PS, FR30BF_INSN_MOV +// OBSOLETE , FR30BF_INSN_MOVDR, FR30BF_INSN_MOVPS, FR30BF_INSN_MOV2DR, FR30BF_INSN_MOV2PS +// OBSOLETE , FR30BF_INSN_JMP, FR30BF_INSN_JMPD, FR30BF_INSN_CALLR, FR30BF_INSN_CALLRD +// OBSOLETE , FR30BF_INSN_CALL, FR30BF_INSN_CALLD, FR30BF_INSN_RET, FR30BF_INSN_RET_D +// OBSOLETE , FR30BF_INSN_INT, FR30BF_INSN_INTE, FR30BF_INSN_RETI, FR30BF_INSN_BRAD +// OBSOLETE , FR30BF_INSN_BRA, FR30BF_INSN_BNOD, FR30BF_INSN_BNO, FR30BF_INSN_BEQD +// OBSOLETE , FR30BF_INSN_BEQ, FR30BF_INSN_BNED, FR30BF_INSN_BNE, FR30BF_INSN_BCD +// OBSOLETE , FR30BF_INSN_BC, FR30BF_INSN_BNCD, FR30BF_INSN_BNC, FR30BF_INSN_BND +// OBSOLETE , FR30BF_INSN_BN, FR30BF_INSN_BPD, FR30BF_INSN_BP, FR30BF_INSN_BVD +// OBSOLETE , FR30BF_INSN_BV, FR30BF_INSN_BNVD, FR30BF_INSN_BNV, FR30BF_INSN_BLTD +// OBSOLETE , FR30BF_INSN_BLT, FR30BF_INSN_BGED, FR30BF_INSN_BGE, FR30BF_INSN_BLED +// OBSOLETE , FR30BF_INSN_BLE, FR30BF_INSN_BGTD, FR30BF_INSN_BGT, FR30BF_INSN_BLSD +// OBSOLETE , FR30BF_INSN_BLS, FR30BF_INSN_BHID, FR30BF_INSN_BHI, FR30BF_INSN_DMOVR13 +// OBSOLETE , FR30BF_INSN_DMOVR13H, FR30BF_INSN_DMOVR13B, FR30BF_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PIH +// OBSOLETE , FR30BF_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR15PI, FR30BF_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13H +// OBSOLETE , FR30BF_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIB +// OBSOLETE , FR30BF_INSN_DMOV2R15PD, FR30BF_INSN_LDRES, FR30BF_INSN_STRES, FR30BF_INSN_COPOP +// OBSOLETE , FR30BF_INSN_COPLD, FR30BF_INSN_COPST, FR30BF_INSN_COPSV, FR30BF_INSN_NOP +// OBSOLETE , FR30BF_INSN_ANDCCR, FR30BF_INSN_ORCCR, FR30BF_INSN_STILM, FR30BF_INSN_ADDSP +// OBSOLETE , FR30BF_INSN_EXTSB, FR30BF_INSN_EXTUB, FR30BF_INSN_EXTSH, FR30BF_INSN_EXTUH +// OBSOLETE , FR30BF_INSN_LDM0, FR30BF_INSN_LDM1, FR30BF_INSN_STM0, FR30BF_INSN_STM1 +// OBSOLETE , FR30BF_INSN_ENTER, FR30BF_INSN_LEAVE, FR30BF_INSN_XCHB, FR30BF_INSN_MAX +// OBSOLETE } FR30BF_INSN_TYPE; +// OBSOLETE +// OBSOLETE /* Enum declaration for semantic formats in cpu family fr30bf. */ +// OBSOLETE typedef enum fr30bf_sfmt_type { +// OBSOLETE FR30BF_SFMT_EMPTY, FR30BF_SFMT_ADD, FR30BF_SFMT_ADDI, FR30BF_SFMT_ADD2 +// OBSOLETE , FR30BF_SFMT_ADDC, FR30BF_SFMT_ADDN, FR30BF_SFMT_ADDNI, FR30BF_SFMT_ADDN2 +// OBSOLETE , FR30BF_SFMT_CMP, FR30BF_SFMT_CMPI, FR30BF_SFMT_CMP2, FR30BF_SFMT_AND +// OBSOLETE , FR30BF_SFMT_ANDM, FR30BF_SFMT_ANDH, FR30BF_SFMT_ANDB, FR30BF_SFMT_BANDL +// OBSOLETE , FR30BF_SFMT_BTSTL, FR30BF_SFMT_MUL, FR30BF_SFMT_MULU, FR30BF_SFMT_MULH +// OBSOLETE , FR30BF_SFMT_DIV0S, FR30BF_SFMT_DIV0U, FR30BF_SFMT_DIV1, FR30BF_SFMT_DIV2 +// OBSOLETE , FR30BF_SFMT_DIV3, FR30BF_SFMT_DIV4S, FR30BF_SFMT_LSL, FR30BF_SFMT_LSLI +// OBSOLETE , FR30BF_SFMT_LDI8, FR30BF_SFMT_LDI20, FR30BF_SFMT_LDI32, FR30BF_SFMT_LD +// OBSOLETE , FR30BF_SFMT_LDUH, FR30BF_SFMT_LDUB, FR30BF_SFMT_LDR13, FR30BF_SFMT_LDR13UH +// OBSOLETE , FR30BF_SFMT_LDR13UB, FR30BF_SFMT_LDR14, FR30BF_SFMT_LDR14UH, FR30BF_SFMT_LDR14UB +// OBSOLETE , FR30BF_SFMT_LDR15, FR30BF_SFMT_LDR15GR, FR30BF_SFMT_LDR15DR, FR30BF_SFMT_LDR15PS +// OBSOLETE , FR30BF_SFMT_ST, FR30BF_SFMT_STH, FR30BF_SFMT_STB, FR30BF_SFMT_STR13 +// OBSOLETE , FR30BF_SFMT_STR13H, FR30BF_SFMT_STR13B, FR30BF_SFMT_STR14, FR30BF_SFMT_STR14H +// OBSOLETE , FR30BF_SFMT_STR14B, FR30BF_SFMT_STR15, FR30BF_SFMT_STR15GR, FR30BF_SFMT_STR15DR +// OBSOLETE , FR30BF_SFMT_STR15PS, FR30BF_SFMT_MOV, FR30BF_SFMT_MOVDR, FR30BF_SFMT_MOVPS +// OBSOLETE , FR30BF_SFMT_MOV2DR, FR30BF_SFMT_MOV2PS, FR30BF_SFMT_JMP, FR30BF_SFMT_CALLR +// OBSOLETE , FR30BF_SFMT_CALL, FR30BF_SFMT_RET, FR30BF_SFMT_INT, FR30BF_SFMT_INTE +// OBSOLETE , FR30BF_SFMT_RETI, FR30BF_SFMT_BRAD, FR30BF_SFMT_BNOD, FR30BF_SFMT_BEQD +// OBSOLETE , FR30BF_SFMT_BCD, FR30BF_SFMT_BND, FR30BF_SFMT_BVD, FR30BF_SFMT_BLTD +// OBSOLETE , FR30BF_SFMT_BLED, FR30BF_SFMT_BLSD, FR30BF_SFMT_DMOVR13, FR30BF_SFMT_DMOVR13H +// OBSOLETE , FR30BF_SFMT_DMOVR13B, FR30BF_SFMT_DMOVR13PI, FR30BF_SFMT_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIB +// OBSOLETE , FR30BF_SFMT_DMOVR15PI, FR30BF_SFMT_DMOV2R13, FR30BF_SFMT_DMOV2R13H, FR30BF_SFMT_DMOV2R13B +// OBSOLETE , FR30BF_SFMT_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIB, FR30BF_SFMT_DMOV2R15PD +// OBSOLETE , FR30BF_SFMT_LDRES, FR30BF_SFMT_COPOP, FR30BF_SFMT_ANDCCR, FR30BF_SFMT_STILM +// OBSOLETE , FR30BF_SFMT_ADDSP, FR30BF_SFMT_EXTSB, FR30BF_SFMT_EXTUB, FR30BF_SFMT_EXTSH +// OBSOLETE , FR30BF_SFMT_EXTUH, FR30BF_SFMT_LDM0, FR30BF_SFMT_LDM1, FR30BF_SFMT_STM0 +// OBSOLETE , FR30BF_SFMT_STM1, FR30BF_SFMT_ENTER, FR30BF_SFMT_LEAVE, FR30BF_SFMT_XCHB +// OBSOLETE } FR30BF_SFMT_TYPE; +// OBSOLETE +// OBSOLETE /* Function unit handlers (user written). */ +// OBSOLETE +// OBSOLETE extern int fr30bf_model_fr30_1_u_stm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/); +// OBSOLETE extern int fr30bf_model_fr30_1_u_ldm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/); +// OBSOLETE extern int fr30bf_model_fr30_1_u_store (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/); +// OBSOLETE extern int fr30bf_model_fr30_1_u_load (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rj*/, INT /*Ri*/); +// OBSOLETE extern int fr30bf_model_fr30_1_u_cti (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/); +// OBSOLETE extern int fr30bf_model_fr30_1_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/, INT /*Ri*/); +// OBSOLETE +// OBSOLETE /* Profiling before/after handlers (user written) */ +// OBSOLETE +// OBSOLETE extern void fr30bf_model_insn_before (SIM_CPU *, int /*first_p*/); +// OBSOLETE extern void fr30bf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/); +// OBSOLETE +// OBSOLETE #endif /* FR30BF_DECODE_H */ diff --git a/sim/fr30/devices.c b/sim/fr30/devices.c index a3d47cf..f99f35c 100644 --- a/sim/fr30/devices.c +++ b/sim/fr30/devices.c @@ -1,98 +1,98 @@ -/* fr30 device support - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -/* ??? All of this is just to get something going. wip! */ - -#include "sim-main.h" - -#ifdef HAVE_DV_SOCKSER -#include "dv-sockser.h" -#endif - -device fr30_devices; - -int -device_io_read_buffer (device *me, void *source, int space, - address_word addr, unsigned nr_bytes, - SIM_DESC sd, SIM_CPU *cpu, sim_cia cia) -{ - if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) - return nr_bytes; - -#ifdef HAVE_DV_SOCKSER - if (addr == UART_INCHAR_ADDR) - { - int c = dv_sockser_read (sd); - if (c == -1) - return 0; - *(char *) source = c; - return 1; - } - if (addr == UART_STATUS_ADDR) - { - int status = dv_sockser_status (sd); - unsigned char *p = source; - p[0] = 0; - p[1] = (((status & DV_SOCKSER_INPUT_EMPTY) -#ifdef UART_INPUT_READY0 - ? UART_INPUT_READY : 0) -#else - ? 0 : UART_INPUT_READY) -#endif - + ((status & DV_SOCKSER_OUTPUT_EMPTY) ? UART_OUTPUT_READY : 0)); - return 2; - } -#endif - - return nr_bytes; -} - -int -device_io_write_buffer (device *me, const void *source, int space, - address_word addr, unsigned nr_bytes, - SIM_DESC sd, SIM_CPU *cpu, sim_cia cia) -{ -#if WITH_SCACHE - if (addr == MCCR_ADDR) - { - if ((*(const char *) source & MCCR_CP) != 0) - scache_flush (sd); - return nr_bytes; - } -#endif - - if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) - return nr_bytes; - -#if HAVE_DV_SOCKSER - if (addr == UART_OUTCHAR_ADDR) - { - int rc = dv_sockser_write (sd, *(char *) source); - return rc == 1; - } -#endif - - return nr_bytes; -} - -void -device_error (device *me, char *message, ...) -{ -} +// OBSOLETE /* fr30 device support +// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc. +// OBSOLETE Contributed by Cygnus Solutions. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +// OBSOLETE +// OBSOLETE /* ??? All of this is just to get something going. wip! */ +// OBSOLETE +// OBSOLETE #include "sim-main.h" +// OBSOLETE +// OBSOLETE #ifdef HAVE_DV_SOCKSER +// OBSOLETE #include "dv-sockser.h" +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE device fr30_devices; +// OBSOLETE +// OBSOLETE int +// OBSOLETE device_io_read_buffer (device *me, void *source, int space, +// OBSOLETE address_word addr, unsigned nr_bytes, +// OBSOLETE SIM_DESC sd, SIM_CPU *cpu, sim_cia cia) +// OBSOLETE { +// OBSOLETE if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) +// OBSOLETE return nr_bytes; +// OBSOLETE +// OBSOLETE #ifdef HAVE_DV_SOCKSER +// OBSOLETE if (addr == UART_INCHAR_ADDR) +// OBSOLETE { +// OBSOLETE int c = dv_sockser_read (sd); +// OBSOLETE if (c == -1) +// OBSOLETE return 0; +// OBSOLETE *(char *) source = c; +// OBSOLETE return 1; +// OBSOLETE } +// OBSOLETE if (addr == UART_STATUS_ADDR) +// OBSOLETE { +// OBSOLETE int status = dv_sockser_status (sd); +// OBSOLETE unsigned char *p = source; +// OBSOLETE p[0] = 0; +// OBSOLETE p[1] = (((status & DV_SOCKSER_INPUT_EMPTY) +// OBSOLETE #ifdef UART_INPUT_READY0 +// OBSOLETE ? UART_INPUT_READY : 0) +// OBSOLETE #else +// OBSOLETE ? 0 : UART_INPUT_READY) +// OBSOLETE #endif +// OBSOLETE + ((status & DV_SOCKSER_OUTPUT_EMPTY) ? UART_OUTPUT_READY : 0)); +// OBSOLETE return 2; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE return nr_bytes; +// OBSOLETE } +// OBSOLETE +// OBSOLETE int +// OBSOLETE device_io_write_buffer (device *me, const void *source, int space, +// OBSOLETE address_word addr, unsigned nr_bytes, +// OBSOLETE SIM_DESC sd, SIM_CPU *cpu, sim_cia cia) +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE +// OBSOLETE if (addr == MCCR_ADDR) +// OBSOLETE { +// OBSOLETE if ((*(const char *) source & MCCR_CP) != 0) +// OBSOLETE scache_flush (sd); +// OBSOLETE return nr_bytes; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) +// OBSOLETE return nr_bytes; +// OBSOLETE +// OBSOLETE #if HAVE_DV_SOCKSER +// OBSOLETE if (addr == UART_OUTCHAR_ADDR) +// OBSOLETE { +// OBSOLETE int rc = dv_sockser_write (sd, *(char *) source); +// OBSOLETE return rc == 1; +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE return nr_bytes; +// OBSOLETE } +// OBSOLETE +// OBSOLETE void +// OBSOLETE device_error (device *me, char *message, ...) +// OBSOLETE { +// OBSOLETE } diff --git a/sim/fr30/fr30-sim.h b/sim/fr30/fr30-sim.h index dbb8117..f1d9109 100644 --- a/sim/fr30/fr30-sim.h +++ b/sim/fr30/fr30-sim.h @@ -1,96 +1,96 @@ -/* collection of junk waiting time to sort out - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef FR30_SIM_H -#define FR30_SIM_H - -/* gdb register numbers */ -#define PC_REGNUM 16 -#define PS_REGNUM 17 -#define TBR_REGNUM 18 -#define RP_REGNUM 19 -#define SSP_REGNUM 20 -#define USP_REGNUM 21 -#define MDH_REGNUM 22 -#define MDL_REGNUM 23 - -extern BI fr30bf_h_sbit_get_handler (SIM_CPU *); -extern void fr30bf_h_sbit_set_handler (SIM_CPU *, BI); - -extern UQI fr30bf_h_ccr_get_handler (SIM_CPU *); -extern void fr30bf_h_ccr_set_handler (SIM_CPU *, UQI); - -extern UQI fr30bf_h_scr_get_handler (SIM_CPU *); -extern void fr30bf_h_scr_set_handler (SIM_CPU *, UQI); - -extern UQI fr30bf_h_ilm_get_handler (SIM_CPU *); -extern void fr30bf_h_ilm_set_handler (SIM_CPU *, UQI); - -extern USI fr30bf_h_ps_get_handler (SIM_CPU *); -extern void fr30bf_h_ps_set_handler (SIM_CPU *, USI); - -extern SI fr30bf_h_dr_get_handler (SIM_CPU *, UINT); -extern void fr30bf_h_dr_set_handler (SIM_CPU *, UINT, SI); - -#define GETTWI GETTSI -#define SETTWI SETTSI - -/* Hardware/device support. - ??? Will eventually want to move device stuff to config files. */ - -/* Special purpose traps. */ -#define TRAP_SYSCALL 10 -#define TRAP_BREAKPOINT 9 - -/* Support for the MCCR register (Cache Control Register) is needed in order - for overlays to work correctly with the scache: cached instructions need - to be flushed when the instruction space is changed at runtime. */ - -/* Cache Control Register */ -#define MCCR_ADDR 0xffffffff -#define MCCR_CP 0x80 -/* not supported */ -#define MCCR_CM0 2 -#define MCCR_CM1 1 - -/* Serial device addresses. */ -/* These are the values for the MSA2000 board. - ??? Will eventually need to move this to a config file. */ -#define UART_INCHAR_ADDR 0xff004009 -#define UART_OUTCHAR_ADDR 0xff004007 -#define UART_STATUS_ADDR 0xff004002 - -#define UART_INPUT_READY 0x4 -#define UART_OUTPUT_READY 0x1 - -/* Start address and length of all device support. */ -#define FR30_DEVICE_ADDR 0xff000000 -#define FR30_DEVICE_LEN 0x00ffffff - -/* sim_core_attach device argument. */ -extern device fr30_devices; - -/* FIXME: Temporary, until device support ready. */ -struct _device { int foo; }; - -/* Handle the trap insn. */ -USI fr30_int (SIM_CPU *, PCADDR, int); - -#endif /* FR30_SIM_H */ +// OBSOLETE /* collection of junk waiting time to sort out +// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc. +// OBSOLETE Contributed by Cygnus Solutions. +// OBSOLETE +// OBSOLETE This file is part of the GNU Simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +// OBSOLETE +// OBSOLETE #ifndef FR30_SIM_H +// OBSOLETE #define FR30_SIM_H +// OBSOLETE +// OBSOLETE /* gdb register numbers */ +// OBSOLETE #define PC_REGNUM 16 +// OBSOLETE #define PS_REGNUM 17 +// OBSOLETE #define TBR_REGNUM 18 +// OBSOLETE #define RP_REGNUM 19 +// OBSOLETE #define SSP_REGNUM 20 +// OBSOLETE #define USP_REGNUM 21 +// OBSOLETE #define MDH_REGNUM 22 +// OBSOLETE #define MDL_REGNUM 23 +// OBSOLETE +// OBSOLETE extern BI fr30bf_h_sbit_get_handler (SIM_CPU *); +// OBSOLETE extern void fr30bf_h_sbit_set_handler (SIM_CPU *, BI); +// OBSOLETE +// OBSOLETE extern UQI fr30bf_h_ccr_get_handler (SIM_CPU *); +// OBSOLETE extern void fr30bf_h_ccr_set_handler (SIM_CPU *, UQI); +// OBSOLETE +// OBSOLETE extern UQI fr30bf_h_scr_get_handler (SIM_CPU *); +// OBSOLETE extern void fr30bf_h_scr_set_handler (SIM_CPU *, UQI); +// OBSOLETE +// OBSOLETE extern UQI fr30bf_h_ilm_get_handler (SIM_CPU *); +// OBSOLETE extern void fr30bf_h_ilm_set_handler (SIM_CPU *, UQI); +// OBSOLETE +// OBSOLETE extern USI fr30bf_h_ps_get_handler (SIM_CPU *); +// OBSOLETE extern void fr30bf_h_ps_set_handler (SIM_CPU *, USI); +// OBSOLETE +// OBSOLETE extern SI fr30bf_h_dr_get_handler (SIM_CPU *, UINT); +// OBSOLETE extern void fr30bf_h_dr_set_handler (SIM_CPU *, UINT, SI); +// OBSOLETE +// OBSOLETE #define GETTWI GETTSI +// OBSOLETE #define SETTWI SETTSI +// OBSOLETE +// OBSOLETE /* Hardware/device support. +// OBSOLETE ??? Will eventually want to move device stuff to config files. */ +// OBSOLETE +// OBSOLETE /* Special purpose traps. */ +// OBSOLETE #define TRAP_SYSCALL 10 +// OBSOLETE #define TRAP_BREAKPOINT 9 +// OBSOLETE +// OBSOLETE /* Support for the MCCR register (Cache Control Register) is needed in order +// OBSOLETE for overlays to work correctly with the scache: cached instructions need +// OBSOLETE to be flushed when the instruction space is changed at runtime. */ +// OBSOLETE +// OBSOLETE /* Cache Control Register */ +// OBSOLETE #define MCCR_ADDR 0xffffffff +// OBSOLETE #define MCCR_CP 0x80 +// OBSOLETE /* not supported */ +// OBSOLETE #define MCCR_CM0 2 +// OBSOLETE #define MCCR_CM1 1 +// OBSOLETE +// OBSOLETE /* Serial device addresses. */ +// OBSOLETE /* These are the values for the MSA2000 board. +// OBSOLETE ??? Will eventually need to move this to a config file. */ +// OBSOLETE #define UART_INCHAR_ADDR 0xff004009 +// OBSOLETE #define UART_OUTCHAR_ADDR 0xff004007 +// OBSOLETE #define UART_STATUS_ADDR 0xff004002 +// OBSOLETE +// OBSOLETE #define UART_INPUT_READY 0x4 +// OBSOLETE #define UART_OUTPUT_READY 0x1 +// OBSOLETE +// OBSOLETE /* Start address and length of all device support. */ +// OBSOLETE #define FR30_DEVICE_ADDR 0xff000000 +// OBSOLETE #define FR30_DEVICE_LEN 0x00ffffff +// OBSOLETE +// OBSOLETE /* sim_core_attach device argument. */ +// OBSOLETE extern device fr30_devices; +// OBSOLETE +// OBSOLETE /* FIXME: Temporary, until device support ready. */ +// OBSOLETE struct _device { int foo; }; +// OBSOLETE +// OBSOLETE /* Handle the trap insn. */ +// OBSOLETE USI fr30_int (SIM_CPU *, PCADDR, int); +// OBSOLETE +// OBSOLETE #endif /* FR30_SIM_H */ diff --git a/sim/fr30/fr30.c b/sim/fr30/fr30.c index 5133654..835ca9a 100644 --- a/sim/fr30/fr30.c +++ b/sim/fr30/fr30.c @@ -1,423 +1,423 @@ -/* fr30 simulator support code - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#define WANT_CPU -#define WANT_CPU_FR30BF - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -/* Convert gdb dedicated register number to actual dr reg number. */ - -static int -decode_gdb_dr_regnum (int gdb_regnum) -{ - switch (gdb_regnum) - { - case TBR_REGNUM : return H_DR_TBR; - case RP_REGNUM : return H_DR_RP; - case SSP_REGNUM : return H_DR_SSP; - case USP_REGNUM : return H_DR_USP; - case MDH_REGNUM : return H_DR_MDH; - case MDL_REGNUM : return H_DR_MDL; - } - abort (); -} - -/* The contents of BUF are in target byte order. */ - -int -fr30bf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) -{ - if (rn < 16) - SETTWI (buf, fr30bf_h_gr_get (current_cpu, rn)); - else - switch (rn) - { - case PC_REGNUM : - SETTWI (buf, fr30bf_h_pc_get (current_cpu)); - break; - case PS_REGNUM : - SETTWI (buf, fr30bf_h_ps_get (current_cpu)); - break; - case TBR_REGNUM : - case RP_REGNUM : - case SSP_REGNUM : - case USP_REGNUM : - case MDH_REGNUM : - case MDL_REGNUM : - SETTWI (buf, fr30bf_h_dr_get (current_cpu, - decode_gdb_dr_regnum (rn))); - break; - default : - return 0; - } - - return -1; /*FIXME*/ -} - -/* The contents of BUF are in target byte order. */ - -int -fr30bf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) -{ - if (rn < 16) - fr30bf_h_gr_set (current_cpu, rn, GETTWI (buf)); - else - switch (rn) - { - case PC_REGNUM : - fr30bf_h_pc_set (current_cpu, GETTWI (buf)); - break; - case PS_REGNUM : - fr30bf_h_ps_set (current_cpu, GETTWI (buf)); - break; - case TBR_REGNUM : - case RP_REGNUM : - case SSP_REGNUM : - case USP_REGNUM : - case MDH_REGNUM : - case MDL_REGNUM : - fr30bf_h_dr_set (current_cpu, - decode_gdb_dr_regnum (rn), - GETTWI (buf)); - break; - default : - return 0; - } - - return -1; /*FIXME*/ -} - -/* Cover fns to access the ccr bits. */ - -BI -fr30bf_h_sbit_get_handler (SIM_CPU *current_cpu) -{ - return CPU (h_sbit); -} - -void -fr30bf_h_sbit_set_handler (SIM_CPU *current_cpu, BI newval) -{ - int old_sbit = CPU (h_sbit); - int new_sbit = (newval != 0); - - CPU (h_sbit) = new_sbit; - - /* When switching stack modes, update the registers. */ - if (old_sbit != new_sbit) - { - if (old_sbit) - { - /* Switching user -> system. */ - CPU (h_dr[H_DR_USP]) = CPU (h_gr[H_GR_SP]); - CPU (h_gr[H_GR_SP]) = CPU (h_dr[H_DR_SSP]); - } - else - { - /* Switching system -> user. */ - CPU (h_dr[H_DR_SSP]) = CPU (h_gr[H_GR_SP]); - CPU (h_gr[H_GR_SP]) = CPU (h_dr[H_DR_USP]); - } - } - - /* TODO: r15 interlock */ -} - -/* Cover fns to access the ccr bits. */ - -UQI -fr30bf_h_ccr_get_handler (SIM_CPU *current_cpu) -{ - int ccr = ( (GET_H_CBIT () << 0) - | (GET_H_VBIT () << 1) - | (GET_H_ZBIT () << 2) - | (GET_H_NBIT () << 3) - | (GET_H_IBIT () << 4) - | (GET_H_SBIT () << 5)); - - return ccr; -} - -void -fr30bf_h_ccr_set_handler (SIM_CPU *current_cpu, UQI newval) -{ - int ccr = newval & 0x3f; - - SET_H_CBIT ((ccr & 1) != 0); - SET_H_VBIT ((ccr & 2) != 0); - SET_H_ZBIT ((ccr & 4) != 0); - SET_H_NBIT ((ccr & 8) != 0); - SET_H_IBIT ((ccr & 0x10) != 0); - SET_H_SBIT ((ccr & 0x20) != 0); -} - -/* Cover fns to access the scr bits. */ - -UQI -fr30bf_h_scr_get_handler (SIM_CPU *current_cpu) -{ - int scr = ( (GET_H_TBIT () << 0) - | (GET_H_D0BIT () << 1) - | (GET_H_D1BIT () << 2)); - return scr; -} - -void -fr30bf_h_scr_set_handler (SIM_CPU *current_cpu, UQI newval) -{ - int scr = newval & 7; - - SET_H_TBIT ((scr & 1) != 0); - SET_H_D0BIT ((scr & 2) != 0); - SET_H_D1BIT ((scr & 4) != 0); -} - -/* Cover fns to access the ilm bits. */ - -UQI -fr30bf_h_ilm_get_handler (SIM_CPU *current_cpu) -{ - return CPU (h_ilm); -} - -void -fr30bf_h_ilm_set_handler (SIM_CPU *current_cpu, UQI newval) -{ - int ilm = newval & 0x1f; - int current_ilm = CPU (h_ilm); - - /* We can only set new ilm values < 16 if the current ilm is < 16. Otherwise - we add 16 to the value we are given. */ - if (current_ilm >= 16 && ilm < 16) - ilm += 16; - - CPU (h_ilm) = ilm; -} - -/* Cover fns to access the ps register. */ - -USI -fr30bf_h_ps_get_handler (SIM_CPU *current_cpu) -{ - int ccr = GET_H_CCR (); - int scr = GET_H_SCR (); - int ilm = GET_H_ILM (); - - return ccr | (scr << 8) | (ilm << 16); -} - -void -fr30bf_h_ps_set_handler (SIM_CPU *current_cpu, USI newval) -{ - int ccr = newval & 0xff; - int scr = (newval >> 8) & 7; - int ilm = (newval >> 16) & 0x1f; - - SET_H_CCR (ccr); - SET_H_SCR (scr); - SET_H_ILM (ilm); -} - -/* Cover fns to access the dedicated registers. */ - -SI -fr30bf_h_dr_get_handler (SIM_CPU *current_cpu, UINT dr) -{ - switch (dr) - { - case H_DR_SSP : - if (! GET_H_SBIT ()) - return GET_H_GR (H_GR_SP); - else - return CPU (h_dr[H_DR_SSP]); - case H_DR_USP : - if (GET_H_SBIT ()) - return GET_H_GR (H_GR_SP); - else - return CPU (h_dr[H_DR_USP]); - case H_DR_TBR : - case H_DR_RP : - case H_DR_MDH : - case H_DR_MDL : - return CPU (h_dr[dr]); - } - return 0; -} - -void -fr30bf_h_dr_set_handler (SIM_CPU *current_cpu, UINT dr, SI newval) -{ - switch (dr) - { - case H_DR_SSP : - if (! GET_H_SBIT ()) - SET_H_GR (H_GR_SP, newval); - else - CPU (h_dr[H_DR_SSP]) = newval; - break; - case H_DR_USP : - if (GET_H_SBIT ()) - SET_H_GR (H_GR_SP, newval); - else - CPU (h_dr[H_DR_USP]) = newval; - break; - case H_DR_TBR : - case H_DR_RP : - case H_DR_MDH : - case H_DR_MDL : - CPU (h_dr[dr]) = newval; - break; - } -} - -#if WITH_PROFILE_MODEL_P - -/* FIXME: Some of these should be inline or macros. Later. */ - -/* Initialize cycle counting for an insn. - FIRST_P is non-zero if this is the first insn in a set of parallel - insns. */ - -void -fr30bf_model_insn_before (SIM_CPU *cpu, int first_p) -{ - MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); - d->load_regs_pending = 0; -} - -/* Record the cycles computed for an insn. - LAST_P is non-zero if this is the last insn in a set of parallel insns, - and we update the total cycle count. - CYCLES is the cycle count of the insn. */ - -void -fr30bf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles) -{ - PROFILE_DATA *p = CPU_PROFILE_DATA (cpu); - MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); - - PROFILE_MODEL_TOTAL_CYCLES (p) += cycles; - PROFILE_MODEL_CUR_INSN_CYCLES (p) = cycles; - d->load_regs = d->load_regs_pending; -} - -static INLINE int -check_load_stall (SIM_CPU *cpu, int regno) -{ - const MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); - UINT load_regs = d->load_regs; - - if (regno != -1 - && (load_regs & (1 << regno)) != 0) - { - PROFILE_DATA *p = CPU_PROFILE_DATA (cpu); - ++ PROFILE_MODEL_LOAD_STALL_CYCLES (p); - if (TRACE_INSN_P (cpu)) - cgen_trace_printf (cpu, " ; Load stall."); - return 1; - } - else - return 0; -} - -int -fr30bf_model_fr30_1_u_exec (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT in_Ri, INT in_Rj, INT out_Ri) -{ - int cycles = idesc->timing->units[unit_num].done; - cycles += check_load_stall (cpu, in_Ri); - cycles += check_load_stall (cpu, in_Rj); - return cycles; -} - -int -fr30bf_model_fr30_1_u_cti (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT in_Ri) -{ - PROFILE_DATA *p = CPU_PROFILE_DATA (cpu); - /* (1 << 1): The pc is the 2nd element in inputs, outputs. - ??? can be cleaned up */ - int taken_p = (referenced & (1 << 1)) != 0; - int cycles = idesc->timing->units[unit_num].done; - int delay_slot_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT); - - cycles += check_load_stall (cpu, in_Ri); - if (taken_p) - { - /* ??? Handling cti's without delay slots this way will run afoul of - accurate system simulation. Later. */ - if (! delay_slot_p) - { - ++cycles; - ++PROFILE_MODEL_CTI_STALL_CYCLES (p); - } - ++PROFILE_MODEL_TAKEN_COUNT (p); - } - else - ++PROFILE_MODEL_UNTAKEN_COUNT (p); - - return cycles; -} - -int -fr30bf_model_fr30_1_u_load (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT in_Rj, INT out_Ri) -{ - MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); - int cycles = idesc->timing->units[unit_num].done; - d->load_regs_pending |= 1 << out_Ri; - cycles += check_load_stall (cpu, in_Rj); - return cycles; -} - -int -fr30bf_model_fr30_1_u_store (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT in_Ri, INT in_Rj) -{ - int cycles = idesc->timing->units[unit_num].done; - cycles += check_load_stall (cpu, in_Ri); - cycles += check_load_stall (cpu, in_Rj); - return cycles; -} - -int -fr30bf_model_fr30_1_u_ldm (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT reglist) -{ - return idesc->timing->units[unit_num].done; -} - -int -fr30bf_model_fr30_1_u_stm (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT reglist) -{ - return idesc->timing->units[unit_num].done; -} - -#endif /* WITH_PROFILE_MODEL_P */ +// OBSOLETE /* fr30 simulator support code +// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc. +// OBSOLETE Contributed by Cygnus Solutions. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +// OBSOLETE +// OBSOLETE #define WANT_CPU +// OBSOLETE #define WANT_CPU_FR30BF +// OBSOLETE +// OBSOLETE #include "sim-main.h" +// OBSOLETE #include "cgen-mem.h" +// OBSOLETE #include "cgen-ops.h" +// OBSOLETE +// OBSOLETE /* Convert gdb dedicated register number to actual dr reg number. */ +// OBSOLETE +// OBSOLETE static int +// OBSOLETE decode_gdb_dr_regnum (int gdb_regnum) +// OBSOLETE { +// OBSOLETE switch (gdb_regnum) +// OBSOLETE { +// OBSOLETE case TBR_REGNUM : return H_DR_TBR; +// OBSOLETE case RP_REGNUM : return H_DR_RP; +// OBSOLETE case SSP_REGNUM : return H_DR_SSP; +// OBSOLETE case USP_REGNUM : return H_DR_USP; +// OBSOLETE case MDH_REGNUM : return H_DR_MDH; +// OBSOLETE case MDL_REGNUM : return H_DR_MDL; +// OBSOLETE } +// OBSOLETE abort (); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* The contents of BUF are in target byte order. */ +// OBSOLETE +// OBSOLETE int +// OBSOLETE fr30bf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +// OBSOLETE { +// OBSOLETE if (rn < 16) +// OBSOLETE SETTWI (buf, fr30bf_h_gr_get (current_cpu, rn)); +// OBSOLETE else +// OBSOLETE switch (rn) +// OBSOLETE { +// OBSOLETE case PC_REGNUM : +// OBSOLETE SETTWI (buf, fr30bf_h_pc_get (current_cpu)); +// OBSOLETE break; +// OBSOLETE case PS_REGNUM : +// OBSOLETE SETTWI (buf, fr30bf_h_ps_get (current_cpu)); +// OBSOLETE break; +// OBSOLETE case TBR_REGNUM : +// OBSOLETE case RP_REGNUM : +// OBSOLETE case SSP_REGNUM : +// OBSOLETE case USP_REGNUM : +// OBSOLETE case MDH_REGNUM : +// OBSOLETE case MDL_REGNUM : +// OBSOLETE SETTWI (buf, fr30bf_h_dr_get (current_cpu, +// OBSOLETE decode_gdb_dr_regnum (rn))); +// OBSOLETE break; +// OBSOLETE default : +// OBSOLETE return 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE return -1; /*FIXME*/ +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* The contents of BUF are in target byte order. */ +// OBSOLETE +// OBSOLETE int +// OBSOLETE fr30bf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +// OBSOLETE { +// OBSOLETE if (rn < 16) +// OBSOLETE fr30bf_h_gr_set (current_cpu, rn, GETTWI (buf)); +// OBSOLETE else +// OBSOLETE switch (rn) +// OBSOLETE { +// OBSOLETE case PC_REGNUM : +// OBSOLETE fr30bf_h_pc_set (current_cpu, GETTWI (buf)); +// OBSOLETE break; +// OBSOLETE case PS_REGNUM : +// OBSOLETE fr30bf_h_ps_set (current_cpu, GETTWI (buf)); +// OBSOLETE break; +// OBSOLETE case TBR_REGNUM : +// OBSOLETE case RP_REGNUM : +// OBSOLETE case SSP_REGNUM : +// OBSOLETE case USP_REGNUM : +// OBSOLETE case MDH_REGNUM : +// OBSOLETE case MDL_REGNUM : +// OBSOLETE fr30bf_h_dr_set (current_cpu, +// OBSOLETE decode_gdb_dr_regnum (rn), +// OBSOLETE GETTWI (buf)); +// OBSOLETE break; +// OBSOLETE default : +// OBSOLETE return 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE return -1; /*FIXME*/ +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Cover fns to access the ccr bits. */ +// OBSOLETE +// OBSOLETE BI +// OBSOLETE fr30bf_h_sbit_get_handler (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_sbit); +// OBSOLETE } +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_sbit_set_handler (SIM_CPU *current_cpu, BI newval) +// OBSOLETE { +// OBSOLETE int old_sbit = CPU (h_sbit); +// OBSOLETE int new_sbit = (newval != 0); +// OBSOLETE +// OBSOLETE CPU (h_sbit) = new_sbit; +// OBSOLETE +// OBSOLETE /* When switching stack modes, update the registers. */ +// OBSOLETE if (old_sbit != new_sbit) +// OBSOLETE { +// OBSOLETE if (old_sbit) +// OBSOLETE { +// OBSOLETE /* Switching user -> system. */ +// OBSOLETE CPU (h_dr[H_DR_USP]) = CPU (h_gr[H_GR_SP]); +// OBSOLETE CPU (h_gr[H_GR_SP]) = CPU (h_dr[H_DR_SSP]); +// OBSOLETE } +// OBSOLETE else +// OBSOLETE { +// OBSOLETE /* Switching system -> user. */ +// OBSOLETE CPU (h_dr[H_DR_SSP]) = CPU (h_gr[H_GR_SP]); +// OBSOLETE CPU (h_gr[H_GR_SP]) = CPU (h_dr[H_DR_USP]); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* TODO: r15 interlock */ +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Cover fns to access the ccr bits. */ +// OBSOLETE +// OBSOLETE UQI +// OBSOLETE fr30bf_h_ccr_get_handler (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE int ccr = ( (GET_H_CBIT () << 0) +// OBSOLETE | (GET_H_VBIT () << 1) +// OBSOLETE | (GET_H_ZBIT () << 2) +// OBSOLETE | (GET_H_NBIT () << 3) +// OBSOLETE | (GET_H_IBIT () << 4) +// OBSOLETE | (GET_H_SBIT () << 5)); +// OBSOLETE +// OBSOLETE return ccr; +// OBSOLETE } +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_ccr_set_handler (SIM_CPU *current_cpu, UQI newval) +// OBSOLETE { +// OBSOLETE int ccr = newval & 0x3f; +// OBSOLETE +// OBSOLETE SET_H_CBIT ((ccr & 1) != 0); +// OBSOLETE SET_H_VBIT ((ccr & 2) != 0); +// OBSOLETE SET_H_ZBIT ((ccr & 4) != 0); +// OBSOLETE SET_H_NBIT ((ccr & 8) != 0); +// OBSOLETE SET_H_IBIT ((ccr & 0x10) != 0); +// OBSOLETE SET_H_SBIT ((ccr & 0x20) != 0); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Cover fns to access the scr bits. */ +// OBSOLETE +// OBSOLETE UQI +// OBSOLETE fr30bf_h_scr_get_handler (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE int scr = ( (GET_H_TBIT () << 0) +// OBSOLETE | (GET_H_D0BIT () << 1) +// OBSOLETE | (GET_H_D1BIT () << 2)); +// OBSOLETE return scr; +// OBSOLETE } +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_scr_set_handler (SIM_CPU *current_cpu, UQI newval) +// OBSOLETE { +// OBSOLETE int scr = newval & 7; +// OBSOLETE +// OBSOLETE SET_H_TBIT ((scr & 1) != 0); +// OBSOLETE SET_H_D0BIT ((scr & 2) != 0); +// OBSOLETE SET_H_D1BIT ((scr & 4) != 0); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Cover fns to access the ilm bits. */ +// OBSOLETE +// OBSOLETE UQI +// OBSOLETE fr30bf_h_ilm_get_handler (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE return CPU (h_ilm); +// OBSOLETE } +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_ilm_set_handler (SIM_CPU *current_cpu, UQI newval) +// OBSOLETE { +// OBSOLETE int ilm = newval & 0x1f; +// OBSOLETE int current_ilm = CPU (h_ilm); +// OBSOLETE +// OBSOLETE /* We can only set new ilm values < 16 if the current ilm is < 16. Otherwise +// OBSOLETE we add 16 to the value we are given. */ +// OBSOLETE if (current_ilm >= 16 && ilm < 16) +// OBSOLETE ilm += 16; +// OBSOLETE +// OBSOLETE CPU (h_ilm) = ilm; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Cover fns to access the ps register. */ +// OBSOLETE +// OBSOLETE USI +// OBSOLETE fr30bf_h_ps_get_handler (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE int ccr = GET_H_CCR (); +// OBSOLETE int scr = GET_H_SCR (); +// OBSOLETE int ilm = GET_H_ILM (); +// OBSOLETE +// OBSOLETE return ccr | (scr << 8) | (ilm << 16); +// OBSOLETE } +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_ps_set_handler (SIM_CPU *current_cpu, USI newval) +// OBSOLETE { +// OBSOLETE int ccr = newval & 0xff; +// OBSOLETE int scr = (newval >> 8) & 7; +// OBSOLETE int ilm = (newval >> 16) & 0x1f; +// OBSOLETE +// OBSOLETE SET_H_CCR (ccr); +// OBSOLETE SET_H_SCR (scr); +// OBSOLETE SET_H_ILM (ilm); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Cover fns to access the dedicated registers. */ +// OBSOLETE +// OBSOLETE SI +// OBSOLETE fr30bf_h_dr_get_handler (SIM_CPU *current_cpu, UINT dr) +// OBSOLETE { +// OBSOLETE switch (dr) +// OBSOLETE { +// OBSOLETE case H_DR_SSP : +// OBSOLETE if (! GET_H_SBIT ()) +// OBSOLETE return GET_H_GR (H_GR_SP); +// OBSOLETE else +// OBSOLETE return CPU (h_dr[H_DR_SSP]); +// OBSOLETE case H_DR_USP : +// OBSOLETE if (GET_H_SBIT ()) +// OBSOLETE return GET_H_GR (H_GR_SP); +// OBSOLETE else +// OBSOLETE return CPU (h_dr[H_DR_USP]); +// OBSOLETE case H_DR_TBR : +// OBSOLETE case H_DR_RP : +// OBSOLETE case H_DR_MDH : +// OBSOLETE case H_DR_MDL : +// OBSOLETE return CPU (h_dr[dr]); +// OBSOLETE } +// OBSOLETE return 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_h_dr_set_handler (SIM_CPU *current_cpu, UINT dr, SI newval) +// OBSOLETE { +// OBSOLETE switch (dr) +// OBSOLETE { +// OBSOLETE case H_DR_SSP : +// OBSOLETE if (! GET_H_SBIT ()) +// OBSOLETE SET_H_GR (H_GR_SP, newval); +// OBSOLETE else +// OBSOLETE CPU (h_dr[H_DR_SSP]) = newval; +// OBSOLETE break; +// OBSOLETE case H_DR_USP : +// OBSOLETE if (GET_H_SBIT ()) +// OBSOLETE SET_H_GR (H_GR_SP, newval); +// OBSOLETE else +// OBSOLETE CPU (h_dr[H_DR_USP]) = newval; +// OBSOLETE break; +// OBSOLETE case H_DR_TBR : +// OBSOLETE case H_DR_RP : +// OBSOLETE case H_DR_MDH : +// OBSOLETE case H_DR_MDL : +// OBSOLETE CPU (h_dr[dr]) = newval; +// OBSOLETE break; +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE +// OBSOLETE /* FIXME: Some of these should be inline or macros. Later. */ +// OBSOLETE +// OBSOLETE /* Initialize cycle counting for an insn. +// OBSOLETE FIRST_P is non-zero if this is the first insn in a set of parallel +// OBSOLETE insns. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_model_insn_before (SIM_CPU *cpu, int first_p) +// OBSOLETE { +// OBSOLETE MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); +// OBSOLETE d->load_regs_pending = 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Record the cycles computed for an insn. +// OBSOLETE LAST_P is non-zero if this is the last insn in a set of parallel insns, +// OBSOLETE and we update the total cycle count. +// OBSOLETE CYCLES is the cycle count of the insn. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30bf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles) +// OBSOLETE { +// OBSOLETE PROFILE_DATA *p = CPU_PROFILE_DATA (cpu); +// OBSOLETE MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); +// OBSOLETE +// OBSOLETE PROFILE_MODEL_TOTAL_CYCLES (p) += cycles; +// OBSOLETE PROFILE_MODEL_CUR_INSN_CYCLES (p) = cycles; +// OBSOLETE d->load_regs = d->load_regs_pending; +// OBSOLETE } +// OBSOLETE +// OBSOLETE static INLINE int +// OBSOLETE check_load_stall (SIM_CPU *cpu, int regno) +// OBSOLETE { +// OBSOLETE const MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); +// OBSOLETE UINT load_regs = d->load_regs; +// OBSOLETE +// OBSOLETE if (regno != -1 +// OBSOLETE && (load_regs & (1 << regno)) != 0) +// OBSOLETE { +// OBSOLETE PROFILE_DATA *p = CPU_PROFILE_DATA (cpu); +// OBSOLETE ++ PROFILE_MODEL_LOAD_STALL_CYCLES (p); +// OBSOLETE if (TRACE_INSN_P (cpu)) +// OBSOLETE cgen_trace_printf (cpu, " ; Load stall."); +// OBSOLETE return 1; +// OBSOLETE } +// OBSOLETE else +// OBSOLETE return 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE int +// OBSOLETE fr30bf_model_fr30_1_u_exec (SIM_CPU *cpu, const IDESC *idesc, +// OBSOLETE int unit_num, int referenced, +// OBSOLETE INT in_Ri, INT in_Rj, INT out_Ri) +// OBSOLETE { +// OBSOLETE int cycles = idesc->timing->units[unit_num].done; +// OBSOLETE cycles += check_load_stall (cpu, in_Ri); +// OBSOLETE cycles += check_load_stall (cpu, in_Rj); +// OBSOLETE return cycles; +// OBSOLETE } +// OBSOLETE +// OBSOLETE int +// OBSOLETE fr30bf_model_fr30_1_u_cti (SIM_CPU *cpu, const IDESC *idesc, +// OBSOLETE int unit_num, int referenced, +// OBSOLETE INT in_Ri) +// OBSOLETE { +// OBSOLETE PROFILE_DATA *p = CPU_PROFILE_DATA (cpu); +// OBSOLETE /* (1 << 1): The pc is the 2nd element in inputs, outputs. +// OBSOLETE ??? can be cleaned up */ +// OBSOLETE int taken_p = (referenced & (1 << 1)) != 0; +// OBSOLETE int cycles = idesc->timing->units[unit_num].done; +// OBSOLETE int delay_slot_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT); +// OBSOLETE +// OBSOLETE cycles += check_load_stall (cpu, in_Ri); +// OBSOLETE if (taken_p) +// OBSOLETE { +// OBSOLETE /* ??? Handling cti's without delay slots this way will run afoul of +// OBSOLETE accurate system simulation. Later. */ +// OBSOLETE if (! delay_slot_p) +// OBSOLETE { +// OBSOLETE ++cycles; +// OBSOLETE ++PROFILE_MODEL_CTI_STALL_CYCLES (p); +// OBSOLETE } +// OBSOLETE ++PROFILE_MODEL_TAKEN_COUNT (p); +// OBSOLETE } +// OBSOLETE else +// OBSOLETE ++PROFILE_MODEL_UNTAKEN_COUNT (p); +// OBSOLETE +// OBSOLETE return cycles; +// OBSOLETE } +// OBSOLETE +// OBSOLETE int +// OBSOLETE fr30bf_model_fr30_1_u_load (SIM_CPU *cpu, const IDESC *idesc, +// OBSOLETE int unit_num, int referenced, +// OBSOLETE INT in_Rj, INT out_Ri) +// OBSOLETE { +// OBSOLETE MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); +// OBSOLETE int cycles = idesc->timing->units[unit_num].done; +// OBSOLETE d->load_regs_pending |= 1 << out_Ri; +// OBSOLETE cycles += check_load_stall (cpu, in_Rj); +// OBSOLETE return cycles; +// OBSOLETE } +// OBSOLETE +// OBSOLETE int +// OBSOLETE fr30bf_model_fr30_1_u_store (SIM_CPU *cpu, const IDESC *idesc, +// OBSOLETE int unit_num, int referenced, +// OBSOLETE INT in_Ri, INT in_Rj) +// OBSOLETE { +// OBSOLETE int cycles = idesc->timing->units[unit_num].done; +// OBSOLETE cycles += check_load_stall (cpu, in_Ri); +// OBSOLETE cycles += check_load_stall (cpu, in_Rj); +// OBSOLETE return cycles; +// OBSOLETE } +// OBSOLETE +// OBSOLETE int +// OBSOLETE fr30bf_model_fr30_1_u_ldm (SIM_CPU *cpu, const IDESC *idesc, +// OBSOLETE int unit_num, int referenced, +// OBSOLETE INT reglist) +// OBSOLETE { +// OBSOLETE return idesc->timing->units[unit_num].done; +// OBSOLETE } +// OBSOLETE +// OBSOLETE int +// OBSOLETE fr30bf_model_fr30_1_u_stm (SIM_CPU *cpu, const IDESC *idesc, +// OBSOLETE int unit_num, int referenced, +// OBSOLETE INT reglist) +// OBSOLETE { +// OBSOLETE return idesc->timing->units[unit_num].done; +// OBSOLETE } +// OBSOLETE +// OBSOLETE #endif /* WITH_PROFILE_MODEL_P */ diff --git a/sim/fr30/mloop.in b/sim/fr30/mloop.in index 1a82d83..f161bb1 100644 --- a/sim/fr30/mloop.in +++ b/sim/fr30/mloop.in @@ -1,236 +1,236 @@ -# Simulator main loop for fr30. -*- C -*- -# Copyright (C) 1998, 1999 Free Software Foundation, Inc. -# Contributed by Cygnus Solutions. -# -# This file is part of the GNU Simulators. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -# Syntax: -# /bin/sh mainloop.in command -# -# Command is one of: -# -# init -# support -# extract-{simple,scache,pbb} -# {full,fast}-exec-{simple,scache,pbb} -# -# A target need only provide a "full" version of one of simple,scache,pbb. -# If the target wants it can also provide a fast version of same. -# It can't provide more than this, however for illustration's sake the FR30 -# port provides examples of all. - -# ??? After a few more ports are done, revisit. -# Will eventually need to machine generate a lot of this. - -case "x$1" in - -xsupport) - -cat <<EOF - -static INLINE const IDESC * -extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf, - int fast_p) -{ - const IDESC *id = @cpu@_decode (current_cpu, pc, insn, abuf); - @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p); - if (! fast_p) - { - int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); - int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); - @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); - } - return id; -} - -static INLINE SEM_PC -execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) -{ - SEM_PC vpc; - - if (fast_p) - { -#if ! WITH_SEM_SWITCH_FAST -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf); -#endif -#else - abort (); -#endif /* WITH_SEM_SWITCH_FAST */ - } - else - { -#if ! WITH_SEM_SWITCH_FULL - ARGBUF *abuf = &sc->argbuf; - const IDESC *idesc = abuf->idesc; -#if WITH_SCACHE_PBB - int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL); -#else - int virtual_p = 0; -#endif - - if (! virtual_p) - { - /* FIXME: call x-before */ - if (ARGBUF_PROFILE_P (abuf)) - PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num); - /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (abuf)) - @cpu@_model_insn_before (current_cpu, 1 /*first_p*/); - TRACE_INSN_INIT (current_cpu, abuf, 1); - TRACE_INSN (current_cpu, idesc->idata, - (const struct argbuf *) abuf, abuf->addr); - } -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf); -#endif - if (! virtual_p) - { - /* FIXME: call x-after */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (abuf)) - { - int cycles; - - cycles = (*idesc->timing->model_fn) (current_cpu, sc); - @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles); - } - TRACE_INSN_FINI (current_cpu, abuf, 1); - } -#else - abort (); -#endif /* WITH_SEM_SWITCH_FULL */ - } - - return vpc; -} - -EOF - -;; - -xinit) - -cat <<EOF -/*xxxinit*/ -EOF - -;; - -xextract-simple | xextract-scache) - -# Inputs: current_cpu, vpc, sc, FAST_P -# Outputs: sc filled in - -cat <<EOF -{ - CGEN_INSN_INT insn = GETIMEMUHI (current_cpu, vpc); - extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P); -} -EOF - -;; - -xextract-pbb) - -# Inputs: current_cpu, pc, sc, max_insns, FAST_P -# Outputs: sc, pc -# sc must be left pointing past the last created entry. -# pc must be left pointing past the last created entry. -# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called -# to record the vpc of the cti insn. -# SET_INSN_COUNT(n) must be called to record number of real insns. - -cat <<EOF -{ - const IDESC *idesc; - int icount = 0; - - while (max_insns > 0) - { - UHI insn = GETIMEMUHI (current_cpu, pc); - idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); - ++sc; - --max_insns; - ++icount; - pc += idesc->length; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - - /* Delay slot? */ - /* ??? breakpoints in delay slots */ - if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT)) - { - UHI insn = GETIMEMUHI (current_cpu, pc); - idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); - if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_NOT_IN_DELAY_SLOT)) - { - /* malformed program */ - sim_io_eprintf (CPU_STATE (current_cpu), - "malformed program, \`%s' insn in delay slot\n", - CGEN_INSN_NAME (idesc->idata)); - } - else - { - ++sc; - --max_insns; - ++icount; - pc += idesc->length; - } - } - break; - } - } - - Finish: - SET_INSN_COUNT (icount); -} -EOF - -;; - -xfull-exec-* | xfast-exec-*) - -# Inputs: current_cpu, sc, FAST_P -# Outputs: vpc -# vpc contains the address of the next insn to execute - -cat <<EOF -{ -#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) -#define DEFINE_SWITCH -#include "sem-switch.c" -#else - vpc = execute (current_cpu, vpc, FAST_P); -#endif -} -EOF - -;; - -*) - echo "Invalid argument to mainloop.in: $1" >&2 - exit 1 - ;; - -esac +# OBSOLETE # Simulator main loop for fr30. -*- C -*- +# OBSOLETE # Copyright (C) 1998, 1999 Free Software Foundation, Inc. +# OBSOLETE # Contributed by Cygnus Solutions. +# OBSOLETE # +# OBSOLETE # This file is part of the GNU Simulators. +# OBSOLETE # +# OBSOLETE # This program is free software; you can redistribute it and/or modify +# OBSOLETE # it under the terms of the GNU General Public License as published by +# OBSOLETE # the Free Software Foundation; either version 2, or (at your option) +# OBSOLETE # any later version. +# OBSOLETE # +# OBSOLETE # This program is distributed in the hope that it will be useful, +# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of +# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# OBSOLETE # GNU General Public License for more details. +# OBSOLETE # +# OBSOLETE # You should have received a copy of the GNU General Public License along +# OBSOLETE # with this program; if not, write to the Free Software Foundation, Inc., +# OBSOLETE # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# OBSOLETE +# OBSOLETE # Syntax: +# OBSOLETE # /bin/sh mainloop.in command +# OBSOLETE # +# OBSOLETE # Command is one of: +# OBSOLETE # +# OBSOLETE # init +# OBSOLETE # support +# OBSOLETE # extract-{simple,scache,pbb} +# OBSOLETE # {full,fast}-exec-{simple,scache,pbb} +# OBSOLETE # +# OBSOLETE # A target need only provide a "full" version of one of simple,scache,pbb. +# OBSOLETE # If the target wants it can also provide a fast version of same. +# OBSOLETE # It can't provide more than this, however for illustration's sake the FR30 +# OBSOLETE # port provides examples of all. +# OBSOLETE +# OBSOLETE # ??? After a few more ports are done, revisit. +# OBSOLETE # Will eventually need to machine generate a lot of this. +# OBSOLETE +# OBSOLETE case "x$1" in +# OBSOLETE +# OBSOLETE xsupport) +# OBSOLETE +# OBSOLETE cat <<EOF +# OBSOLETE +# OBSOLETE static INLINE const IDESC * +# OBSOLETE extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf, +# OBSOLETE int fast_p) +# OBSOLETE { +# OBSOLETE const IDESC *id = @cpu@_decode (current_cpu, pc, insn, abuf); +# OBSOLETE @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p); +# OBSOLETE if (! fast_p) +# OBSOLETE { +# OBSOLETE int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); +# OBSOLETE int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); +# OBSOLETE @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); +# OBSOLETE } +# OBSOLETE return id; +# OBSOLETE } +# OBSOLETE +# OBSOLETE static INLINE SEM_PC +# OBSOLETE execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) +# OBSOLETE { +# OBSOLETE SEM_PC vpc; +# OBSOLETE +# OBSOLETE if (fast_p) +# OBSOLETE { +# OBSOLETE #if ! WITH_SEM_SWITCH_FAST +# OBSOLETE #if WITH_SCACHE +# OBSOLETE vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc); +# OBSOLETE #else +# OBSOLETE vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf); +# OBSOLETE #endif +# OBSOLETE #else +# OBSOLETE abort (); +# OBSOLETE #endif /* WITH_SEM_SWITCH_FAST */ +# OBSOLETE } +# OBSOLETE else +# OBSOLETE { +# OBSOLETE #if ! WITH_SEM_SWITCH_FULL +# OBSOLETE ARGBUF *abuf = &sc->argbuf; +# OBSOLETE const IDESC *idesc = abuf->idesc; +# OBSOLETE #if WITH_SCACHE_PBB +# OBSOLETE int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL); +# OBSOLETE #else +# OBSOLETE int virtual_p = 0; +# OBSOLETE #endif +# OBSOLETE +# OBSOLETE if (! virtual_p) +# OBSOLETE { +# OBSOLETE /* FIXME: call x-before */ +# OBSOLETE if (ARGBUF_PROFILE_P (abuf)) +# OBSOLETE PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num); +# OBSOLETE /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ +# OBSOLETE if (PROFILE_MODEL_P (current_cpu) +# OBSOLETE && ARGBUF_PROFILE_P (abuf)) +# OBSOLETE @cpu@_model_insn_before (current_cpu, 1 /*first_p*/); +# OBSOLETE TRACE_INSN_INIT (current_cpu, abuf, 1); +# OBSOLETE TRACE_INSN (current_cpu, idesc->idata, +# OBSOLETE (const struct argbuf *) abuf, abuf->addr); +# OBSOLETE } +# OBSOLETE #if WITH_SCACHE +# OBSOLETE vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc); +# OBSOLETE #else +# OBSOLETE vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf); +# OBSOLETE #endif +# OBSOLETE if (! virtual_p) +# OBSOLETE { +# OBSOLETE /* FIXME: call x-after */ +# OBSOLETE if (PROFILE_MODEL_P (current_cpu) +# OBSOLETE && ARGBUF_PROFILE_P (abuf)) +# OBSOLETE { +# OBSOLETE int cycles; +# OBSOLETE +# OBSOLETE cycles = (*idesc->timing->model_fn) (current_cpu, sc); +# OBSOLETE @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles); +# OBSOLETE } +# OBSOLETE TRACE_INSN_FINI (current_cpu, abuf, 1); +# OBSOLETE } +# OBSOLETE #else +# OBSOLETE abort (); +# OBSOLETE #endif /* WITH_SEM_SWITCH_FULL */ +# OBSOLETE } +# OBSOLETE +# OBSOLETE return vpc; +# OBSOLETE } +# OBSOLETE +# OBSOLETE EOF +# OBSOLETE +# OBSOLETE ;; +# OBSOLETE +# OBSOLETE xinit) +# OBSOLETE +# OBSOLETE cat <<EOF +# OBSOLETE /*xxxinit*/ +# OBSOLETE EOF +# OBSOLETE +# OBSOLETE ;; +# OBSOLETE +# OBSOLETE xextract-simple | xextract-scache) +# OBSOLETE +# OBSOLETE # Inputs: current_cpu, vpc, sc, FAST_P +# OBSOLETE # Outputs: sc filled in +# OBSOLETE +# OBSOLETE cat <<EOF +# OBSOLETE { +# OBSOLETE CGEN_INSN_INT insn = GETIMEMUHI (current_cpu, vpc); +# OBSOLETE extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P); +# OBSOLETE } +# OBSOLETE EOF +# OBSOLETE +# OBSOLETE ;; +# OBSOLETE +# OBSOLETE xextract-pbb) +# OBSOLETE +# OBSOLETE # Inputs: current_cpu, pc, sc, max_insns, FAST_P +# OBSOLETE # Outputs: sc, pc +# OBSOLETE # sc must be left pointing past the last created entry. +# OBSOLETE # pc must be left pointing past the last created entry. +# OBSOLETE # If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called +# OBSOLETE # to record the vpc of the cti insn. +# OBSOLETE # SET_INSN_COUNT(n) must be called to record number of real insns. +# OBSOLETE +# OBSOLETE cat <<EOF +# OBSOLETE { +# OBSOLETE const IDESC *idesc; +# OBSOLETE int icount = 0; +# OBSOLETE +# OBSOLETE while (max_insns > 0) +# OBSOLETE { +# OBSOLETE UHI insn = GETIMEMUHI (current_cpu, pc); +# OBSOLETE idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); +# OBSOLETE ++sc; +# OBSOLETE --max_insns; +# OBSOLETE ++icount; +# OBSOLETE pc += idesc->length; +# OBSOLETE if (IDESC_CTI_P (idesc)) +# OBSOLETE { +# OBSOLETE SET_CTI_VPC (sc - 1); +# OBSOLETE +# OBSOLETE /* Delay slot? */ +# OBSOLETE /* ??? breakpoints in delay slots */ +# OBSOLETE if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT)) +# OBSOLETE { +# OBSOLETE UHI insn = GETIMEMUHI (current_cpu, pc); +# OBSOLETE idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); +# OBSOLETE if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_NOT_IN_DELAY_SLOT)) +# OBSOLETE { +# OBSOLETE /* malformed program */ +# OBSOLETE sim_io_eprintf (CPU_STATE (current_cpu), +# OBSOLETE "malformed program, \`%s' insn in delay slot\n", +# OBSOLETE CGEN_INSN_NAME (idesc->idata)); +# OBSOLETE } +# OBSOLETE else +# OBSOLETE { +# OBSOLETE ++sc; +# OBSOLETE --max_insns; +# OBSOLETE ++icount; +# OBSOLETE pc += idesc->length; +# OBSOLETE } +# OBSOLETE } +# OBSOLETE break; +# OBSOLETE } +# OBSOLETE } +# OBSOLETE +# OBSOLETE Finish: +# OBSOLETE SET_INSN_COUNT (icount); +# OBSOLETE } +# OBSOLETE EOF +# OBSOLETE +# OBSOLETE ;; +# OBSOLETE +# OBSOLETE xfull-exec-* | xfast-exec-*) +# OBSOLETE +# OBSOLETE # Inputs: current_cpu, sc, FAST_P +# OBSOLETE # Outputs: vpc +# OBSOLETE # vpc contains the address of the next insn to execute +# OBSOLETE +# OBSOLETE cat <<EOF +# OBSOLETE { +# OBSOLETE #if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) +# OBSOLETE #define DEFINE_SWITCH +# OBSOLETE #include "sem-switch.c" +# OBSOLETE #else +# OBSOLETE vpc = execute (current_cpu, vpc, FAST_P); +# OBSOLETE #endif +# OBSOLETE } +# OBSOLETE EOF +# OBSOLETE +# OBSOLETE ;; +# OBSOLETE +# OBSOLETE *) +# OBSOLETE echo "Invalid argument to mainloop.in: $1" >&2 +# OBSOLETE exit 1 +# OBSOLETE ;; +# OBSOLETE +# OBSOLETE esac diff --git a/sim/fr30/model.c b/sim/fr30/model.c index a90f340..15a1ecc 100644 --- a/sim/fr30/model.c +++ b/sim/fr30/model.c @@ -1,4004 +1,4003 @@ -/* Simulator model support for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU fr30bf -#define WANT_CPU_FR30BF - -#include "sim-main.h" - -/* The profiling data is recorded here, but is accessed via the profiling - mechanism. After all, this is information for profiling. */ - -#if WITH_PROFILE_MODEL_P - -/* Model handlers for each insn. */ - -static int -model_fr30_1_add (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_add2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addn (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addni (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addn2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_sub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_subc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_subn (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_cmp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_cmpi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_cmp2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_and (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_or (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_eor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_andm (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_andh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_andb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_orm (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_orh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_orb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_eorm (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_eorh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_eorb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bandl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_borl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_beorl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bandh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_borh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_beorh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_btstl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 1, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_btsth (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 1, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mul (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mulu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mulh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_muluh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div0s (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div0u (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div4s (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsli (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsl2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsri (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsr2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_asr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_asri (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_asr2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldi8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldi20 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi20.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldi32 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi32.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ld (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lduh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr13 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr13uh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr13ub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr14 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr14uh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14uh.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr14ub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14ub.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr15 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr15gr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15gr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr15dr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr15ps (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_st (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_sth (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_stb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str13 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str13h (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str13b (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str14 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str14h (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14h.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str14b (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14b.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str15 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str15.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str15gr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str15gr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str15dr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str15ps (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mov (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_movdr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movdr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_movps (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movdr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mov2dr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mov2ps (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_jmp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_jmpd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_callr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_callrd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_call (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_call.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_calld (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_call.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ret (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ret_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_int (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_inte (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_reti (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_brad (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bra (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bnod (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bno (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_beqd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_beq (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bned (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bne (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bcd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bncd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bnc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bnd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bn (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bpd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bvd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bnvd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bnv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bltd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_blt (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bged (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bge (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bled (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ble (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bgtd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bgt (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_blsd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bls (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bhid (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bhi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13h (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13b (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13pi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13pih (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13pib (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr15pi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13h (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13b (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13pi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13pih (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13pib (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r15pd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldres (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_stres (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_copop (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_copld (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_copst (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_copsv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_nop (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_andccr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_orccr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_stilm (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addsp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_extsb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_extub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_extsh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_extuh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldm0 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldm0.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_reglist = 0; - cycles += fr30bf_model_fr30_1_u_ldm (current_cpu, idesc, 0, referenced, in_reglist); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldm1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldm1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_reglist = 0; - cycles += fr30bf_model_fr30_1_u_ldm (current_cpu, idesc, 0, referenced, in_reglist); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_stm0 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stm0.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_reglist = 0; - cycles += fr30bf_model_fr30_1_u_stm (current_cpu, idesc, 0, referenced, in_reglist); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_stm1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stm1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_reglist = 0; - cycles += fr30bf_model_fr30_1_u_stm (current_cpu, idesc, 0, referenced, in_reglist); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_enter (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_enter.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_leave (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_enter.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_xchb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -/* We assume UNIT_NONE == 0 because the tables don't always terminate - entries with it. */ - -/* Model timing data for `fr30-1'. */ - -static const INSN_TIMING fr30_1_timing[] = { - { FR30BF_INSN_X_INVALID, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_X_AFTER, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_X_BEFORE, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_X_CHAIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_X_BEGIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADD, model_fr30_1_add, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDI, model_fr30_1_addi, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADD2, model_fr30_1_add2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDC, model_fr30_1_addc, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDN, model_fr30_1_addn, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDNI, model_fr30_1_addni, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDN2, model_fr30_1_addn2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_SUB, model_fr30_1_sub, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_SUBC, model_fr30_1_subc, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_SUBN, model_fr30_1_subn, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_CMP, model_fr30_1_cmp, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_CMPI, model_fr30_1_cmpi, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_CMP2, model_fr30_1_cmp2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_AND, model_fr30_1_and, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_OR, model_fr30_1_or, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_EOR, model_fr30_1_eor, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ANDM, model_fr30_1_andm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_ANDH, model_fr30_1_andh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_ANDB, model_fr30_1_andb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_ORM, model_fr30_1_orm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_ORH, model_fr30_1_orh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_ORB, model_fr30_1_orb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_EORM, model_fr30_1_eorm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_EORH, model_fr30_1_eorh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_EORB, model_fr30_1_eorb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BANDL, model_fr30_1_bandl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BORL, model_fr30_1_borl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BEORL, model_fr30_1_beorl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BANDH, model_fr30_1_bandh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BORH, model_fr30_1_borh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BEORH, model_fr30_1_beorh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BTSTL, model_fr30_1_btstl, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, - { FR30BF_INSN_BTSTH, model_fr30_1_btsth, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, - { FR30BF_INSN_MUL, model_fr30_1_mul, { { (int) UNIT_FR30_1_U_EXEC, 1, 5 } } }, - { FR30BF_INSN_MULU, model_fr30_1_mulu, { { (int) UNIT_FR30_1_U_EXEC, 1, 5 } } }, - { FR30BF_INSN_MULH, model_fr30_1_mulh, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } }, - { FR30BF_INSN_MULUH, model_fr30_1_muluh, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } }, - { FR30BF_INSN_DIV0S, model_fr30_1_div0s, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_DIV0U, model_fr30_1_div0u, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_DIV1, model_fr30_1_div1, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_DIV2, model_fr30_1_div2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_DIV3, model_fr30_1_div3, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_DIV4S, model_fr30_1_div4s, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSL, model_fr30_1_lsl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSLI, model_fr30_1_lsli, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSL2, model_fr30_1_lsl2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSR, model_fr30_1_lsr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSRI, model_fr30_1_lsri, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSR2, model_fr30_1_lsr2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ASR, model_fr30_1_asr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ASRI, model_fr30_1_asri, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ASR2, model_fr30_1_asr2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LDI8, model_fr30_1_ldi8, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LDI20, model_fr30_1_ldi20, { { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, - { FR30BF_INSN_LDI32, model_fr30_1_ldi32, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } }, - { FR30BF_INSN_LD, model_fr30_1_ld, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDUH, model_fr30_1_lduh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDUB, model_fr30_1_ldub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR13, model_fr30_1_ldr13, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR13UH, model_fr30_1_ldr13uh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR13UB, model_fr30_1_ldr13ub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR14, model_fr30_1_ldr14, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR14UH, model_fr30_1_ldr14uh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR14UB, model_fr30_1_ldr14ub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR15, model_fr30_1_ldr15, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR15GR, model_fr30_1_ldr15gr, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR15DR, model_fr30_1_ldr15dr, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR15PS, model_fr30_1_ldr15ps, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_ST, model_fr30_1_st, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STH, model_fr30_1_sth, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STB, model_fr30_1_stb, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR13, model_fr30_1_str13, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR13H, model_fr30_1_str13h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR13B, model_fr30_1_str13b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR14, model_fr30_1_str14, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR14H, model_fr30_1_str14h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR14B, model_fr30_1_str14b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR15, model_fr30_1_str15, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR15GR, model_fr30_1_str15gr, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR15DR, model_fr30_1_str15dr, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR15PS, model_fr30_1_str15ps, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_MOV, model_fr30_1_mov, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_MOVDR, model_fr30_1_movdr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_MOVPS, model_fr30_1_movps, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_MOV2DR, model_fr30_1_mov2dr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_MOV2PS, model_fr30_1_mov2ps, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_JMP, model_fr30_1_jmp, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_JMPD, model_fr30_1_jmpd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_CALLR, model_fr30_1_callr, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_CALLRD, model_fr30_1_callrd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_CALL, model_fr30_1_call, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_CALLD, model_fr30_1_calld, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_RET, model_fr30_1_ret, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_RET_D, model_fr30_1_ret_d, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_INT, model_fr30_1_int, { { (int) UNIT_FR30_1_U_EXEC, 1, 6 } } }, - { FR30BF_INSN_INTE, model_fr30_1_inte, { { (int) UNIT_FR30_1_U_EXEC, 1, 6 } } }, - { FR30BF_INSN_RETI, model_fr30_1_reti, { { (int) UNIT_FR30_1_U_EXEC, 1, 4 } } }, - { FR30BF_INSN_BRAD, model_fr30_1_brad, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BRA, model_fr30_1_bra, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNOD, model_fr30_1_bnod, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNO, model_fr30_1_bno, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BEQD, model_fr30_1_beqd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BEQ, model_fr30_1_beq, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNED, model_fr30_1_bned, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNE, model_fr30_1_bne, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BCD, model_fr30_1_bcd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BC, model_fr30_1_bc, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNCD, model_fr30_1_bncd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNC, model_fr30_1_bnc, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BND, model_fr30_1_bnd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BN, model_fr30_1_bn, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BPD, model_fr30_1_bpd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BP, model_fr30_1_bp, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BVD, model_fr30_1_bvd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BV, model_fr30_1_bv, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNVD, model_fr30_1_bnvd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNV, model_fr30_1_bnv, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLTD, model_fr30_1_bltd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLT, model_fr30_1_blt, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BGED, model_fr30_1_bged, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BGE, model_fr30_1_bge, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLED, model_fr30_1_bled, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLE, model_fr30_1_ble, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BGTD, model_fr30_1_bgtd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BGT, model_fr30_1_bgt, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLSD, model_fr30_1_blsd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLS, model_fr30_1_bls, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BHID, model_fr30_1_bhid, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BHI, model_fr30_1_bhi, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_DMOVR13, model_fr30_1_dmovr13, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR13H, model_fr30_1_dmovr13h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR13B, model_fr30_1_dmovr13b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR13PI, model_fr30_1_dmovr13pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR13PIH, model_fr30_1_dmovr13pih, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR13PIB, model_fr30_1_dmovr13pib, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR15PI, model_fr30_1_dmovr15pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13, model_fr30_1_dmov2r13, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13H, model_fr30_1_dmov2r13h, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13B, model_fr30_1_dmov2r13b, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13PI, model_fr30_1_dmov2r13pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13PIH, model_fr30_1_dmov2r13pih, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13PIB, model_fr30_1_dmov2r13pib, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOV2R15PD, model_fr30_1_dmov2r15pd, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_LDRES, model_fr30_1_ldres, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_STRES, model_fr30_1_stres, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_COPOP, model_fr30_1_copop, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_COPLD, model_fr30_1_copld, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_COPST, model_fr30_1_copst, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_COPSV, model_fr30_1_copsv, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_NOP, model_fr30_1_nop, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ANDCCR, model_fr30_1_andccr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ORCCR, model_fr30_1_orccr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_STILM, model_fr30_1_stilm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDSP, model_fr30_1_addsp, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_EXTSB, model_fr30_1_extsb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_EXTUB, model_fr30_1_extub, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_EXTSH, model_fr30_1_extsh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_EXTUH, model_fr30_1_extuh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LDM0, model_fr30_1_ldm0, { { (int) UNIT_FR30_1_U_LDM, 1, 1 } } }, - { FR30BF_INSN_LDM1, model_fr30_1_ldm1, { { (int) UNIT_FR30_1_U_LDM, 1, 1 } } }, - { FR30BF_INSN_STM0, model_fr30_1_stm0, { { (int) UNIT_FR30_1_U_STM, 1, 1 } } }, - { FR30BF_INSN_STM1, model_fr30_1_stm1, { { (int) UNIT_FR30_1_U_STM, 1, 1 } } }, - { FR30BF_INSN_ENTER, model_fr30_1_enter, { { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, - { FR30BF_INSN_LEAVE, model_fr30_1_leave, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_XCHB, model_fr30_1_xchb, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, -}; - -#endif /* WITH_PROFILE_MODEL_P */ - -static void -fr30_1_model_init (SIM_CPU *cpu) -{ - CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_FR30_1_DATA)); -} - -#if WITH_PROFILE_MODEL_P -#define TIMING_DATA(td) td -#else -#define TIMING_DATA(td) 0 -#endif - -static const MODEL fr30_models[] = -{ - { "fr30-1", & fr30_mach, MODEL_FR30_1, TIMING_DATA (& fr30_1_timing[0]), fr30_1_model_init }, - { 0 } -}; - -/* The properties of this cpu's implementation. */ - -static const MACH_IMP_PROPERTIES fr30bf_imp_properties = -{ - sizeof (SIM_CPU), -#if WITH_SCACHE - sizeof (SCACHE) -#else - 0 -#endif -}; - - -static void -fr30bf_prepare_run (SIM_CPU *cpu) -{ - if (CPU_IDESC (cpu) == NULL) - fr30bf_init_idesc_table (cpu); -} - -static const CGEN_INSN * -fr30bf_get_idata (SIM_CPU *cpu, int inum) -{ - return CPU_IDESC (cpu) [inum].idata; -} - -static void -fr30_init_cpu (SIM_CPU *cpu) -{ - CPU_REG_FETCH (cpu) = fr30bf_fetch_register; - CPU_REG_STORE (cpu) = fr30bf_store_register; - CPU_PC_FETCH (cpu) = fr30bf_h_pc_get; - CPU_PC_STORE (cpu) = fr30bf_h_pc_set; - CPU_GET_IDATA (cpu) = fr30bf_get_idata; - CPU_MAX_INSNS (cpu) = FR30BF_INSN_XCHB + 1; - CPU_INSN_NAME (cpu) = cgen_insn_name; - CPU_FULL_ENGINE_FN (cpu) = fr30bf_engine_run_full; -#if WITH_FAST - CPU_FAST_ENGINE_FN (cpu) = fr30bf_engine_run_fast; -#else - CPU_FAST_ENGINE_FN (cpu) = fr30bf_engine_run_full; -#endif -} - -const MACH fr30_mach = -{ - "fr30", "fr30", MACH_FR30, - 32, 32, & fr30_models[0], & fr30bf_imp_properties, - fr30_init_cpu, - fr30bf_prepare_run -}; - +// OBSOLETE /* Simulator model support for fr30bf. +// OBSOLETE +// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN. +// OBSOLETE +// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// OBSOLETE +// OBSOLETE */ +// OBSOLETE +// OBSOLETE #define WANT_CPU fr30bf +// OBSOLETE #define WANT_CPU_FR30BF +// OBSOLETE +// OBSOLETE #include "sim-main.h" +// OBSOLETE +// OBSOLETE /* The profiling data is recorded here, but is accessed via the profiling +// OBSOLETE mechanism. After all, this is information for profiling. */ +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE +// OBSOLETE /* Model handlers for each insn. */ +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_add (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_addi (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_add2 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_addc (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_addn (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_addni (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_addn2 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_sub (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_subc (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_subn (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_cmp (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_cmpi (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_cmp2 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_and (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_or (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_eor (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_andm (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_andh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_andb (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_orm (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_orh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_orb (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_eorm (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_eorh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_eorb (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bandl (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_borl (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_beorl (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bandh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_borh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_beorh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_btstl (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 1, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_btsth (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 1, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_mul (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_mulu (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_mulh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_muluh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_div0s (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_div0u (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_div1 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_div2 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_div3 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_div4s (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_lsl (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_lsli (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_lsl2 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_lsr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_lsri (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_lsr2 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_asr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_asri (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_asr2 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE if (insn_referenced & (1 << 0)) referenced |= 1 << 0; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldi8 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi8.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldi20 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi20.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldi32 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi32.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ld (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_lduh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldub (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldr13 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldr13uh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldr13ub (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldr14 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldr14uh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14uh.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldr14ub (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14ub.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldr15 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldr15gr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15gr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldr15dr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldr15ps (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_st (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_sth (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_stb (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_str13 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_str13h (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_str13b (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_str14 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_str14h (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14h.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_str14b (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14b.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_str15 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str15.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_str15gr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str15gr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_str15dr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_str15ps (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_mov (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_movdr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_movdr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_movps (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_movdr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_mov2dr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_mov2ps (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_jmp (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_jmpd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_callr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_callrd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_call (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_call.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_calld (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_call.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ret (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ret_d (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_int (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_inte (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_reti (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_brad (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bra (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bnod (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bno (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_beqd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_beq (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bned (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bne (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bcd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bc (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bncd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bnc (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bnd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bn (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bpd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bp (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bvd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bv (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bnvd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bnv (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 2)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bltd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 3)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_blt (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 3)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bged (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 3)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bge (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 3)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bled (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 4)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ble (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 4)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bgtd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 4)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bgt (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 4)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_blsd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 3)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bls (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 3)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bhid (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 3)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_bhi (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE if (insn_referenced & (1 << 3)) referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmovr13 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmovr13h (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmovr13b (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmovr13pi (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmovr13pih (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmovr13pib (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmovr15pi (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr15pi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmov2r13 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmov2r13h (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmov2r13b (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmov2r13pi (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmov2r13pih (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmov2r13pib (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_dmov2r15pd (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr15pi.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldres (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_stres (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_copop (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_copld (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_copst (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_copsv (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_nop (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_andccr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_orccr (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_stilm (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_addsp (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_extsb (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_extub (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_extsh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_extuh (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 2; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldm0 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldm0.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_reglist = 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_ldm (current_cpu, idesc, 0, referenced, in_reglist); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_ldm1 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldm1.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_reglist = 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_ldm (current_cpu, idesc, 0, referenced, in_reglist); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_stm0 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_stm0.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_reglist = 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_stm (current_cpu, idesc, 0, referenced, in_reglist); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_stm1 (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_stm1.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_reglist = 0; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_stm (current_cpu, idesc, 0, referenced, in_reglist); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_enter (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_enter.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_leave (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_enter.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE model_fr30_1_xchb (SIM_CPU *current_cpu, void *sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +// OBSOLETE const IDESC * UNUSED idesc = abuf->idesc; +// OBSOLETE int cycles = 0; +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE INT out_Ri = -1; +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE out_Ri = FLD (out_Ri); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE int referenced = 0; +// OBSOLETE int UNUSED insn_referenced = abuf->written; +// OBSOLETE INT in_Ri = -1; +// OBSOLETE INT in_Rj = -1; +// OBSOLETE in_Ri = FLD (in_Ri); +// OBSOLETE in_Rj = FLD (in_Rj); +// OBSOLETE referenced |= 1 << 0; +// OBSOLETE referenced |= 1 << 1; +// OBSOLETE cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); +// OBSOLETE } +// OBSOLETE return cycles; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* We assume UNIT_NONE == 0 because the tables don't always terminate +// OBSOLETE entries with it. */ +// OBSOLETE +// OBSOLETE /* Model timing data for `fr30-1'. */ +// OBSOLETE +// OBSOLETE static const INSN_TIMING fr30_1_timing[] = { +// OBSOLETE { FR30BF_INSN_X_INVALID, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_X_AFTER, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_X_BEFORE, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_X_CHAIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_X_BEGIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ADD, model_fr30_1_add, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ADDI, model_fr30_1_addi, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ADD2, model_fr30_1_add2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ADDC, model_fr30_1_addc, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ADDN, model_fr30_1_addn, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ADDNI, model_fr30_1_addni, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ADDN2, model_fr30_1_addn2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_SUB, model_fr30_1_sub, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_SUBC, model_fr30_1_subc, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_SUBN, model_fr30_1_subn, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_CMP, model_fr30_1_cmp, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_CMPI, model_fr30_1_cmpi, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_CMP2, model_fr30_1_cmp2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_AND, model_fr30_1_and, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_OR, model_fr30_1_or, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_EOR, model_fr30_1_eor, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ANDM, model_fr30_1_andm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ANDH, model_fr30_1_andh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ANDB, model_fr30_1_andb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ORM, model_fr30_1_orm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ORH, model_fr30_1_orh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ORB, model_fr30_1_orb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_EORM, model_fr30_1_eorm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_EORH, model_fr30_1_eorh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_EORB, model_fr30_1_eorb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BANDL, model_fr30_1_bandl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BORL, model_fr30_1_borl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BEORL, model_fr30_1_beorl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BANDH, model_fr30_1_bandh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BORH, model_fr30_1_borh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BEORH, model_fr30_1_beorh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BTSTL, model_fr30_1_btstl, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, +// OBSOLETE { FR30BF_INSN_BTSTH, model_fr30_1_btsth, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, +// OBSOLETE { FR30BF_INSN_MUL, model_fr30_1_mul, { { (int) UNIT_FR30_1_U_EXEC, 1, 5 } } }, +// OBSOLETE { FR30BF_INSN_MULU, model_fr30_1_mulu, { { (int) UNIT_FR30_1_U_EXEC, 1, 5 } } }, +// OBSOLETE { FR30BF_INSN_MULH, model_fr30_1_mulh, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } }, +// OBSOLETE { FR30BF_INSN_MULUH, model_fr30_1_muluh, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } }, +// OBSOLETE { FR30BF_INSN_DIV0S, model_fr30_1_div0s, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DIV0U, model_fr30_1_div0u, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DIV1, model_fr30_1_div1, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DIV2, model_fr30_1_div2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DIV3, model_fr30_1_div3, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DIV4S, model_fr30_1_div4s, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LSL, model_fr30_1_lsl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LSLI, model_fr30_1_lsli, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LSL2, model_fr30_1_lsl2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LSR, model_fr30_1_lsr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LSRI, model_fr30_1_lsri, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LSR2, model_fr30_1_lsr2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ASR, model_fr30_1_asr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ASRI, model_fr30_1_asri, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ASR2, model_fr30_1_asr2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDI8, model_fr30_1_ldi8, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDI20, model_fr30_1_ldi20, { { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, +// OBSOLETE { FR30BF_INSN_LDI32, model_fr30_1_ldi32, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } }, +// OBSOLETE { FR30BF_INSN_LD, model_fr30_1_ld, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDUH, model_fr30_1_lduh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDUB, model_fr30_1_ldub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDR13, model_fr30_1_ldr13, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDR13UH, model_fr30_1_ldr13uh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDR13UB, model_fr30_1_ldr13ub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDR14, model_fr30_1_ldr14, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDR14UH, model_fr30_1_ldr14uh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDR14UB, model_fr30_1_ldr14ub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDR15, model_fr30_1_ldr15, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDR15GR, model_fr30_1_ldr15gr, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDR15DR, model_fr30_1_ldr15dr, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDR15PS, model_fr30_1_ldr15ps, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ST, model_fr30_1_st, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STH, model_fr30_1_sth, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STB, model_fr30_1_stb, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STR13, model_fr30_1_str13, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STR13H, model_fr30_1_str13h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STR13B, model_fr30_1_str13b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STR14, model_fr30_1_str14, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STR14H, model_fr30_1_str14h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STR14B, model_fr30_1_str14b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STR15, model_fr30_1_str15, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STR15GR, model_fr30_1_str15gr, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STR15DR, model_fr30_1_str15dr, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STR15PS, model_fr30_1_str15ps, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_MOV, model_fr30_1_mov, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_MOVDR, model_fr30_1_movdr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_MOVPS, model_fr30_1_movps, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_MOV2DR, model_fr30_1_mov2dr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_MOV2PS, model_fr30_1_mov2ps, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_JMP, model_fr30_1_jmp, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_JMPD, model_fr30_1_jmpd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_CALLR, model_fr30_1_callr, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_CALLRD, model_fr30_1_callrd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_CALL, model_fr30_1_call, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_CALLD, model_fr30_1_calld, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_RET, model_fr30_1_ret, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_RET_D, model_fr30_1_ret_d, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_INT, model_fr30_1_int, { { (int) UNIT_FR30_1_U_EXEC, 1, 6 } } }, +// OBSOLETE { FR30BF_INSN_INTE, model_fr30_1_inte, { { (int) UNIT_FR30_1_U_EXEC, 1, 6 } } }, +// OBSOLETE { FR30BF_INSN_RETI, model_fr30_1_reti, { { (int) UNIT_FR30_1_U_EXEC, 1, 4 } } }, +// OBSOLETE { FR30BF_INSN_BRAD, model_fr30_1_brad, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BRA, model_fr30_1_bra, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BNOD, model_fr30_1_bnod, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BNO, model_fr30_1_bno, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BEQD, model_fr30_1_beqd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BEQ, model_fr30_1_beq, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BNED, model_fr30_1_bned, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BNE, model_fr30_1_bne, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BCD, model_fr30_1_bcd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BC, model_fr30_1_bc, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BNCD, model_fr30_1_bncd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BNC, model_fr30_1_bnc, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BND, model_fr30_1_bnd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BN, model_fr30_1_bn, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BPD, model_fr30_1_bpd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BP, model_fr30_1_bp, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BVD, model_fr30_1_bvd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BV, model_fr30_1_bv, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BNVD, model_fr30_1_bnvd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BNV, model_fr30_1_bnv, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BLTD, model_fr30_1_bltd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BLT, model_fr30_1_blt, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BGED, model_fr30_1_bged, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BGE, model_fr30_1_bge, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BLED, model_fr30_1_bled, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BLE, model_fr30_1_ble, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BGTD, model_fr30_1_bgtd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BGT, model_fr30_1_bgt, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BLSD, model_fr30_1_blsd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BLS, model_fr30_1_bls, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BHID, model_fr30_1_bhid, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_BHI, model_fr30_1_bhi, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOVR13, model_fr30_1_dmovr13, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOVR13H, model_fr30_1_dmovr13h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOVR13B, model_fr30_1_dmovr13b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOVR13PI, model_fr30_1_dmovr13pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOVR13PIH, model_fr30_1_dmovr13pih, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOVR13PIB, model_fr30_1_dmovr13pib, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOVR15PI, model_fr30_1_dmovr15pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOV2R13, model_fr30_1_dmov2r13, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOV2R13H, model_fr30_1_dmov2r13h, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOV2R13B, model_fr30_1_dmov2r13b, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOV2R13PI, model_fr30_1_dmov2r13pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOV2R13PIH, model_fr30_1_dmov2r13pih, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOV2R13PIB, model_fr30_1_dmov2r13pib, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_DMOV2R15PD, model_fr30_1_dmov2r15pd, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDRES, model_fr30_1_ldres, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STRES, model_fr30_1_stres, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_COPOP, model_fr30_1_copop, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_COPLD, model_fr30_1_copld, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_COPST, model_fr30_1_copst, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_COPSV, model_fr30_1_copsv, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_NOP, model_fr30_1_nop, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ANDCCR, model_fr30_1_andccr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ORCCR, model_fr30_1_orccr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STILM, model_fr30_1_stilm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ADDSP, model_fr30_1_addsp, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_EXTSB, model_fr30_1_extsb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_EXTUB, model_fr30_1_extub, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_EXTSH, model_fr30_1_extsh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_EXTUH, model_fr30_1_extuh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDM0, model_fr30_1_ldm0, { { (int) UNIT_FR30_1_U_LDM, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_LDM1, model_fr30_1_ldm1, { { (int) UNIT_FR30_1_U_LDM, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STM0, model_fr30_1_stm0, { { (int) UNIT_FR30_1_U_STM, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_STM1, model_fr30_1_stm1, { { (int) UNIT_FR30_1_U_STM, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_ENTER, model_fr30_1_enter, { { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, +// OBSOLETE { FR30BF_INSN_LEAVE, model_fr30_1_leave, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, +// OBSOLETE { FR30BF_INSN_XCHB, model_fr30_1_xchb, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, +// OBSOLETE }; +// OBSOLETE +// OBSOLETE #endif /* WITH_PROFILE_MODEL_P */ +// OBSOLETE +// OBSOLETE static void +// OBSOLETE fr30_1_model_init (SIM_CPU *cpu) +// OBSOLETE { +// OBSOLETE CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_FR30_1_DATA)); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #if WITH_PROFILE_MODEL_P +// OBSOLETE #define TIMING_DATA(td) td +// OBSOLETE #else +// OBSOLETE #define TIMING_DATA(td) 0 +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE static const MODEL fr30_models[] = +// OBSOLETE { +// OBSOLETE { "fr30-1", & fr30_mach, MODEL_FR30_1, TIMING_DATA (& fr30_1_timing[0]), fr30_1_model_init }, +// OBSOLETE { 0 } +// OBSOLETE }; +// OBSOLETE +// OBSOLETE /* The properties of this cpu's implementation. */ +// OBSOLETE +// OBSOLETE static const MACH_IMP_PROPERTIES fr30bf_imp_properties = +// OBSOLETE { +// OBSOLETE sizeof (SIM_CPU), +// OBSOLETE #if WITH_SCACHE +// OBSOLETE sizeof (SCACHE) +// OBSOLETE #else +// OBSOLETE 0 +// OBSOLETE #endif +// OBSOLETE }; +// OBSOLETE +// OBSOLETE +// OBSOLETE static void +// OBSOLETE fr30bf_prepare_run (SIM_CPU *cpu) +// OBSOLETE { +// OBSOLETE if (CPU_IDESC (cpu) == NULL) +// OBSOLETE fr30bf_init_idesc_table (cpu); +// OBSOLETE } +// OBSOLETE +// OBSOLETE static const CGEN_INSN * +// OBSOLETE fr30bf_get_idata (SIM_CPU *cpu, int inum) +// OBSOLETE { +// OBSOLETE return CPU_IDESC (cpu) [inum].idata; +// OBSOLETE } +// OBSOLETE +// OBSOLETE static void +// OBSOLETE fr30_init_cpu (SIM_CPU *cpu) +// OBSOLETE { +// OBSOLETE CPU_REG_FETCH (cpu) = fr30bf_fetch_register; +// OBSOLETE CPU_REG_STORE (cpu) = fr30bf_store_register; +// OBSOLETE CPU_PC_FETCH (cpu) = fr30bf_h_pc_get; +// OBSOLETE CPU_PC_STORE (cpu) = fr30bf_h_pc_set; +// OBSOLETE CPU_GET_IDATA (cpu) = fr30bf_get_idata; +// OBSOLETE CPU_MAX_INSNS (cpu) = FR30BF_INSN_XCHB + 1; +// OBSOLETE CPU_INSN_NAME (cpu) = cgen_insn_name; +// OBSOLETE CPU_FULL_ENGINE_FN (cpu) = fr30bf_engine_run_full; +// OBSOLETE #if WITH_FAST +// OBSOLETE CPU_FAST_ENGINE_FN (cpu) = fr30bf_engine_run_fast; +// OBSOLETE #else +// OBSOLETE CPU_FAST_ENGINE_FN (cpu) = fr30bf_engine_run_full; +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE const MACH fr30_mach = +// OBSOLETE { +// OBSOLETE "fr30", "fr30", MACH_FR30, +// OBSOLETE 32, 32, & fr30_models[0], & fr30bf_imp_properties, +// OBSOLETE fr30_init_cpu, +// OBSOLETE fr30bf_prepare_run +// OBSOLETE }; diff --git a/sim/fr30/sem-switch.c b/sim/fr30/sem-switch.c index 837e29f..15f3c22 100644 --- a/sim/fr30/sem-switch.c +++ b/sim/fr30/sem-switch.c @@ -1,5409 +1,5409 @@ -/* Simulator instruction semantics for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifdef DEFINE_LABELS - - /* The labels have the case they have because the enum of insn types - is all uppercase and in the non-stdc case the insn symbol is built - into the enum name. */ - - static struct { - int index; - void *label; - } labels[] = { - { FR30BF_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, - { FR30BF_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, - { FR30BF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, - { FR30BF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, - { FR30BF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, - { FR30BF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, - { FR30BF_INSN_ADD, && case_sem_INSN_ADD }, - { FR30BF_INSN_ADDI, && case_sem_INSN_ADDI }, - { FR30BF_INSN_ADD2, && case_sem_INSN_ADD2 }, - { FR30BF_INSN_ADDC, && case_sem_INSN_ADDC }, - { FR30BF_INSN_ADDN, && case_sem_INSN_ADDN }, - { FR30BF_INSN_ADDNI, && case_sem_INSN_ADDNI }, - { FR30BF_INSN_ADDN2, && case_sem_INSN_ADDN2 }, - { FR30BF_INSN_SUB, && case_sem_INSN_SUB }, - { FR30BF_INSN_SUBC, && case_sem_INSN_SUBC }, - { FR30BF_INSN_SUBN, && case_sem_INSN_SUBN }, - { FR30BF_INSN_CMP, && case_sem_INSN_CMP }, - { FR30BF_INSN_CMPI, && case_sem_INSN_CMPI }, - { FR30BF_INSN_CMP2, && case_sem_INSN_CMP2 }, - { FR30BF_INSN_AND, && case_sem_INSN_AND }, - { FR30BF_INSN_OR, && case_sem_INSN_OR }, - { FR30BF_INSN_EOR, && case_sem_INSN_EOR }, - { FR30BF_INSN_ANDM, && case_sem_INSN_ANDM }, - { FR30BF_INSN_ANDH, && case_sem_INSN_ANDH }, - { FR30BF_INSN_ANDB, && case_sem_INSN_ANDB }, - { FR30BF_INSN_ORM, && case_sem_INSN_ORM }, - { FR30BF_INSN_ORH, && case_sem_INSN_ORH }, - { FR30BF_INSN_ORB, && case_sem_INSN_ORB }, - { FR30BF_INSN_EORM, && case_sem_INSN_EORM }, - { FR30BF_INSN_EORH, && case_sem_INSN_EORH }, - { FR30BF_INSN_EORB, && case_sem_INSN_EORB }, - { FR30BF_INSN_BANDL, && case_sem_INSN_BANDL }, - { FR30BF_INSN_BORL, && case_sem_INSN_BORL }, - { FR30BF_INSN_BEORL, && case_sem_INSN_BEORL }, - { FR30BF_INSN_BANDH, && case_sem_INSN_BANDH }, - { FR30BF_INSN_BORH, && case_sem_INSN_BORH }, - { FR30BF_INSN_BEORH, && case_sem_INSN_BEORH }, - { FR30BF_INSN_BTSTL, && case_sem_INSN_BTSTL }, - { FR30BF_INSN_BTSTH, && case_sem_INSN_BTSTH }, - { FR30BF_INSN_MUL, && case_sem_INSN_MUL }, - { FR30BF_INSN_MULU, && case_sem_INSN_MULU }, - { FR30BF_INSN_MULH, && case_sem_INSN_MULH }, - { FR30BF_INSN_MULUH, && case_sem_INSN_MULUH }, - { FR30BF_INSN_DIV0S, && case_sem_INSN_DIV0S }, - { FR30BF_INSN_DIV0U, && case_sem_INSN_DIV0U }, - { FR30BF_INSN_DIV1, && case_sem_INSN_DIV1 }, - { FR30BF_INSN_DIV2, && case_sem_INSN_DIV2 }, - { FR30BF_INSN_DIV3, && case_sem_INSN_DIV3 }, - { FR30BF_INSN_DIV4S, && case_sem_INSN_DIV4S }, - { FR30BF_INSN_LSL, && case_sem_INSN_LSL }, - { FR30BF_INSN_LSLI, && case_sem_INSN_LSLI }, - { FR30BF_INSN_LSL2, && case_sem_INSN_LSL2 }, - { FR30BF_INSN_LSR, && case_sem_INSN_LSR }, - { FR30BF_INSN_LSRI, && case_sem_INSN_LSRI }, - { FR30BF_INSN_LSR2, && case_sem_INSN_LSR2 }, - { FR30BF_INSN_ASR, && case_sem_INSN_ASR }, - { FR30BF_INSN_ASRI, && case_sem_INSN_ASRI }, - { FR30BF_INSN_ASR2, && case_sem_INSN_ASR2 }, - { FR30BF_INSN_LDI8, && case_sem_INSN_LDI8 }, - { FR30BF_INSN_LDI20, && case_sem_INSN_LDI20 }, - { FR30BF_INSN_LDI32, && case_sem_INSN_LDI32 }, - { FR30BF_INSN_LD, && case_sem_INSN_LD }, - { FR30BF_INSN_LDUH, && case_sem_INSN_LDUH }, - { FR30BF_INSN_LDUB, && case_sem_INSN_LDUB }, - { FR30BF_INSN_LDR13, && case_sem_INSN_LDR13 }, - { FR30BF_INSN_LDR13UH, && case_sem_INSN_LDR13UH }, - { FR30BF_INSN_LDR13UB, && case_sem_INSN_LDR13UB }, - { FR30BF_INSN_LDR14, && case_sem_INSN_LDR14 }, - { FR30BF_INSN_LDR14UH, && case_sem_INSN_LDR14UH }, - { FR30BF_INSN_LDR14UB, && case_sem_INSN_LDR14UB }, - { FR30BF_INSN_LDR15, && case_sem_INSN_LDR15 }, - { FR30BF_INSN_LDR15GR, && case_sem_INSN_LDR15GR }, - { FR30BF_INSN_LDR15DR, && case_sem_INSN_LDR15DR }, - { FR30BF_INSN_LDR15PS, && case_sem_INSN_LDR15PS }, - { FR30BF_INSN_ST, && case_sem_INSN_ST }, - { FR30BF_INSN_STH, && case_sem_INSN_STH }, - { FR30BF_INSN_STB, && case_sem_INSN_STB }, - { FR30BF_INSN_STR13, && case_sem_INSN_STR13 }, - { FR30BF_INSN_STR13H, && case_sem_INSN_STR13H }, - { FR30BF_INSN_STR13B, && case_sem_INSN_STR13B }, - { FR30BF_INSN_STR14, && case_sem_INSN_STR14 }, - { FR30BF_INSN_STR14H, && case_sem_INSN_STR14H }, - { FR30BF_INSN_STR14B, && case_sem_INSN_STR14B }, - { FR30BF_INSN_STR15, && case_sem_INSN_STR15 }, - { FR30BF_INSN_STR15GR, && case_sem_INSN_STR15GR }, - { FR30BF_INSN_STR15DR, && case_sem_INSN_STR15DR }, - { FR30BF_INSN_STR15PS, && case_sem_INSN_STR15PS }, - { FR30BF_INSN_MOV, && case_sem_INSN_MOV }, - { FR30BF_INSN_MOVDR, && case_sem_INSN_MOVDR }, - { FR30BF_INSN_MOVPS, && case_sem_INSN_MOVPS }, - { FR30BF_INSN_MOV2DR, && case_sem_INSN_MOV2DR }, - { FR30BF_INSN_MOV2PS, && case_sem_INSN_MOV2PS }, - { FR30BF_INSN_JMP, && case_sem_INSN_JMP }, - { FR30BF_INSN_JMPD, && case_sem_INSN_JMPD }, - { FR30BF_INSN_CALLR, && case_sem_INSN_CALLR }, - { FR30BF_INSN_CALLRD, && case_sem_INSN_CALLRD }, - { FR30BF_INSN_CALL, && case_sem_INSN_CALL }, - { FR30BF_INSN_CALLD, && case_sem_INSN_CALLD }, - { FR30BF_INSN_RET, && case_sem_INSN_RET }, - { FR30BF_INSN_RET_D, && case_sem_INSN_RET_D }, - { FR30BF_INSN_INT, && case_sem_INSN_INT }, - { FR30BF_INSN_INTE, && case_sem_INSN_INTE }, - { FR30BF_INSN_RETI, && case_sem_INSN_RETI }, - { FR30BF_INSN_BRAD, && case_sem_INSN_BRAD }, - { FR30BF_INSN_BRA, && case_sem_INSN_BRA }, - { FR30BF_INSN_BNOD, && case_sem_INSN_BNOD }, - { FR30BF_INSN_BNO, && case_sem_INSN_BNO }, - { FR30BF_INSN_BEQD, && case_sem_INSN_BEQD }, - { FR30BF_INSN_BEQ, && case_sem_INSN_BEQ }, - { FR30BF_INSN_BNED, && case_sem_INSN_BNED }, - { FR30BF_INSN_BNE, && case_sem_INSN_BNE }, - { FR30BF_INSN_BCD, && case_sem_INSN_BCD }, - { FR30BF_INSN_BC, && case_sem_INSN_BC }, - { FR30BF_INSN_BNCD, && case_sem_INSN_BNCD }, - { FR30BF_INSN_BNC, && case_sem_INSN_BNC }, - { FR30BF_INSN_BND, && case_sem_INSN_BND }, - { FR30BF_INSN_BN, && case_sem_INSN_BN }, - { FR30BF_INSN_BPD, && case_sem_INSN_BPD }, - { FR30BF_INSN_BP, && case_sem_INSN_BP }, - { FR30BF_INSN_BVD, && case_sem_INSN_BVD }, - { FR30BF_INSN_BV, && case_sem_INSN_BV }, - { FR30BF_INSN_BNVD, && case_sem_INSN_BNVD }, - { FR30BF_INSN_BNV, && case_sem_INSN_BNV }, - { FR30BF_INSN_BLTD, && case_sem_INSN_BLTD }, - { FR30BF_INSN_BLT, && case_sem_INSN_BLT }, - { FR30BF_INSN_BGED, && case_sem_INSN_BGED }, - { FR30BF_INSN_BGE, && case_sem_INSN_BGE }, - { FR30BF_INSN_BLED, && case_sem_INSN_BLED }, - { FR30BF_INSN_BLE, && case_sem_INSN_BLE }, - { FR30BF_INSN_BGTD, && case_sem_INSN_BGTD }, - { FR30BF_INSN_BGT, && case_sem_INSN_BGT }, - { FR30BF_INSN_BLSD, && case_sem_INSN_BLSD }, - { FR30BF_INSN_BLS, && case_sem_INSN_BLS }, - { FR30BF_INSN_BHID, && case_sem_INSN_BHID }, - { FR30BF_INSN_BHI, && case_sem_INSN_BHI }, - { FR30BF_INSN_DMOVR13, && case_sem_INSN_DMOVR13 }, - { FR30BF_INSN_DMOVR13H, && case_sem_INSN_DMOVR13H }, - { FR30BF_INSN_DMOVR13B, && case_sem_INSN_DMOVR13B }, - { FR30BF_INSN_DMOVR13PI, && case_sem_INSN_DMOVR13PI }, - { FR30BF_INSN_DMOVR13PIH, && case_sem_INSN_DMOVR13PIH }, - { FR30BF_INSN_DMOVR13PIB, && case_sem_INSN_DMOVR13PIB }, - { FR30BF_INSN_DMOVR15PI, && case_sem_INSN_DMOVR15PI }, - { FR30BF_INSN_DMOV2R13, && case_sem_INSN_DMOV2R13 }, - { FR30BF_INSN_DMOV2R13H, && case_sem_INSN_DMOV2R13H }, - { FR30BF_INSN_DMOV2R13B, && case_sem_INSN_DMOV2R13B }, - { FR30BF_INSN_DMOV2R13PI, && case_sem_INSN_DMOV2R13PI }, - { FR30BF_INSN_DMOV2R13PIH, && case_sem_INSN_DMOV2R13PIH }, - { FR30BF_INSN_DMOV2R13PIB, && case_sem_INSN_DMOV2R13PIB }, - { FR30BF_INSN_DMOV2R15PD, && case_sem_INSN_DMOV2R15PD }, - { FR30BF_INSN_LDRES, && case_sem_INSN_LDRES }, - { FR30BF_INSN_STRES, && case_sem_INSN_STRES }, - { FR30BF_INSN_COPOP, && case_sem_INSN_COPOP }, - { FR30BF_INSN_COPLD, && case_sem_INSN_COPLD }, - { FR30BF_INSN_COPST, && case_sem_INSN_COPST }, - { FR30BF_INSN_COPSV, && case_sem_INSN_COPSV }, - { FR30BF_INSN_NOP, && case_sem_INSN_NOP }, - { FR30BF_INSN_ANDCCR, && case_sem_INSN_ANDCCR }, - { FR30BF_INSN_ORCCR, && case_sem_INSN_ORCCR }, - { FR30BF_INSN_STILM, && case_sem_INSN_STILM }, - { FR30BF_INSN_ADDSP, && case_sem_INSN_ADDSP }, - { FR30BF_INSN_EXTSB, && case_sem_INSN_EXTSB }, - { FR30BF_INSN_EXTUB, && case_sem_INSN_EXTUB }, - { FR30BF_INSN_EXTSH, && case_sem_INSN_EXTSH }, - { FR30BF_INSN_EXTUH, && case_sem_INSN_EXTUH }, - { FR30BF_INSN_LDM0, && case_sem_INSN_LDM0 }, - { FR30BF_INSN_LDM1, && case_sem_INSN_LDM1 }, - { FR30BF_INSN_STM0, && case_sem_INSN_STM0 }, - { FR30BF_INSN_STM1, && case_sem_INSN_STM1 }, - { FR30BF_INSN_ENTER, && case_sem_INSN_ENTER }, - { FR30BF_INSN_LEAVE, && case_sem_INSN_LEAVE }, - { FR30BF_INSN_XCHB, && case_sem_INSN_XCHB }, - { 0, 0 } - }; - int i; - - for (i = 0; labels[i].label != 0; ++i) - { -#if FAST_P - CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; -#else - CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; -#endif - } - -#undef DEFINE_LABELS -#endif /* DEFINE_LABELS */ - -#ifdef DEFINE_SWITCH - -/* If hyper-fast [well not unnecessarily slow] execution is selected, turn - off frills like tracing and profiling. */ -/* FIXME: A better way would be to have TRACE_RESULT check for something - that can cause it to be optimized out. Another way would be to emit - special handlers into the instruction "stream". */ - -#if FAST_P -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#endif - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -{ - -#if WITH_SCACHE_PBB - -/* Branch to next handler without going around main loop. */ -#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case -SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) - -#else /* ! WITH_SCACHE_PBB */ - -#define NEXT(vpc) BREAK (sem) -#ifdef __GNUC__ -#if FAST_P - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) -#endif -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) -#endif - -#endif /* ! WITH_SCACHE_PBB */ - - { - - CASE (sem, INSN_X_INVALID) : /* --invalid-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_AFTER) : /* --after-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - fr30bf_pbb_after (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEFORE) : /* --before-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - fr30bf_pbb_before (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF -#ifdef DEFINE_SWITCH - vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CHAIN) : /* --chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - vpc = fr30bf_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEGIN) : /* --begin-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = fr30bf_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = fr30bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = fr30bf_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADD) : /* add $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDI) : /* add $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADD2) : /* add2 $m4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDC) : /* addc $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ADDCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - { - BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = tmp_tmp; - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDN) : /* addn $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDNI) : /* addn $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDN2) : /* addn2 $m4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUB) : /* sub $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBC) : /* subc $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = SUBCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = tmp_tmp; - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBN) : /* subn $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMP) : /* cmp $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPI) : /* cmp $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_u4)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMP2) : /* cmp2 $m4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_m4)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND) : /* and $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ANDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR) : /* or $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ORSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EOR) : /* eor $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = XORSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDM) : /* and $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ANDSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDH) : /* andh $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = ANDHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDB) : /* andb $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORM) : /* or $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORH) : /* orh $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = ORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORB) : /* orb $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EORM) : /* eor $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = XORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EORH) : /* eorh $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = XORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EORB) : /* eorb $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = XORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BANDL) : /* bandl $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ANDQI (ORQI (FLD (f_u4), 240), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BORL) : /* borl $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEORL) : /* beorl $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = XORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BANDH) : /* bandh $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ANDQI (ORQI (SLLQI (FLD (f_u4), 4), 15), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BORH) : /* borh $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEORH) : /* beorh $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = XORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BTSTL) : /* btstl $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = 0; - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BTSTH) : /* btsth $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MUL) : /* mul $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp; - tmp_tmp = MULDI (EXTSIDI (* FLD (i_Rj)), EXTSIDI (* FLD (i_Ri))); - { - SI opval = TRUNCDISI (tmp_tmp); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQDI (tmp_tmp, MAKEDI (0, 0)); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = ORIF (GTDI (tmp_tmp, MAKEDI (0, 2147483647)), LTDI (tmp_tmp, NEGDI (MAKEDI (0, 0x80000000)))); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULU) : /* mulu $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp; - tmp_tmp = MULDI (ZEXTSIDI (* FLD (i_Rj)), ZEXTSIDI (* FLD (i_Ri))); - { - SI opval = TRUNCDISI (tmp_tmp); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 4)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = NESI (GET_H_DR (((UINT) 4)), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULH) : /* mulh $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = MULHI (TRUNCSIHI (* FLD (i_Rj)), TRUNCSIHI (* FLD (i_Ri))); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = GESI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULUH) : /* muluh $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = MULSI (ANDSI (* FLD (i_Rj), 65535), ANDSI (* FLD (i_Ri), 65535)); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = GESI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV0S) : /* div0s $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_d0bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); - } - { - BI opval = XORBI (CPU (h_d0bit), LTSI (* FLD (i_Ri), 0)); - CPU (h_d1bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); - } -if (NEBI (CPU (h_d0bit), 0)) { - { - SI opval = 0xffffffff; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} else { - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV0U) : /* div0u $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = 0; - CPU (h_d0bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); - } - { - BI opval = 0; - CPU (h_d1bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); - } - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV1) : /* div1 $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - { - SI opval = SLLSI (GET_H_DR (((UINT) 4)), 1); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -if (LTSI (GET_H_DR (((UINT) 5)), 0)) { - { - SI opval = ADDSI (GET_H_DR (((UINT) 4)), 1); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - { - SI opval = SLLSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -if (EQBI (CPU (h_d1bit), 1)) { -{ - tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} else { -{ - tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} -if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) { -{ - { - SI opval = tmp_tmp; - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = ORSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - { - BI opval = EQSI (GET_H_DR (((UINT) 4)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV2) : /* div2 $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; -if (EQBI (CPU (h_d1bit), 1)) { -{ - tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} else { -{ - tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} -if (EQSI (tmp_tmp, 0)) { -{ - { - BI opval = 1; - CPU (h_zbit) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_zbit) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV3) : /* div3 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (CPU (h_zbit), 1)) { - { - SI opval = ADDSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV4S) : /* div4s */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (CPU (h_d1bit), 1)) { - { - SI opval = NEGSI (GET_H_DR (((UINT) 5))); - SET_H_DR (((UINT) 5), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSL) : /* lsl $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSLI) : /* lsl $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSL2) : /* lsl2 $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSR) : /* lsr $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSRI) : /* lsr $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSR2) : /* lsr2 $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ASR) : /* asr $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ASRI) : /* asr $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ASR2) : /* asr2 $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDI8) : /* ldi:8 $i8,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldi8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = FLD (f_i8); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDI20) : /* ldi:20 $i20,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldi20.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_i20); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDI32) : /* ldi:32 $i32,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldi32.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 6); - - { - SI opval = FLD (f_i32); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD) : /* ld @$Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUH) : /* lduh @$Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUB) : /* ldub @$Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR13) : /* ld @($R13,$Rj),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR13UH) : /* lduh @($R13,$Rj),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR13UB) : /* ldub @($R13,$Rj),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR14) : /* ld @($R14,$disp10),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr14.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR14UH) : /* lduh @($R14,$disp9),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr14uh.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR14UB) : /* ldub @($R14,$disp8),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr14ub.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR15) : /* ld @($R15,$udisp6),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr15.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_udisp6), CPU (h_gr[((UINT) 15)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR15GR) : /* ld @$R15+,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr15gr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -if (NESI (FLD (f_Ri), 15)) { - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR15DR) : /* ld @$R15+,$Rs2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SET_H_DR (FLD (f_Rs2), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR15PS) : /* ld @$R15+,$ps */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addsp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - SET_H_PS (opval); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST) : /* st $Ri,@$Rj */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STH) : /* sth $Ri,@$Rj */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STB) : /* stb $Ri,@$Rj */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR13) : /* st $Ri,@($R13,$Rj) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR13H) : /* sth $Ri,@($R13,$Rj) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR13B) : /* stb $Ri,@($R13,$Rj) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR14) : /* st $Ri,@($R14,$disp10) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str14.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR14H) : /* sth $Ri,@($R14,$disp9) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str14h.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR14B) : /* stb $Ri,@($R14,$disp8) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str14b.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR15) : /* st $Ri,@($R15,$udisp6) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str15.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_udisp6)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR15GR) : /* st $Ri,@-$R15 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str15gr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = * FLD (i_Ri); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR15DR) : /* st $Rs2,@-$R15 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = GET_H_DR (FLD (f_Rs2)); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR15PS) : /* st $ps,@-$R15 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addsp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GET_H_PS (); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOV) : /* mov $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Rj); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVDR) : /* mov $Rs1,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movdr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_DR (FLD (f_Rs1)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVPS) : /* mov $ps,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movdr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_PS (); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOV2DR) : /* mov $Ri,$Rs1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SET_H_DR (FLD (f_Rs1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOV2PS) : /* mov $Ri,$ps */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_Ri); - SET_H_PS (opval); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JMP) : /* jmp @$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JMPD) : /* jmp:d @$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALLR) : /* call @$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (pc, 2); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALLRD) : /* call:d @$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDSI (pc, 4); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALL) : /* call $label12 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_call.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (pc, 2); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALLD) : /* call:d $label12 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_call.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDSI (pc, 4); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RET) : /* ret */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = GET_H_DR (((UINT) 1)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RET_D) : /* ret:d */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GET_H_DR (((UINT) 1)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_INT) : /* int $u8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_int.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -; /*clobber*/ -; /*clobber*/ -; /*clobber*/ - { - SI opval = fr30_int (current_cpu, pc, FLD (f_u8)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_INTE) : /* inte */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -; /*clobber*/ -; /*clobber*/ -; /*clobber*/ - { - SI opval = fr30_inte (current_cpu, pc); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RETI) : /* reti */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (GET_H_SBIT (), 0)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); - SET_H_DR (((UINT) 2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); - SET_H_PS (opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); - SET_H_DR (((UINT) 2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} else { -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); - SET_H_DR (((UINT) 3), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); - SET_H_PS (opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); - SET_H_DR (((UINT) 3), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRAD) : /* bra:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRA) : /* bra $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNOD) : /* bno:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -((void) 0); /*nop*/ -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNO) : /* bno $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEQD) : /* beq:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_zbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEQ) : /* beq $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_zbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNED) : /* bne:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNE) : /* bne $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BCD) : /* bc:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_cbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BC) : /* bc $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNCD) : /* bnc:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_cbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNC) : /* bnc $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BND) : /* bn:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_nbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BN) : /* bn $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_nbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BPD) : /* bp:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BP) : /* bp $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BVD) : /* bv:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_vbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BV) : /* bv $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_vbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNVD) : /* bnv:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_vbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNV) : /* bnv $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_vbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLTD) : /* blt:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (XORBI (CPU (h_vbit), CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLT) : /* blt $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (XORBI (CPU (h_vbit), CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGED) : /* bge:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGE) : /* bge $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLED) : /* ble:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLE) : /* ble $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGTD) : /* bgt:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGT) : /* bgt $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLSD) : /* bls:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ORBI (CPU (h_cbit), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLS) : /* bls $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ORBI (CPU (h_cbit), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BHID) : /* bhi:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BHI) : /* bhi $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13) : /* dmov $R13,@$dir10 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = CPU (h_gr[((UINT) 13)]); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13H) : /* dmovh $R13,@$dir9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = CPU (h_gr[((UINT) 13)]); - SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13B) : /* dmovb $R13,@$dir8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = CPU (h_gr[((UINT) 13)]); - SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13PI) : /* dmov @$R13+,@$dir10 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13PIH) : /* dmovh @$R13+,@$dir9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - HI opval = GETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13PIB) : /* dmovb @$R13+,@$dir8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - QI opval = GETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR15PI) : /* dmov @$R15+,@$dir10 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13) : /* dmov @$dir10,$R13 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13H) : /* dmovh @$dir9,$R13 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13B) : /* dmovb @$dir8,$R13 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13PI) : /* dmov @$dir10,@$R13+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13PIH) : /* dmovh @$dir9,@$R13+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - HI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); - SETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13PIB) : /* dmovb @$dir8,@$R13+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - QI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); - SETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R15PD) : /* dmov @$dir10,@-$R15 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDRES) : /* ldres @$Ri+,$u4 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), 4); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STRES) : /* stres $u4,@$Ri+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), 4); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_COPOP) : /* copop $u4c,$ccc,$CRj,$CRi */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_COPLD) : /* copld $u4c,$ccc,$Rjc,$CRi */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_COPST) : /* copst $u4c,$ccc,$CRj,$Ric */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_COPSV) : /* copsv $u4c,$ccc,$CRj,$Ric */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOP) : /* nop */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDCCR) : /* andccr $u8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_int.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ANDQI (GET_H_CCR (), FLD (f_u8)); - SET_H_CCR (opval); - TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORCCR) : /* orccr $u8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_int.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ORQI (GET_H_CCR (), FLD (f_u8)); - SET_H_CCR (opval); - TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STILM) : /* stilm $u8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_int.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ANDSI (FLD (f_u8), 31); - SET_H_ILM (opval); - TRACE_RESULT (current_cpu, abuf, "ilm", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDSP) : /* addsp $s10 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addsp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_s10)); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTSB) : /* extsb $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (ANDQI (* FLD (i_Ri), 255)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTUB) : /* extub $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTQISI (ANDQI (* FLD (i_Ri), 255)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTSH) : /* extsh $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (ANDHI (* FLD (i_Ri), 65535)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTUH) : /* extuh $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTHISI (ANDHI (* FLD (i_Ri), 65535)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDM0) : /* ldm0 ($reglist_low_ld) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldm0.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_low_ld), 1)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 0)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 2)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 1)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 4)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 2)]) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 8)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 3)]) = opval; - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 16)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 4)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 32)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 5)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 64)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 6)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 128)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 7)]) = opval; - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDM1) : /* ldm1 ($reglist_hi_ld) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldm1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_hi_ld), 1)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 8)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 2)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 9)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 4)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 10)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 8)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 11)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 16)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 12)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 32)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 13)]) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 64)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 14)]) = opval; - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 128)) { - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STM0) : /* stm0 ($reglist_low_st) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stm0.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_low_st), 1)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 7)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 2)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 6)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 4)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 5)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 8)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 4)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 16)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 3)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 32)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 2)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 64)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 1)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 128)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 0)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STM1) : /* stm1 ($reglist_hi_st) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stm1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_hi_st), 1)) { -{ - SI tmp_save_r15; - tmp_save_r15 = CPU (h_gr[((UINT) 15)]); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_save_r15; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 2)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 14)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 4)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 13)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 8)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 12)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 16)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 11)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 32)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 10)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 64)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 9)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 128)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 8)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ENTER) : /* enter $u10 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_enter.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - { - SI opval = CPU (h_gr[((UINT) 14)]); - SETMEMSI (current_cpu, pc, tmp_tmp, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_tmp; - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), FLD (f_u10)); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LEAVE) : /* leave */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_enter.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (CPU (h_gr[((UINT) 14)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, SUBSI (CPU (h_gr[((UINT) 15)]), 4)); - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XCHB) : /* xchb @$Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = * FLD (i_Ri); - { - SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - UQI opval = tmp_tmp; - SETMEMUQI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - - } - ENDSWITCH (sem) /* End of semantic switch. */ - - /* At this point `vpc' contains the next insn to execute. */ -} - -#undef DEFINE_SWITCH -#endif /* DEFINE_SWITCH */ +// OBSOLETE /* Simulator instruction semantics for fr30bf. +// OBSOLETE +// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN. +// OBSOLETE +// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// OBSOLETE +// OBSOLETE */ +// OBSOLETE +// OBSOLETE #ifdef DEFINE_LABELS +// OBSOLETE +// OBSOLETE /* The labels have the case they have because the enum of insn types +// OBSOLETE is all uppercase and in the non-stdc case the insn symbol is built +// OBSOLETE into the enum name. */ +// OBSOLETE +// OBSOLETE static struct { +// OBSOLETE int index; +// OBSOLETE void *label; +// OBSOLETE } labels[] = { +// OBSOLETE { FR30BF_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, +// OBSOLETE { FR30BF_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, +// OBSOLETE { FR30BF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, +// OBSOLETE { FR30BF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, +// OBSOLETE { FR30BF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, +// OBSOLETE { FR30BF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, +// OBSOLETE { FR30BF_INSN_ADD, && case_sem_INSN_ADD }, +// OBSOLETE { FR30BF_INSN_ADDI, && case_sem_INSN_ADDI }, +// OBSOLETE { FR30BF_INSN_ADD2, && case_sem_INSN_ADD2 }, +// OBSOLETE { FR30BF_INSN_ADDC, && case_sem_INSN_ADDC }, +// OBSOLETE { FR30BF_INSN_ADDN, && case_sem_INSN_ADDN }, +// OBSOLETE { FR30BF_INSN_ADDNI, && case_sem_INSN_ADDNI }, +// OBSOLETE { FR30BF_INSN_ADDN2, && case_sem_INSN_ADDN2 }, +// OBSOLETE { FR30BF_INSN_SUB, && case_sem_INSN_SUB }, +// OBSOLETE { FR30BF_INSN_SUBC, && case_sem_INSN_SUBC }, +// OBSOLETE { FR30BF_INSN_SUBN, && case_sem_INSN_SUBN }, +// OBSOLETE { FR30BF_INSN_CMP, && case_sem_INSN_CMP }, +// OBSOLETE { FR30BF_INSN_CMPI, && case_sem_INSN_CMPI }, +// OBSOLETE { FR30BF_INSN_CMP2, && case_sem_INSN_CMP2 }, +// OBSOLETE { FR30BF_INSN_AND, && case_sem_INSN_AND }, +// OBSOLETE { FR30BF_INSN_OR, && case_sem_INSN_OR }, +// OBSOLETE { FR30BF_INSN_EOR, && case_sem_INSN_EOR }, +// OBSOLETE { FR30BF_INSN_ANDM, && case_sem_INSN_ANDM }, +// OBSOLETE { FR30BF_INSN_ANDH, && case_sem_INSN_ANDH }, +// OBSOLETE { FR30BF_INSN_ANDB, && case_sem_INSN_ANDB }, +// OBSOLETE { FR30BF_INSN_ORM, && case_sem_INSN_ORM }, +// OBSOLETE { FR30BF_INSN_ORH, && case_sem_INSN_ORH }, +// OBSOLETE { FR30BF_INSN_ORB, && case_sem_INSN_ORB }, +// OBSOLETE { FR30BF_INSN_EORM, && case_sem_INSN_EORM }, +// OBSOLETE { FR30BF_INSN_EORH, && case_sem_INSN_EORH }, +// OBSOLETE { FR30BF_INSN_EORB, && case_sem_INSN_EORB }, +// OBSOLETE { FR30BF_INSN_BANDL, && case_sem_INSN_BANDL }, +// OBSOLETE { FR30BF_INSN_BORL, && case_sem_INSN_BORL }, +// OBSOLETE { FR30BF_INSN_BEORL, && case_sem_INSN_BEORL }, +// OBSOLETE { FR30BF_INSN_BANDH, && case_sem_INSN_BANDH }, +// OBSOLETE { FR30BF_INSN_BORH, && case_sem_INSN_BORH }, +// OBSOLETE { FR30BF_INSN_BEORH, && case_sem_INSN_BEORH }, +// OBSOLETE { FR30BF_INSN_BTSTL, && case_sem_INSN_BTSTL }, +// OBSOLETE { FR30BF_INSN_BTSTH, && case_sem_INSN_BTSTH }, +// OBSOLETE { FR30BF_INSN_MUL, && case_sem_INSN_MUL }, +// OBSOLETE { FR30BF_INSN_MULU, && case_sem_INSN_MULU }, +// OBSOLETE { FR30BF_INSN_MULH, && case_sem_INSN_MULH }, +// OBSOLETE { FR30BF_INSN_MULUH, && case_sem_INSN_MULUH }, +// OBSOLETE { FR30BF_INSN_DIV0S, && case_sem_INSN_DIV0S }, +// OBSOLETE { FR30BF_INSN_DIV0U, && case_sem_INSN_DIV0U }, +// OBSOLETE { FR30BF_INSN_DIV1, && case_sem_INSN_DIV1 }, +// OBSOLETE { FR30BF_INSN_DIV2, && case_sem_INSN_DIV2 }, +// OBSOLETE { FR30BF_INSN_DIV3, && case_sem_INSN_DIV3 }, +// OBSOLETE { FR30BF_INSN_DIV4S, && case_sem_INSN_DIV4S }, +// OBSOLETE { FR30BF_INSN_LSL, && case_sem_INSN_LSL }, +// OBSOLETE { FR30BF_INSN_LSLI, && case_sem_INSN_LSLI }, +// OBSOLETE { FR30BF_INSN_LSL2, && case_sem_INSN_LSL2 }, +// OBSOLETE { FR30BF_INSN_LSR, && case_sem_INSN_LSR }, +// OBSOLETE { FR30BF_INSN_LSRI, && case_sem_INSN_LSRI }, +// OBSOLETE { FR30BF_INSN_LSR2, && case_sem_INSN_LSR2 }, +// OBSOLETE { FR30BF_INSN_ASR, && case_sem_INSN_ASR }, +// OBSOLETE { FR30BF_INSN_ASRI, && case_sem_INSN_ASRI }, +// OBSOLETE { FR30BF_INSN_ASR2, && case_sem_INSN_ASR2 }, +// OBSOLETE { FR30BF_INSN_LDI8, && case_sem_INSN_LDI8 }, +// OBSOLETE { FR30BF_INSN_LDI20, && case_sem_INSN_LDI20 }, +// OBSOLETE { FR30BF_INSN_LDI32, && case_sem_INSN_LDI32 }, +// OBSOLETE { FR30BF_INSN_LD, && case_sem_INSN_LD }, +// OBSOLETE { FR30BF_INSN_LDUH, && case_sem_INSN_LDUH }, +// OBSOLETE { FR30BF_INSN_LDUB, && case_sem_INSN_LDUB }, +// OBSOLETE { FR30BF_INSN_LDR13, && case_sem_INSN_LDR13 }, +// OBSOLETE { FR30BF_INSN_LDR13UH, && case_sem_INSN_LDR13UH }, +// OBSOLETE { FR30BF_INSN_LDR13UB, && case_sem_INSN_LDR13UB }, +// OBSOLETE { FR30BF_INSN_LDR14, && case_sem_INSN_LDR14 }, +// OBSOLETE { FR30BF_INSN_LDR14UH, && case_sem_INSN_LDR14UH }, +// OBSOLETE { FR30BF_INSN_LDR14UB, && case_sem_INSN_LDR14UB }, +// OBSOLETE { FR30BF_INSN_LDR15, && case_sem_INSN_LDR15 }, +// OBSOLETE { FR30BF_INSN_LDR15GR, && case_sem_INSN_LDR15GR }, +// OBSOLETE { FR30BF_INSN_LDR15DR, && case_sem_INSN_LDR15DR }, +// OBSOLETE { FR30BF_INSN_LDR15PS, && case_sem_INSN_LDR15PS }, +// OBSOLETE { FR30BF_INSN_ST, && case_sem_INSN_ST }, +// OBSOLETE { FR30BF_INSN_STH, && case_sem_INSN_STH }, +// OBSOLETE { FR30BF_INSN_STB, && case_sem_INSN_STB }, +// OBSOLETE { FR30BF_INSN_STR13, && case_sem_INSN_STR13 }, +// OBSOLETE { FR30BF_INSN_STR13H, && case_sem_INSN_STR13H }, +// OBSOLETE { FR30BF_INSN_STR13B, && case_sem_INSN_STR13B }, +// OBSOLETE { FR30BF_INSN_STR14, && case_sem_INSN_STR14 }, +// OBSOLETE { FR30BF_INSN_STR14H, && case_sem_INSN_STR14H }, +// OBSOLETE { FR30BF_INSN_STR14B, && case_sem_INSN_STR14B }, +// OBSOLETE { FR30BF_INSN_STR15, && case_sem_INSN_STR15 }, +// OBSOLETE { FR30BF_INSN_STR15GR, && case_sem_INSN_STR15GR }, +// OBSOLETE { FR30BF_INSN_STR15DR, && case_sem_INSN_STR15DR }, +// OBSOLETE { FR30BF_INSN_STR15PS, && case_sem_INSN_STR15PS }, +// OBSOLETE { FR30BF_INSN_MOV, && case_sem_INSN_MOV }, +// OBSOLETE { FR30BF_INSN_MOVDR, && case_sem_INSN_MOVDR }, +// OBSOLETE { FR30BF_INSN_MOVPS, && case_sem_INSN_MOVPS }, +// OBSOLETE { FR30BF_INSN_MOV2DR, && case_sem_INSN_MOV2DR }, +// OBSOLETE { FR30BF_INSN_MOV2PS, && case_sem_INSN_MOV2PS }, +// OBSOLETE { FR30BF_INSN_JMP, && case_sem_INSN_JMP }, +// OBSOLETE { FR30BF_INSN_JMPD, && case_sem_INSN_JMPD }, +// OBSOLETE { FR30BF_INSN_CALLR, && case_sem_INSN_CALLR }, +// OBSOLETE { FR30BF_INSN_CALLRD, && case_sem_INSN_CALLRD }, +// OBSOLETE { FR30BF_INSN_CALL, && case_sem_INSN_CALL }, +// OBSOLETE { FR30BF_INSN_CALLD, && case_sem_INSN_CALLD }, +// OBSOLETE { FR30BF_INSN_RET, && case_sem_INSN_RET }, +// OBSOLETE { FR30BF_INSN_RET_D, && case_sem_INSN_RET_D }, +// OBSOLETE { FR30BF_INSN_INT, && case_sem_INSN_INT }, +// OBSOLETE { FR30BF_INSN_INTE, && case_sem_INSN_INTE }, +// OBSOLETE { FR30BF_INSN_RETI, && case_sem_INSN_RETI }, +// OBSOLETE { FR30BF_INSN_BRAD, && case_sem_INSN_BRAD }, +// OBSOLETE { FR30BF_INSN_BRA, && case_sem_INSN_BRA }, +// OBSOLETE { FR30BF_INSN_BNOD, && case_sem_INSN_BNOD }, +// OBSOLETE { FR30BF_INSN_BNO, && case_sem_INSN_BNO }, +// OBSOLETE { FR30BF_INSN_BEQD, && case_sem_INSN_BEQD }, +// OBSOLETE { FR30BF_INSN_BEQ, && case_sem_INSN_BEQ }, +// OBSOLETE { FR30BF_INSN_BNED, && case_sem_INSN_BNED }, +// OBSOLETE { FR30BF_INSN_BNE, && case_sem_INSN_BNE }, +// OBSOLETE { FR30BF_INSN_BCD, && case_sem_INSN_BCD }, +// OBSOLETE { FR30BF_INSN_BC, && case_sem_INSN_BC }, +// OBSOLETE { FR30BF_INSN_BNCD, && case_sem_INSN_BNCD }, +// OBSOLETE { FR30BF_INSN_BNC, && case_sem_INSN_BNC }, +// OBSOLETE { FR30BF_INSN_BND, && case_sem_INSN_BND }, +// OBSOLETE { FR30BF_INSN_BN, && case_sem_INSN_BN }, +// OBSOLETE { FR30BF_INSN_BPD, && case_sem_INSN_BPD }, +// OBSOLETE { FR30BF_INSN_BP, && case_sem_INSN_BP }, +// OBSOLETE { FR30BF_INSN_BVD, && case_sem_INSN_BVD }, +// OBSOLETE { FR30BF_INSN_BV, && case_sem_INSN_BV }, +// OBSOLETE { FR30BF_INSN_BNVD, && case_sem_INSN_BNVD }, +// OBSOLETE { FR30BF_INSN_BNV, && case_sem_INSN_BNV }, +// OBSOLETE { FR30BF_INSN_BLTD, && case_sem_INSN_BLTD }, +// OBSOLETE { FR30BF_INSN_BLT, && case_sem_INSN_BLT }, +// OBSOLETE { FR30BF_INSN_BGED, && case_sem_INSN_BGED }, +// OBSOLETE { FR30BF_INSN_BGE, && case_sem_INSN_BGE }, +// OBSOLETE { FR30BF_INSN_BLED, && case_sem_INSN_BLED }, +// OBSOLETE { FR30BF_INSN_BLE, && case_sem_INSN_BLE }, +// OBSOLETE { FR30BF_INSN_BGTD, && case_sem_INSN_BGTD }, +// OBSOLETE { FR30BF_INSN_BGT, && case_sem_INSN_BGT }, +// OBSOLETE { FR30BF_INSN_BLSD, && case_sem_INSN_BLSD }, +// OBSOLETE { FR30BF_INSN_BLS, && case_sem_INSN_BLS }, +// OBSOLETE { FR30BF_INSN_BHID, && case_sem_INSN_BHID }, +// OBSOLETE { FR30BF_INSN_BHI, && case_sem_INSN_BHI }, +// OBSOLETE { FR30BF_INSN_DMOVR13, && case_sem_INSN_DMOVR13 }, +// OBSOLETE { FR30BF_INSN_DMOVR13H, && case_sem_INSN_DMOVR13H }, +// OBSOLETE { FR30BF_INSN_DMOVR13B, && case_sem_INSN_DMOVR13B }, +// OBSOLETE { FR30BF_INSN_DMOVR13PI, && case_sem_INSN_DMOVR13PI }, +// OBSOLETE { FR30BF_INSN_DMOVR13PIH, && case_sem_INSN_DMOVR13PIH }, +// OBSOLETE { FR30BF_INSN_DMOVR13PIB, && case_sem_INSN_DMOVR13PIB }, +// OBSOLETE { FR30BF_INSN_DMOVR15PI, && case_sem_INSN_DMOVR15PI }, +// OBSOLETE { FR30BF_INSN_DMOV2R13, && case_sem_INSN_DMOV2R13 }, +// OBSOLETE { FR30BF_INSN_DMOV2R13H, && case_sem_INSN_DMOV2R13H }, +// OBSOLETE { FR30BF_INSN_DMOV2R13B, && case_sem_INSN_DMOV2R13B }, +// OBSOLETE { FR30BF_INSN_DMOV2R13PI, && case_sem_INSN_DMOV2R13PI }, +// OBSOLETE { FR30BF_INSN_DMOV2R13PIH, && case_sem_INSN_DMOV2R13PIH }, +// OBSOLETE { FR30BF_INSN_DMOV2R13PIB, && case_sem_INSN_DMOV2R13PIB }, +// OBSOLETE { FR30BF_INSN_DMOV2R15PD, && case_sem_INSN_DMOV2R15PD }, +// OBSOLETE { FR30BF_INSN_LDRES, && case_sem_INSN_LDRES }, +// OBSOLETE { FR30BF_INSN_STRES, && case_sem_INSN_STRES }, +// OBSOLETE { FR30BF_INSN_COPOP, && case_sem_INSN_COPOP }, +// OBSOLETE { FR30BF_INSN_COPLD, && case_sem_INSN_COPLD }, +// OBSOLETE { FR30BF_INSN_COPST, && case_sem_INSN_COPST }, +// OBSOLETE { FR30BF_INSN_COPSV, && case_sem_INSN_COPSV }, +// OBSOLETE { FR30BF_INSN_NOP, && case_sem_INSN_NOP }, +// OBSOLETE { FR30BF_INSN_ANDCCR, && case_sem_INSN_ANDCCR }, +// OBSOLETE { FR30BF_INSN_ORCCR, && case_sem_INSN_ORCCR }, +// OBSOLETE { FR30BF_INSN_STILM, && case_sem_INSN_STILM }, +// OBSOLETE { FR30BF_INSN_ADDSP, && case_sem_INSN_ADDSP }, +// OBSOLETE { FR30BF_INSN_EXTSB, && case_sem_INSN_EXTSB }, +// OBSOLETE { FR30BF_INSN_EXTUB, && case_sem_INSN_EXTUB }, +// OBSOLETE { FR30BF_INSN_EXTSH, && case_sem_INSN_EXTSH }, +// OBSOLETE { FR30BF_INSN_EXTUH, && case_sem_INSN_EXTUH }, +// OBSOLETE { FR30BF_INSN_LDM0, && case_sem_INSN_LDM0 }, +// OBSOLETE { FR30BF_INSN_LDM1, && case_sem_INSN_LDM1 }, +// OBSOLETE { FR30BF_INSN_STM0, && case_sem_INSN_STM0 }, +// OBSOLETE { FR30BF_INSN_STM1, && case_sem_INSN_STM1 }, +// OBSOLETE { FR30BF_INSN_ENTER, && case_sem_INSN_ENTER }, +// OBSOLETE { FR30BF_INSN_LEAVE, && case_sem_INSN_LEAVE }, +// OBSOLETE { FR30BF_INSN_XCHB, && case_sem_INSN_XCHB }, +// OBSOLETE { 0, 0 } +// OBSOLETE }; +// OBSOLETE int i; +// OBSOLETE +// OBSOLETE for (i = 0; labels[i].label != 0; ++i) +// OBSOLETE { +// OBSOLETE #if FAST_P +// OBSOLETE CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; +// OBSOLETE #else +// OBSOLETE CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef DEFINE_LABELS +// OBSOLETE #endif /* DEFINE_LABELS */ +// OBSOLETE +// OBSOLETE #ifdef DEFINE_SWITCH +// OBSOLETE +// OBSOLETE /* If hyper-fast [well not unnecessarily slow] execution is selected, turn +// OBSOLETE off frills like tracing and profiling. */ +// OBSOLETE /* FIXME: A better way would be to have TRACE_RESULT check for something +// OBSOLETE that can cause it to be optimized out. Another way would be to emit +// OBSOLETE special handlers into the instruction "stream". */ +// OBSOLETE +// OBSOLETE #if FAST_P +// OBSOLETE #undef TRACE_RESULT +// OBSOLETE #define TRACE_RESULT(cpu, abuf, name, type, val) +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE #undef GET_ATTR +// OBSOLETE #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) +// OBSOLETE #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) +// OBSOLETE #else +// OBSOLETE #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE { +// OBSOLETE +// OBSOLETE #if WITH_SCACHE_PBB +// OBSOLETE +// OBSOLETE /* Branch to next handler without going around main loop. */ +// OBSOLETE #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case +// OBSOLETE SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) +// OBSOLETE +// OBSOLETE #else /* ! WITH_SCACHE_PBB */ +// OBSOLETE +// OBSOLETE #define NEXT(vpc) BREAK (sem) +// OBSOLETE #ifdef __GNUC__ +// OBSOLETE #if FAST_P +// OBSOLETE SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) +// OBSOLETE #else +// OBSOLETE SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) +// OBSOLETE #endif +// OBSOLETE #else +// OBSOLETE SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE #endif /* ! WITH_SCACHE_PBB */ +// OBSOLETE +// OBSOLETE { +// OBSOLETE +// OBSOLETE CASE (sem, INSN_X_INVALID) : /* --invalid-- */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE /* Update the recorded pc in the cpu state struct. +// OBSOLETE Only necessary for WITH_SCACHE case, but to avoid the +// OBSOLETE conditional compilation .... */ +// OBSOLETE SET_H_PC (pc); +// OBSOLETE /* Virtual insns have zero size. Overwrite vpc with address of next insn +// OBSOLETE using the default-insn-bitsize spec. When executing insns in parallel +// OBSOLETE we may want to queue the fault and continue execution. */ +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_X_AFTER) : /* --after-- */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE_PBB_FR30BF +// OBSOLETE fr30bf_pbb_after (current_cpu, sem_arg); +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_X_BEFORE) : /* --before-- */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE_PBB_FR30BF +// OBSOLETE fr30bf_pbb_before (current_cpu, sem_arg); +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE_PBB_FR30BF +// OBSOLETE #ifdef DEFINE_SWITCH +// OBSOLETE vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, +// OBSOLETE pbb_br_type, pbb_br_npc); +// OBSOLETE BREAK (sem); +// OBSOLETE #else +// OBSOLETE /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ +// OBSOLETE vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, +// OBSOLETE CPU_PBB_BR_TYPE (current_cpu), +// OBSOLETE CPU_PBB_BR_NPC (current_cpu)); +// OBSOLETE #endif +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_X_CHAIN) : /* --chain-- */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE_PBB_FR30BF +// OBSOLETE vpc = fr30bf_pbb_chain (current_cpu, sem_arg); +// OBSOLETE #ifdef DEFINE_SWITCH +// OBSOLETE BREAK (sem); +// OBSOLETE #endif +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_X_BEGIN) : /* --begin-- */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE_PBB_FR30BF +// OBSOLETE #if defined DEFINE_SWITCH || defined FAST_P +// OBSOLETE /* In the switch case FAST_P is a constant, allowing several optimizations +// OBSOLETE in any called inline functions. */ +// OBSOLETE vpc = fr30bf_pbb_begin (current_cpu, FAST_P); +// OBSOLETE #else +// OBSOLETE #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ +// OBSOLETE vpc = fr30bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); +// OBSOLETE #else +// OBSOLETE vpc = fr30bf_pbb_begin (current_cpu, 0); +// OBSOLETE #endif +// OBSOLETE #endif +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ADD) : /* add $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ADDI) : /* add $u4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_u4), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_u4), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ADD2) : /* add2 $m4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_m4), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_m4), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ADDC) : /* addc $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = ADDCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE { +// OBSOLETE BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ADDN) : /* addn $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ADDNI) : /* addn $u4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ADDN2) : /* addn2 $m4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_SUB) : /* sub $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_SUBC) : /* subc $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = SUBCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE { +// OBSOLETE BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_SUBN) : /* subn $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_CMP) : /* cmp $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp1; +// OBSOLETE { +// OBSOLETE BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE tmp_tmp1 = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_CMPI) : /* cmp $u4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp1; +// OBSOLETE { +// OBSOLETE BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_u4), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_u4), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_u4)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_CMP2) : /* cmp2 $m4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp1; +// OBSOLETE { +// OBSOLETE BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_m4), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_m4), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_m4)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_AND) : /* and $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ANDSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_OR) : /* or $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ORSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_EOR) : /* eor $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = XORSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ANDM) : /* and $Rj,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = ANDSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ANDH) : /* andh $Rj,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI tmp_tmp; +// OBSOLETE tmp_tmp = ANDHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQHI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTHI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE HI opval = tmp_tmp; +// OBSOLETE SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ANDB) : /* andb $Rj,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI tmp_tmp; +// OBSOLETE tmp_tmp = ANDQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQQI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTQI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE QI opval = tmp_tmp; +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ORM) : /* or $Rj,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = ORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ORH) : /* orh $Rj,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI tmp_tmp; +// OBSOLETE tmp_tmp = ORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQHI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTHI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE HI opval = tmp_tmp; +// OBSOLETE SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ORB) : /* orb $Rj,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI tmp_tmp; +// OBSOLETE tmp_tmp = ORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQQI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTQI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE QI opval = tmp_tmp; +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_EORM) : /* eor $Rj,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = XORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_EORH) : /* eorh $Rj,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI tmp_tmp; +// OBSOLETE tmp_tmp = XORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQHI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTHI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE HI opval = tmp_tmp; +// OBSOLETE SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_EORB) : /* eorb $Rj,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI tmp_tmp; +// OBSOLETE tmp_tmp = XORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQQI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTQI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE QI opval = tmp_tmp; +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BANDL) : /* bandl $u4,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = ANDQI (ORQI (FLD (f_u4), 240), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BORL) : /* borl $u4,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = ORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BEORL) : /* beorl $u4,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = XORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BANDH) : /* bandh $u4,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = ANDQI (ORQI (SLLQI (FLD (f_u4), 4), 15), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BORH) : /* borh $u4,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = ORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BEORH) : /* beorh $u4,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = XORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BTSTL) : /* btstl $u4,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI tmp_tmp; +// OBSOLETE tmp_tmp = ANDQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE { +// OBSOLETE BI opval = EQQI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BTSTH) : /* btsth $u4,@$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI tmp_tmp; +// OBSOLETE tmp_tmp = ANDQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE { +// OBSOLETE BI opval = EQQI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTQI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_MUL) : /* mul $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE DI tmp_tmp; +// OBSOLETE tmp_tmp = MULDI (EXTSIDI (* FLD (i_Rj)), EXTSIDI (* FLD (i_Ri))); +// OBSOLETE { +// OBSOLETE SI opval = TRUNCDISI (tmp_tmp); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQDI (tmp_tmp, MAKEDI (0, 0)); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = ORIF (GTDI (tmp_tmp, MAKEDI (0, 2147483647)), LTDI (tmp_tmp, NEGDI (MAKEDI (0, 0x80000000)))); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_MULU) : /* mulu $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE DI tmp_tmp; +// OBSOLETE tmp_tmp = MULDI (ZEXTSIDI (* FLD (i_Rj)), ZEXTSIDI (* FLD (i_Ri))); +// OBSOLETE { +// OBSOLETE SI opval = TRUNCDISI (tmp_tmp); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (GET_H_DR (((UINT) 4)), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = NESI (GET_H_DR (((UINT) 4)), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_MULH) : /* mulh $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = MULHI (TRUNCSIHI (* FLD (i_Rj)), TRUNCSIHI (* FLD (i_Ri))); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = GESI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_MULUH) : /* muluh $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = MULSI (ANDSI (* FLD (i_Rj), 65535), ANDSI (* FLD (i_Ri), 65535)); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = GESI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DIV0S) : /* div0s $Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_d0bit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = XORBI (CPU (h_d0bit), LTSI (* FLD (i_Ri), 0)); +// OBSOLETE CPU (h_d1bit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); +// OBSOLETE } +// OBSOLETE if (NEBI (CPU (h_d0bit), 0)) { +// OBSOLETE { +// OBSOLETE SI opval = 0xffffffff; +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE SI opval = 0; +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DIV0U) : /* div0u $Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_d0bit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_d1bit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = 0; +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DIV1) : /* div1 $Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE { +// OBSOLETE SI opval = SLLSI (GET_H_DR (((UINT) 4)), 1); +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE if (LTSI (GET_H_DR (((UINT) 5)), 0)) { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 4)), 1); +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SLLSI (GET_H_DR (((UINT) 5)), 1); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE if (EQBI (CPU (h_d1bit), 1)) { +// OBSOLETE { +// OBSOLETE tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ORSI (GET_H_DR (((UINT) 5)), 1); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (GET_H_DR (((UINT) 4)), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DIV2) : /* div2 $Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE if (EQBI (CPU (h_d1bit), 1)) { +// OBSOLETE { +// OBSOLETE tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (EQSI (tmp_tmp, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = 1; +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = 0; +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DIV3) : /* div3 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (EQBI (CPU (h_zbit), 1)) { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 5)), 1); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DIV4S) : /* div4s */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (EQBI (CPU (h_d1bit), 1)) { +// OBSOLETE { +// OBSOLETE SI opval = NEGSI (GET_H_DR (((UINT) 5))); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LSL) : /* lsl $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ANDSI (* FLD (i_Rj), 31); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SLLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LSLI) : /* lsl $u4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = FLD (f_u4); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SLLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LSL2) : /* lsl2 $u4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ADDSI (FLD (f_u4), 16); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SLLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LSR) : /* lsr $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ANDSI (* FLD (i_Rj), 31); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LSRI) : /* lsr $u4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = FLD (f_u4); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LSR2) : /* lsr2 $u4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ADDSI (FLD (f_u4), 16); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ASR) : /* asr $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ANDSI (* FLD (i_Rj), 31); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRASI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ASRI) : /* asr $u4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = FLD (f_u4); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRASI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ASR2) : /* asr2 $u4,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ADDSI (FLD (f_u4), 16); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRASI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDI8) : /* ldi:8 $i8,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi8.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = FLD (f_i8); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDI20) : /* ldi:20 $i20,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi20.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 4); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = FLD (f_i20); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDI32) : /* ldi:32 $i32,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi32.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 6); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = FLD (f_i32); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LD) : /* ld @$Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDUH) : /* lduh @$Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDUB) : /* ldub @$Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDR13) : /* ld @($R13,$Rj),$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDR13UH) : /* lduh @($R13,$Rj),$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDR13UB) : /* ldub @($R13,$Rj),$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDR14) : /* ld @($R14,$disp10),$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDR14UH) : /* lduh @($R14,$disp9),$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14uh.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDR14UB) : /* ldub @($R14,$disp8),$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14ub.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDR15) : /* ld @($R15,$udisp6),$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_udisp6), CPU (h_gr[((UINT) 15)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDR15GR) : /* ld @$R15+,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15gr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE if (NESI (FLD (f_Ri), 15)) { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDR15DR) : /* ld @$R15+,$Rs2 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SET_H_DR (FLD (f_Rs2), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDR15PS) : /* ld @$R15+,$ps */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE USI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE SET_H_PS (opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ST) : /* st $Ri,@$Rj */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Ri); +// OBSOLETE SETMEMSI (current_cpu, pc, * FLD (i_Rj), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STH) : /* sth $Ri,@$Rj */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI opval = * FLD (i_Ri); +// OBSOLETE SETMEMHI (current_cpu, pc, * FLD (i_Rj), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STB) : /* stb $Ri,@$Rj */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = * FLD (i_Ri); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Rj), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STR13) : /* st $Ri,@($R13,$Rj) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Ri); +// OBSOLETE SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STR13H) : /* sth $Ri,@($R13,$Rj) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI opval = * FLD (i_Ri); +// OBSOLETE SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STR13B) : /* stb $Ri,@($R13,$Rj) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = * FLD (i_Ri); +// OBSOLETE SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STR14) : /* st $Ri,@($R14,$disp10) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Ri); +// OBSOLETE SETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STR14H) : /* sth $Ri,@($R14,$disp9) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14h.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI opval = * FLD (i_Ri); +// OBSOLETE SETMEMHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STR14B) : /* stb $Ri,@($R14,$disp8) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14b.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = * FLD (i_Ri); +// OBSOLETE SETMEMQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STR15) : /* st $Ri,@($R15,$udisp6) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str15.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Ri); +// OBSOLETE SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_udisp6)), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STR15GR) : /* st $Ri,@-$R15 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str15gr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = * FLD (i_Ri); +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STR15DR) : /* st $Rs2,@-$R15 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = GET_H_DR (FLD (f_Rs2)); +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STR15PS) : /* st $ps,@-$R15 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = GET_H_PS (); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_MOV) : /* mov $Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Rj); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_MOVDR) : /* mov $Rs1,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_movdr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GET_H_DR (FLD (f_Rs1)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_MOVPS) : /* mov $ps,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_movdr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GET_H_PS (); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_MOV2DR) : /* mov $Ri,$Rs1 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Ri); +// OBSOLETE SET_H_DR (FLD (f_Rs1), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_MOV2PS) : /* mov $Ri,$ps */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE USI opval = * FLD (i_Ri); +// OBSOLETE SET_H_PS (opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_JMP) : /* jmp @$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE USI opval = * FLD (i_Ri); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_JMPD) : /* jmp:d @$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE USI opval = * FLD (i_Ri); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_CALLR) : /* call @$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (pc, 2); +// OBSOLETE SET_H_DR (((UINT) 1), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE USI opval = * FLD (i_Ri); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_CALLRD) : /* call:d @$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (pc, 4); +// OBSOLETE SET_H_DR (((UINT) 1), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE USI opval = * FLD (i_Ri); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_CALL) : /* call $label12 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_call.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (pc, 2); +// OBSOLETE SET_H_DR (((UINT) 1), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label12); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_CALLD) : /* call:d $label12 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_call.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (pc, 4); +// OBSOLETE SET_H_DR (((UINT) 1), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label12); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_RET) : /* ret */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE USI opval = GET_H_DR (((UINT) 1)); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_RET_D) : /* ret:d */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE USI opval = GET_H_DR (((UINT) 1)); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_INT) : /* int $u8 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE ; /*clobber*/ +// OBSOLETE ; /*clobber*/ +// OBSOLETE ; /*clobber*/ +// OBSOLETE { +// OBSOLETE SI opval = fr30_int (current_cpu, pc, FLD (f_u8)); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_INTE) : /* inte */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE ; /*clobber*/ +// OBSOLETE ; /*clobber*/ +// OBSOLETE ; /*clobber*/ +// OBSOLETE { +// OBSOLETE SI opval = fr30_inte (current_cpu, pc); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_RETI) : /* reti */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (EQBI (GET_H_SBIT (), 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 7); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); +// OBSOLETE SET_H_DR (((UINT) 2), opval); +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); +// OBSOLETE SET_H_PS (opval); +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); +// OBSOLETE SET_H_DR (((UINT) 2), opval); +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 7); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); +// OBSOLETE SET_H_DR (((UINT) 3), opval); +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); +// OBSOLETE SET_H_PS (opval); +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); +// OBSOLETE SET_H_DR (((UINT) 3), opval); +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BRAD) : /* bra:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BRA) : /* bra $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BNOD) : /* bno:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BNO) : /* bno $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BEQD) : /* beq:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (CPU (h_zbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BEQ) : /* beq $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (CPU (h_zbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BNED) : /* bne:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BNE) : /* bne $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BCD) : /* bc:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (CPU (h_cbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BC) : /* bc $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (CPU (h_cbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BNCD) : /* bnc:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (CPU (h_cbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BNC) : /* bnc $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (CPU (h_cbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BND) : /* bn:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (CPU (h_nbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BN) : /* bn $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (CPU (h_nbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BPD) : /* bp:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (CPU (h_nbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BP) : /* bp $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (CPU (h_nbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BVD) : /* bv:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (CPU (h_vbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BV) : /* bv $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (CPU (h_vbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BNVD) : /* bnv:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (CPU (h_vbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BNV) : /* bnv $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (CPU (h_vbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BLTD) : /* blt:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (XORBI (CPU (h_vbit), CPU (h_nbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BLT) : /* blt $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (XORBI (CPU (h_vbit), CPU (h_nbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BGED) : /* bge:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BGE) : /* bge $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BLED) : /* ble:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BLE) : /* ble $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BGTD) : /* bgt:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BGT) : /* bgt $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BLSD) : /* bls:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ORBI (CPU (h_cbit), CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BLS) : /* bls $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (ORBI (CPU (h_cbit), CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BHID) : /* bhi:d $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_BHI) : /* bhi $label9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOVR13) : /* dmov $R13,@$dir10 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 13)]); +// OBSOLETE SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOVR13H) : /* dmovh $R13,@$dir9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI opval = CPU (h_gr[((UINT) 13)]); +// OBSOLETE SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOVR13B) : /* dmovb $R13,@$dir8 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = CPU (h_gr[((UINT) 13)]); +// OBSOLETE SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOVR13PI) : /* dmov @$R13+,@$dir10 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); +// OBSOLETE SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOVR13PIH) : /* dmovh @$R13+,@$dir9 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE HI opval = GETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); +// OBSOLETE SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOVR13PIB) : /* dmovb @$R13+,@$dir8 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE QI opval = GETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); +// OBSOLETE SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOVR15PI) : /* dmov @$R15+,@$dir10 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr15pi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOV2R13) : /* dmov @$dir10,$R13 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOV2R13H) : /* dmovh @$dir9,$R13 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOV2R13B) : /* dmovb @$dir8,$R13 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOV2R13PI) : /* dmov @$dir10,@$R13+ */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOV2R13PIH) : /* dmovh @$dir9,@$R13+ */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE HI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); +// OBSOLETE SETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOV2R13PIB) : /* dmovb @$dir8,@$R13+ */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE QI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); +// OBSOLETE SETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_DMOV2R15PD) : /* dmov @$dir10,@-$R15 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr15pi.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDRES) : /* ldres @$Ri+,$u4 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), 4); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STRES) : /* stres $u4,@$Ri+ */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), 4); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_COPOP) : /* copop $u4c,$ccc,$CRj,$CRi */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 4); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_COPLD) : /* copld $u4c,$ccc,$Rjc,$CRi */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 4); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_COPST) : /* copst $u4c,$ccc,$CRj,$Ric */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 4); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_COPSV) : /* copsv $u4c,$ccc,$CRj,$Ric */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 4); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_NOP) : /* nop */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ANDCCR) : /* andccr $u8 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE UQI opval = ANDQI (GET_H_CCR (), FLD (f_u8)); +// OBSOLETE SET_H_CCR (opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ORCCR) : /* orccr $u8 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE UQI opval = ORQI (GET_H_CCR (), FLD (f_u8)); +// OBSOLETE SET_H_CCR (opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STILM) : /* stilm $u8 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE UQI opval = ANDSI (FLD (f_u8), 31); +// OBSOLETE SET_H_ILM (opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ilm", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ADDSP) : /* addsp $s10 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_s10)); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_EXTSB) : /* extsb $Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = EXTQISI (ANDQI (* FLD (i_Ri), 255)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_EXTUB) : /* extub $Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ZEXTQISI (ANDQI (* FLD (i_Ri), 255)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_EXTSH) : /* extsh $Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = EXTHISI (ANDHI (* FLD (i_Ri), 65535)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_EXTUH) : /* extuh $Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ZEXTHISI (ANDHI (* FLD (i_Ri), 65535)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDM0) : /* ldm0 ($reglist_low_ld) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldm0.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 1)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 0)]) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 2)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 1)]) = opval; +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 4)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 2)]) = opval; +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 8)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 3)]) = opval; +// OBSOLETE written |= (1 << 7); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 16)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 4)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 32)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 5)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 64)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 6)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 128)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 7)]) = opval; +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LDM1) : /* ldm1 ($reglist_hi_ld) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldm1.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 1)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 8)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 2)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 9)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 4)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 10)]) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 8)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 11)]) = opval; +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 16)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 12)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 32)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 64)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 14)]) = opval; +// OBSOLETE written |= (1 << 7); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 128)) { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STM0) : /* stm0 ($reglist_low_st) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_stm0.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 1)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 7)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 2)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 6)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 4)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 5)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 8)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 4)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 16)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 3)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 32)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 2)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 64)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 1)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 128)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 0)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_STM1) : /* stm1 ($reglist_hi_st) */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_stm1.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 1)) { +// OBSOLETE { +// OBSOLETE SI tmp_save_r15; +// OBSOLETE tmp_save_r15 = CPU (h_gr[((UINT) 15)]); +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_save_r15; +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 2)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 14)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 4)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 13)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 8)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 12)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 16)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 11)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 32)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 10)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 64)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 9)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 128)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 8)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_ENTER) : /* enter $u10 */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_enter.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 14)]); +// OBSOLETE SETMEMSI (current_cpu, pc, tmp_tmp, opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE CPU (h_gr[((UINT) 14)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), FLD (f_u10)); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_LEAVE) : /* leave */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_enter.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 14)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, SUBSI (CPU (h_gr[((UINT) 15)]), 4)); +// OBSOLETE CPU (h_gr[((UINT) 14)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE CASE (sem, INSN_XCHB) : /* xchb @$Rj,$Ri */ +// OBSOLETE { +// OBSOLETE SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = * FLD (i_Ri); +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE UQI opval = tmp_tmp; +// OBSOLETE SETMEMUQI (current_cpu, pc, * FLD (i_Rj), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE NEXT (vpc); +// OBSOLETE +// OBSOLETE +// OBSOLETE } +// OBSOLETE ENDSWITCH (sem) /* End of semantic switch. */ +// OBSOLETE +// OBSOLETE /* At this point `vpc' contains the next insn to execute. */ +// OBSOLETE } +// OBSOLETE +// OBSOLETE #undef DEFINE_SWITCH +// OBSOLETE #endif /* DEFINE_SWITCH */ diff --git a/sim/fr30/sem.c b/sim/fr30/sem.c index fb90a55..de61ba6 100644 --- a/sim/fr30/sem.c +++ b/sim/fr30/sem.c @@ -1,5730 +1,5729 @@ -/* Simulator instruction semantics for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU fr30bf -#define WANT_CPU_FR30BF - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -/* This is used so that we can compile two copies of the semantic code, - one with full feature support and one without that runs fast(er). - FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ -#if FAST_P -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#else -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) -#endif - -/* x-invalid: --invalid-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - - return vpc; -#undef FLD -} - -/* x-after: --after-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - fr30bf_pbb_after (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-before: --before-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - fr30bf_pbb_before (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-cti-chain: --cti-chain-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF -#ifdef DEFINE_SWITCH - vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-chain: --chain-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - vpc = fr30bf_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-begin: --begin-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = fr30bf_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = fr30bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = fr30bf_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* add: add $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* addi: add $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* add2: add2 $m4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,add2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* addc: addc $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ADDCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - { - BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = tmp_tmp; - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* addn: addn $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addni: addn $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addni) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addn2: addn2 $m4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addn2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sub: sub $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* subc: subc $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,subc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = SUBCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = tmp_tmp; - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* subn: subn $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,subn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmp: cmp $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* cmpi: cmp $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_u4)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* cmp2: cmp2 $m4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,cmp2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_m4)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* and: and $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ANDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* or: or $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ORSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* eor: eor $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,eor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = XORSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* andm: and $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,andm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ANDSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* andh: andh $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,andh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = ANDHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* andb: andb $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,andb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* orm: or $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,orm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* orh: orh $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,orh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = ORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* orb: orb $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,orb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* eorm: eor $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,eorm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = XORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* eorh: eorh $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,eorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = XORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* eorb: eorb $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,eorb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = XORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* bandl: bandl $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bandl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ANDQI (ORQI (FLD (f_u4), 240), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* borl: borl $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,borl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* beorl: beorl $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,beorl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = XORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* bandh: bandh $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bandh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ANDQI (ORQI (SLLQI (FLD (f_u4), 4), 15), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* borh: borh $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,borh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* beorh: beorh $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,beorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = XORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* btstl: btstl $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,btstl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = 0; - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* btsth: btsth $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,btsth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* mul: mul $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp; - tmp_tmp = MULDI (EXTSIDI (* FLD (i_Rj)), EXTSIDI (* FLD (i_Ri))); - { - SI opval = TRUNCDISI (tmp_tmp); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQDI (tmp_tmp, MAKEDI (0, 0)); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = ORIF (GTDI (tmp_tmp, MAKEDI (0, 2147483647)), LTDI (tmp_tmp, NEGDI (MAKEDI (0, 0x80000000)))); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* mulu: mulu $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp; - tmp_tmp = MULDI (ZEXTSIDI (* FLD (i_Rj)), ZEXTSIDI (* FLD (i_Ri))); - { - SI opval = TRUNCDISI (tmp_tmp); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 4)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = NESI (GET_H_DR (((UINT) 4)), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* mulh: mulh $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mulh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = MULHI (TRUNCSIHI (* FLD (i_Rj)), TRUNCSIHI (* FLD (i_Ri))); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = GESI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* muluh: muluh $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,muluh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = MULSI (ANDSI (* FLD (i_Rj), 65535), ANDSI (* FLD (i_Ri), 65535)); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = GESI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* div0s: div0s $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div0s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_d0bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); - } - { - BI opval = XORBI (CPU (h_d0bit), LTSI (* FLD (i_Ri), 0)); - CPU (h_d1bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); - } -if (NEBI (CPU (h_d0bit), 0)) { - { - SI opval = 0xffffffff; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} else { - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* div0u: div0u $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div0u) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = 0; - CPU (h_d0bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); - } - { - BI opval = 0; - CPU (h_d1bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); - } - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* div1: div1 $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - { - SI opval = SLLSI (GET_H_DR (((UINT) 4)), 1); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -if (LTSI (GET_H_DR (((UINT) 5)), 0)) { - { - SI opval = ADDSI (GET_H_DR (((UINT) 4)), 1); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - { - SI opval = SLLSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -if (EQBI (CPU (h_d1bit), 1)) { -{ - tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} else { -{ - tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} -if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) { -{ - { - SI opval = tmp_tmp; - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = ORSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - { - BI opval = EQSI (GET_H_DR (((UINT) 4)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* div2: div2 $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; -if (EQBI (CPU (h_d1bit), 1)) { -{ - tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} else { -{ - tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} -if (EQSI (tmp_tmp, 0)) { -{ - { - BI opval = 1; - CPU (h_zbit) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_zbit) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* div3: div3 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (CPU (h_zbit), 1)) { - { - SI opval = ADDSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* div4s: div4s */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div4s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (CPU (h_d1bit), 1)) { - { - SI opval = NEGSI (GET_H_DR (((UINT) 5))); - SET_H_DR (((UINT) 5), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsl: lsl $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsli: lsl $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsl2: lsl2 $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsl2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsr: lsr $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsri: lsr $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsr2: lsr2 $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* asr: asr $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,asr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* asri: asr $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,asri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* asr2: asr2 $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,asr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ldi8: ldi:8 $i8,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi8.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = FLD (f_i8); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldi20: ldi:20 $i20,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldi20) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi20.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_i20); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldi32: ldi:32 $i32,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldi32) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi32.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 6); - - { - SI opval = FLD (f_i32); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld: ld @$Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lduh: lduh @$Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldub: ldub @$Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr13: ld @($R13,$Rj),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr13uh: lduh @($R13,$Rj),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr13uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr13ub: ldub @($R13,$Rj),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr13ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr14: ld @($R14,$disp10),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr14) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr14uh: lduh @($R14,$disp9),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr14uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14uh.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr14ub: ldub @($R14,$disp8),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr14ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14ub.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr15: ld @($R15,$udisp6),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr15) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_udisp6), CPU (h_gr[((UINT) 15)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr15gr: ld @$R15+,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15gr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -if (NESI (FLD (f_Ri), 15)) { - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ldr15dr: ld @$R15+,$Rs2 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SET_H_DR (FLD (f_Rs2), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldr15ps: ld @$R15+,$ps */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - SET_H_PS (opval); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* st: st $Ri,@$Rj */ - -static SEM_PC -SEM_FN_NAME (fr30bf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sth: sth $Ri,@$Rj */ - -static SEM_PC -SEM_FN_NAME (fr30bf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stb: stb $Ri,@$Rj */ - -static SEM_PC -SEM_FN_NAME (fr30bf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str13: st $Ri,@($R13,$Rj) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str13h: sth $Ri,@($R13,$Rj) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str13b: stb $Ri,@($R13,$Rj) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str14: st $Ri,@($R14,$disp10) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str14) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str14h: sth $Ri,@($R14,$disp9) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str14h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14h.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str14b: stb $Ri,@($R14,$disp8) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str14b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14b.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str15: st $Ri,@($R15,$udisp6) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str15) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str15.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_udisp6)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str15gr: st $Ri,@-$R15 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str15gr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = * FLD (i_Ri); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* str15dr: st $Rs2,@-$R15 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = GET_H_DR (FLD (f_Rs2)); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* str15ps: st $ps,@-$R15 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GET_H_PS (); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* mov: mov $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Rj); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movdr: mov $Rs1,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,movdr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movdr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_DR (FLD (f_Rs1)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movps: mov $ps,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,movps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movdr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_PS (); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mov2dr: mov $Ri,$Rs1 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mov2dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SET_H_DR (FLD (f_Rs1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mov2ps: mov $Ri,$ps */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mov2ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_Ri); - SET_H_PS (opval); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* jmp: jmp @$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* jmpd: jmp:d @$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,jmpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* callr: call @$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,callr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (pc, 2); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* callrd: call:d @$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,callrd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDSI (pc, 4); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* call: call $label12 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_call.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (pc, 2); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* calld: call:d $label12 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,calld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_call.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDSI (pc, 4); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* ret: ret */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = GET_H_DR (((UINT) 1)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* ret:d: ret:d */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ret_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GET_H_DR (((UINT) 1)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* int: int $u8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,int) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -; /*clobber*/ -; /*clobber*/ -; /*clobber*/ - { - SI opval = fr30_int (current_cpu, pc, FLD (f_u8)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* inte: inte */ - -static SEM_PC -SEM_FN_NAME (fr30bf,inte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -; /*clobber*/ -; /*clobber*/ -; /*clobber*/ - { - SI opval = fr30_inte (current_cpu, pc); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* reti: reti */ - -static SEM_PC -SEM_FN_NAME (fr30bf,reti) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (GET_H_SBIT (), 0)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); - SET_H_DR (((UINT) 2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); - SET_H_PS (opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); - SET_H_DR (((UINT) 2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} else { -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); - SET_H_DR (((UINT) 3), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); - SET_H_PS (opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); - SET_H_DR (((UINT) 3), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* brad: bra:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,brad) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bra: bra $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnod: bno:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bnod) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -((void) 0); /*nop*/ -} - - return vpc; -#undef FLD -} - -/* bno: bno $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* beqd: beq:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,beqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_zbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* beq: beq $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_zbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bned: bne:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bned) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bne: bne $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bcd: bc:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bcd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_cbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bc: bc $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bncd: bnc:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bncd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_cbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnc: bnc $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnd: bn:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bnd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_nbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bn: bn $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_nbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bpd: bp:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bp: bp $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bvd: bv:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_vbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bv: bv $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_vbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnvd: bnv:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bnvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_vbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnv: bnv $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bnv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_vbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bltd: blt:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bltd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (XORBI (CPU (h_vbit), CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* blt: blt $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,blt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (XORBI (CPU (h_vbit), CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bged: bge:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bged) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bge: bge $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bled: ble:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bled) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* ble: ble $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bgtd: bgt:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bgtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bgt: bgt $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bgt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* blsd: bls:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,blsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ORBI (CPU (h_cbit), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bls: bls $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ORBI (CPU (h_cbit), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bhid: bhi:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bhid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bhi: bhi $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* dmovr13: dmov $R13,@$dir10 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = CPU (h_gr[((UINT) 13)]); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmovr13h: dmovh $R13,@$dir9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = CPU (h_gr[((UINT) 13)]); - SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmovr13b: dmovb $R13,@$dir8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = CPU (h_gr[((UINT) 13)]); - SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmovr13pi: dmov @$R13+,@$dir10 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmovr13pih: dmovh @$R13+,@$dir9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - HI opval = GETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmovr13pib: dmovb @$R13+,@$dir8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - QI opval = GETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmovr15pi: dmov @$R15+,@$dir10 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr15pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmov2r13: dmov @$dir10,$R13 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmov2r13h: dmovh @$dir9,$R13 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmov2r13b: dmovb @$dir8,$R13 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmov2r13pi: dmov @$dir10,@$R13+ */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmov2r13pih: dmovh @$dir9,@$R13+ */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - HI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); - SETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmov2r13pib: dmovb @$dir8,@$R13+ */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - QI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); - SETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmov2r15pd: dmov @$dir10,@-$R15 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r15pd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldres: ldres @$Ri+,$u4 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldres) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), 4); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stres: stres $u4,@$Ri+ */ - -static SEM_PC -SEM_FN_NAME (fr30bf,stres) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), 4); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* copop: copop $u4c,$ccc,$CRj,$CRi */ - -static SEM_PC -SEM_FN_NAME (fr30bf,copop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* copld: copld $u4c,$ccc,$Rjc,$CRi */ - -static SEM_PC -SEM_FN_NAME (fr30bf,copld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* copst: copst $u4c,$ccc,$CRj,$Ric */ - -static SEM_PC -SEM_FN_NAME (fr30bf,copst) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* copsv: copsv $u4c,$ccc,$CRj,$Ric */ - -static SEM_PC -SEM_FN_NAME (fr30bf,copsv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* nop: nop */ - -static SEM_PC -SEM_FN_NAME (fr30bf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* andccr: andccr $u8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,andccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ANDQI (GET_H_CCR (), FLD (f_u8)); - SET_H_CCR (opval); - TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* orccr: orccr $u8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,orccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ORQI (GET_H_CCR (), FLD (f_u8)); - SET_H_CCR (opval); - TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stilm: stilm $u8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,stilm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ANDSI (FLD (f_u8), 31); - SET_H_ILM (opval); - TRACE_RESULT (current_cpu, abuf, "ilm", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addsp: addsp $s10 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addsp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_s10)); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extsb: extsb $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,extsb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (ANDQI (* FLD (i_Ri), 255)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extub: extub $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,extub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTQISI (ANDQI (* FLD (i_Ri), 255)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extsh: extsh $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,extsh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (ANDHI (* FLD (i_Ri), 65535)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extuh: extuh $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,extuh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTHISI (ANDHI (* FLD (i_Ri), 65535)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldm0: ldm0 ($reglist_low_ld) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldm0.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_low_ld), 1)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 0)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 2)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 1)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 4)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 2)]) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 8)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 3)]) = opval; - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 16)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 4)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 32)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 5)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 64)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 6)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 128)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 7)]) = opval; - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ldm1: ldm1 ($reglist_hi_ld) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldm1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_hi_ld), 1)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 8)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 2)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 9)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 4)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 10)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 8)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 11)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 16)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 12)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 32)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 13)]) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 64)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 14)]) = opval; - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 128)) { - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* stm0: stm0 ($reglist_low_st) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,stm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stm0.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_low_st), 1)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 7)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 2)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 6)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 4)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 5)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 8)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 4)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 16)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 3)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 32)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 2)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 64)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 1)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 128)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 0)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* stm1: stm1 ($reglist_hi_st) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,stm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stm1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_hi_st), 1)) { -{ - SI tmp_save_r15; - tmp_save_r15 = CPU (h_gr[((UINT) 15)]); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_save_r15; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 2)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 14)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 4)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 13)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 8)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 12)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 16)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 11)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 32)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 10)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 64)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 9)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 128)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 8)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* enter: enter $u10 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,enter) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_enter.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - { - SI opval = CPU (h_gr[((UINT) 14)]); - SETMEMSI (current_cpu, pc, tmp_tmp, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_tmp; - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), FLD (f_u10)); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* leave: leave */ - -static SEM_PC -SEM_FN_NAME (fr30bf,leave) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_enter.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (CPU (h_gr[((UINT) 14)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, SUBSI (CPU (h_gr[((UINT) 15)]), 4)); - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* xchb: xchb @$Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,xchb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = * FLD (i_Ri); - { - SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - UQI opval = tmp_tmp; - SETMEMUQI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* Table of all semantic fns. */ - -static const struct sem_fn_desc sem_fns[] = { - { FR30BF_INSN_X_INVALID, SEM_FN_NAME (fr30bf,x_invalid) }, - { FR30BF_INSN_X_AFTER, SEM_FN_NAME (fr30bf,x_after) }, - { FR30BF_INSN_X_BEFORE, SEM_FN_NAME (fr30bf,x_before) }, - { FR30BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (fr30bf,x_cti_chain) }, - { FR30BF_INSN_X_CHAIN, SEM_FN_NAME (fr30bf,x_chain) }, - { FR30BF_INSN_X_BEGIN, SEM_FN_NAME (fr30bf,x_begin) }, - { FR30BF_INSN_ADD, SEM_FN_NAME (fr30bf,add) }, - { FR30BF_INSN_ADDI, SEM_FN_NAME (fr30bf,addi) }, - { FR30BF_INSN_ADD2, SEM_FN_NAME (fr30bf,add2) }, - { FR30BF_INSN_ADDC, SEM_FN_NAME (fr30bf,addc) }, - { FR30BF_INSN_ADDN, SEM_FN_NAME (fr30bf,addn) }, - { FR30BF_INSN_ADDNI, SEM_FN_NAME (fr30bf,addni) }, - { FR30BF_INSN_ADDN2, SEM_FN_NAME (fr30bf,addn2) }, - { FR30BF_INSN_SUB, SEM_FN_NAME (fr30bf,sub) }, - { FR30BF_INSN_SUBC, SEM_FN_NAME (fr30bf,subc) }, - { FR30BF_INSN_SUBN, SEM_FN_NAME (fr30bf,subn) }, - { FR30BF_INSN_CMP, SEM_FN_NAME (fr30bf,cmp) }, - { FR30BF_INSN_CMPI, SEM_FN_NAME (fr30bf,cmpi) }, - { FR30BF_INSN_CMP2, SEM_FN_NAME (fr30bf,cmp2) }, - { FR30BF_INSN_AND, SEM_FN_NAME (fr30bf,and) }, - { FR30BF_INSN_OR, SEM_FN_NAME (fr30bf,or) }, - { FR30BF_INSN_EOR, SEM_FN_NAME (fr30bf,eor) }, - { FR30BF_INSN_ANDM, SEM_FN_NAME (fr30bf,andm) }, - { FR30BF_INSN_ANDH, SEM_FN_NAME (fr30bf,andh) }, - { FR30BF_INSN_ANDB, SEM_FN_NAME (fr30bf,andb) }, - { FR30BF_INSN_ORM, SEM_FN_NAME (fr30bf,orm) }, - { FR30BF_INSN_ORH, SEM_FN_NAME (fr30bf,orh) }, - { FR30BF_INSN_ORB, SEM_FN_NAME (fr30bf,orb) }, - { FR30BF_INSN_EORM, SEM_FN_NAME (fr30bf,eorm) }, - { FR30BF_INSN_EORH, SEM_FN_NAME (fr30bf,eorh) }, - { FR30BF_INSN_EORB, SEM_FN_NAME (fr30bf,eorb) }, - { FR30BF_INSN_BANDL, SEM_FN_NAME (fr30bf,bandl) }, - { FR30BF_INSN_BORL, SEM_FN_NAME (fr30bf,borl) }, - { FR30BF_INSN_BEORL, SEM_FN_NAME (fr30bf,beorl) }, - { FR30BF_INSN_BANDH, SEM_FN_NAME (fr30bf,bandh) }, - { FR30BF_INSN_BORH, SEM_FN_NAME (fr30bf,borh) }, - { FR30BF_INSN_BEORH, SEM_FN_NAME (fr30bf,beorh) }, - { FR30BF_INSN_BTSTL, SEM_FN_NAME (fr30bf,btstl) }, - { FR30BF_INSN_BTSTH, SEM_FN_NAME (fr30bf,btsth) }, - { FR30BF_INSN_MUL, SEM_FN_NAME (fr30bf,mul) }, - { FR30BF_INSN_MULU, SEM_FN_NAME (fr30bf,mulu) }, - { FR30BF_INSN_MULH, SEM_FN_NAME (fr30bf,mulh) }, - { FR30BF_INSN_MULUH, SEM_FN_NAME (fr30bf,muluh) }, - { FR30BF_INSN_DIV0S, SEM_FN_NAME (fr30bf,div0s) }, - { FR30BF_INSN_DIV0U, SEM_FN_NAME (fr30bf,div0u) }, - { FR30BF_INSN_DIV1, SEM_FN_NAME (fr30bf,div1) }, - { FR30BF_INSN_DIV2, SEM_FN_NAME (fr30bf,div2) }, - { FR30BF_INSN_DIV3, SEM_FN_NAME (fr30bf,div3) }, - { FR30BF_INSN_DIV4S, SEM_FN_NAME (fr30bf,div4s) }, - { FR30BF_INSN_LSL, SEM_FN_NAME (fr30bf,lsl) }, - { FR30BF_INSN_LSLI, SEM_FN_NAME (fr30bf,lsli) }, - { FR30BF_INSN_LSL2, SEM_FN_NAME (fr30bf,lsl2) }, - { FR30BF_INSN_LSR, SEM_FN_NAME (fr30bf,lsr) }, - { FR30BF_INSN_LSRI, SEM_FN_NAME (fr30bf,lsri) }, - { FR30BF_INSN_LSR2, SEM_FN_NAME (fr30bf,lsr2) }, - { FR30BF_INSN_ASR, SEM_FN_NAME (fr30bf,asr) }, - { FR30BF_INSN_ASRI, SEM_FN_NAME (fr30bf,asri) }, - { FR30BF_INSN_ASR2, SEM_FN_NAME (fr30bf,asr2) }, - { FR30BF_INSN_LDI8, SEM_FN_NAME (fr30bf,ldi8) }, - { FR30BF_INSN_LDI20, SEM_FN_NAME (fr30bf,ldi20) }, - { FR30BF_INSN_LDI32, SEM_FN_NAME (fr30bf,ldi32) }, - { FR30BF_INSN_LD, SEM_FN_NAME (fr30bf,ld) }, - { FR30BF_INSN_LDUH, SEM_FN_NAME (fr30bf,lduh) }, - { FR30BF_INSN_LDUB, SEM_FN_NAME (fr30bf,ldub) }, - { FR30BF_INSN_LDR13, SEM_FN_NAME (fr30bf,ldr13) }, - { FR30BF_INSN_LDR13UH, SEM_FN_NAME (fr30bf,ldr13uh) }, - { FR30BF_INSN_LDR13UB, SEM_FN_NAME (fr30bf,ldr13ub) }, - { FR30BF_INSN_LDR14, SEM_FN_NAME (fr30bf,ldr14) }, - { FR30BF_INSN_LDR14UH, SEM_FN_NAME (fr30bf,ldr14uh) }, - { FR30BF_INSN_LDR14UB, SEM_FN_NAME (fr30bf,ldr14ub) }, - { FR30BF_INSN_LDR15, SEM_FN_NAME (fr30bf,ldr15) }, - { FR30BF_INSN_LDR15GR, SEM_FN_NAME (fr30bf,ldr15gr) }, - { FR30BF_INSN_LDR15DR, SEM_FN_NAME (fr30bf,ldr15dr) }, - { FR30BF_INSN_LDR15PS, SEM_FN_NAME (fr30bf,ldr15ps) }, - { FR30BF_INSN_ST, SEM_FN_NAME (fr30bf,st) }, - { FR30BF_INSN_STH, SEM_FN_NAME (fr30bf,sth) }, - { FR30BF_INSN_STB, SEM_FN_NAME (fr30bf,stb) }, - { FR30BF_INSN_STR13, SEM_FN_NAME (fr30bf,str13) }, - { FR30BF_INSN_STR13H, SEM_FN_NAME (fr30bf,str13h) }, - { FR30BF_INSN_STR13B, SEM_FN_NAME (fr30bf,str13b) }, - { FR30BF_INSN_STR14, SEM_FN_NAME (fr30bf,str14) }, - { FR30BF_INSN_STR14H, SEM_FN_NAME (fr30bf,str14h) }, - { FR30BF_INSN_STR14B, SEM_FN_NAME (fr30bf,str14b) }, - { FR30BF_INSN_STR15, SEM_FN_NAME (fr30bf,str15) }, - { FR30BF_INSN_STR15GR, SEM_FN_NAME (fr30bf,str15gr) }, - { FR30BF_INSN_STR15DR, SEM_FN_NAME (fr30bf,str15dr) }, - { FR30BF_INSN_STR15PS, SEM_FN_NAME (fr30bf,str15ps) }, - { FR30BF_INSN_MOV, SEM_FN_NAME (fr30bf,mov) }, - { FR30BF_INSN_MOVDR, SEM_FN_NAME (fr30bf,movdr) }, - { FR30BF_INSN_MOVPS, SEM_FN_NAME (fr30bf,movps) }, - { FR30BF_INSN_MOV2DR, SEM_FN_NAME (fr30bf,mov2dr) }, - { FR30BF_INSN_MOV2PS, SEM_FN_NAME (fr30bf,mov2ps) }, - { FR30BF_INSN_JMP, SEM_FN_NAME (fr30bf,jmp) }, - { FR30BF_INSN_JMPD, SEM_FN_NAME (fr30bf,jmpd) }, - { FR30BF_INSN_CALLR, SEM_FN_NAME (fr30bf,callr) }, - { FR30BF_INSN_CALLRD, SEM_FN_NAME (fr30bf,callrd) }, - { FR30BF_INSN_CALL, SEM_FN_NAME (fr30bf,call) }, - { FR30BF_INSN_CALLD, SEM_FN_NAME (fr30bf,calld) }, - { FR30BF_INSN_RET, SEM_FN_NAME (fr30bf,ret) }, - { FR30BF_INSN_RET_D, SEM_FN_NAME (fr30bf,ret_d) }, - { FR30BF_INSN_INT, SEM_FN_NAME (fr30bf,int) }, - { FR30BF_INSN_INTE, SEM_FN_NAME (fr30bf,inte) }, - { FR30BF_INSN_RETI, SEM_FN_NAME (fr30bf,reti) }, - { FR30BF_INSN_BRAD, SEM_FN_NAME (fr30bf,brad) }, - { FR30BF_INSN_BRA, SEM_FN_NAME (fr30bf,bra) }, - { FR30BF_INSN_BNOD, SEM_FN_NAME (fr30bf,bnod) }, - { FR30BF_INSN_BNO, SEM_FN_NAME (fr30bf,bno) }, - { FR30BF_INSN_BEQD, SEM_FN_NAME (fr30bf,beqd) }, - { FR30BF_INSN_BEQ, SEM_FN_NAME (fr30bf,beq) }, - { FR30BF_INSN_BNED, SEM_FN_NAME (fr30bf,bned) }, - { FR30BF_INSN_BNE, SEM_FN_NAME (fr30bf,bne) }, - { FR30BF_INSN_BCD, SEM_FN_NAME (fr30bf,bcd) }, - { FR30BF_INSN_BC, SEM_FN_NAME (fr30bf,bc) }, - { FR30BF_INSN_BNCD, SEM_FN_NAME (fr30bf,bncd) }, - { FR30BF_INSN_BNC, SEM_FN_NAME (fr30bf,bnc) }, - { FR30BF_INSN_BND, SEM_FN_NAME (fr30bf,bnd) }, - { FR30BF_INSN_BN, SEM_FN_NAME (fr30bf,bn) }, - { FR30BF_INSN_BPD, SEM_FN_NAME (fr30bf,bpd) }, - { FR30BF_INSN_BP, SEM_FN_NAME (fr30bf,bp) }, - { FR30BF_INSN_BVD, SEM_FN_NAME (fr30bf,bvd) }, - { FR30BF_INSN_BV, SEM_FN_NAME (fr30bf,bv) }, - { FR30BF_INSN_BNVD, SEM_FN_NAME (fr30bf,bnvd) }, - { FR30BF_INSN_BNV, SEM_FN_NAME (fr30bf,bnv) }, - { FR30BF_INSN_BLTD, SEM_FN_NAME (fr30bf,bltd) }, - { FR30BF_INSN_BLT, SEM_FN_NAME (fr30bf,blt) }, - { FR30BF_INSN_BGED, SEM_FN_NAME (fr30bf,bged) }, - { FR30BF_INSN_BGE, SEM_FN_NAME (fr30bf,bge) }, - { FR30BF_INSN_BLED, SEM_FN_NAME (fr30bf,bled) }, - { FR30BF_INSN_BLE, SEM_FN_NAME (fr30bf,ble) }, - { FR30BF_INSN_BGTD, SEM_FN_NAME (fr30bf,bgtd) }, - { FR30BF_INSN_BGT, SEM_FN_NAME (fr30bf,bgt) }, - { FR30BF_INSN_BLSD, SEM_FN_NAME (fr30bf,blsd) }, - { FR30BF_INSN_BLS, SEM_FN_NAME (fr30bf,bls) }, - { FR30BF_INSN_BHID, SEM_FN_NAME (fr30bf,bhid) }, - { FR30BF_INSN_BHI, SEM_FN_NAME (fr30bf,bhi) }, - { FR30BF_INSN_DMOVR13, SEM_FN_NAME (fr30bf,dmovr13) }, - { FR30BF_INSN_DMOVR13H, SEM_FN_NAME (fr30bf,dmovr13h) }, - { FR30BF_INSN_DMOVR13B, SEM_FN_NAME (fr30bf,dmovr13b) }, - { FR30BF_INSN_DMOVR13PI, SEM_FN_NAME (fr30bf,dmovr13pi) }, - { FR30BF_INSN_DMOVR13PIH, SEM_FN_NAME (fr30bf,dmovr13pih) }, - { FR30BF_INSN_DMOVR13PIB, SEM_FN_NAME (fr30bf,dmovr13pib) }, - { FR30BF_INSN_DMOVR15PI, SEM_FN_NAME (fr30bf,dmovr15pi) }, - { FR30BF_INSN_DMOV2R13, SEM_FN_NAME (fr30bf,dmov2r13) }, - { FR30BF_INSN_DMOV2R13H, SEM_FN_NAME (fr30bf,dmov2r13h) }, - { FR30BF_INSN_DMOV2R13B, SEM_FN_NAME (fr30bf,dmov2r13b) }, - { FR30BF_INSN_DMOV2R13PI, SEM_FN_NAME (fr30bf,dmov2r13pi) }, - { FR30BF_INSN_DMOV2R13PIH, SEM_FN_NAME (fr30bf,dmov2r13pih) }, - { FR30BF_INSN_DMOV2R13PIB, SEM_FN_NAME (fr30bf,dmov2r13pib) }, - { FR30BF_INSN_DMOV2R15PD, SEM_FN_NAME (fr30bf,dmov2r15pd) }, - { FR30BF_INSN_LDRES, SEM_FN_NAME (fr30bf,ldres) }, - { FR30BF_INSN_STRES, SEM_FN_NAME (fr30bf,stres) }, - { FR30BF_INSN_COPOP, SEM_FN_NAME (fr30bf,copop) }, - { FR30BF_INSN_COPLD, SEM_FN_NAME (fr30bf,copld) }, - { FR30BF_INSN_COPST, SEM_FN_NAME (fr30bf,copst) }, - { FR30BF_INSN_COPSV, SEM_FN_NAME (fr30bf,copsv) }, - { FR30BF_INSN_NOP, SEM_FN_NAME (fr30bf,nop) }, - { FR30BF_INSN_ANDCCR, SEM_FN_NAME (fr30bf,andccr) }, - { FR30BF_INSN_ORCCR, SEM_FN_NAME (fr30bf,orccr) }, - { FR30BF_INSN_STILM, SEM_FN_NAME (fr30bf,stilm) }, - { FR30BF_INSN_ADDSP, SEM_FN_NAME (fr30bf,addsp) }, - { FR30BF_INSN_EXTSB, SEM_FN_NAME (fr30bf,extsb) }, - { FR30BF_INSN_EXTUB, SEM_FN_NAME (fr30bf,extub) }, - { FR30BF_INSN_EXTSH, SEM_FN_NAME (fr30bf,extsh) }, - { FR30BF_INSN_EXTUH, SEM_FN_NAME (fr30bf,extuh) }, - { FR30BF_INSN_LDM0, SEM_FN_NAME (fr30bf,ldm0) }, - { FR30BF_INSN_LDM1, SEM_FN_NAME (fr30bf,ldm1) }, - { FR30BF_INSN_STM0, SEM_FN_NAME (fr30bf,stm0) }, - { FR30BF_INSN_STM1, SEM_FN_NAME (fr30bf,stm1) }, - { FR30BF_INSN_ENTER, SEM_FN_NAME (fr30bf,enter) }, - { FR30BF_INSN_LEAVE, SEM_FN_NAME (fr30bf,leave) }, - { FR30BF_INSN_XCHB, SEM_FN_NAME (fr30bf,xchb) }, - { 0, 0 } -}; - -/* Add the semantic fns to IDESC_TABLE. */ - -void -SEM_FN_NAME (fr30bf,init_idesc_table) (SIM_CPU *current_cpu) -{ - IDESC *idesc_table = CPU_IDESC (current_cpu); - const struct sem_fn_desc *sf; - int mach_num = MACH_NUM (CPU_MACH (current_cpu)); - - for (sf = &sem_fns[0]; sf->fn != 0; ++sf) - { - const CGEN_INSN *insn = idesc_table[sf->index].idata; - int valid_p = (CGEN_INSN_VIRTUAL_P (insn) - || CGEN_INSN_MACH_HAS_P (insn, mach_num)); -#if FAST_P - if (valid_p) - idesc_table[sf->index].sem_fast = sf->fn; - else - idesc_table[sf->index].sem_fast = SEM_FN_NAME (fr30bf,x_invalid); -#else - if (valid_p) - idesc_table[sf->index].sem_full = sf->fn; - else - idesc_table[sf->index].sem_full = SEM_FN_NAME (fr30bf,x_invalid); -#endif - } -} - +// OBSOLETE /* Simulator instruction semantics for fr30bf. +// OBSOLETE +// OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN. +// OBSOLETE +// OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +// OBSOLETE +// OBSOLETE */ +// OBSOLETE +// OBSOLETE #define WANT_CPU fr30bf +// OBSOLETE #define WANT_CPU_FR30BF +// OBSOLETE +// OBSOLETE #include "sim-main.h" +// OBSOLETE #include "cgen-mem.h" +// OBSOLETE #include "cgen-ops.h" +// OBSOLETE +// OBSOLETE #undef GET_ATTR +// OBSOLETE #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) +// OBSOLETE #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) +// OBSOLETE #else +// OBSOLETE #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE /* This is used so that we can compile two copies of the semantic code, +// OBSOLETE one with full feature support and one without that runs fast(er). +// OBSOLETE FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ +// OBSOLETE #if FAST_P +// OBSOLETE #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) +// OBSOLETE #undef TRACE_RESULT +// OBSOLETE #define TRACE_RESULT(cpu, abuf, name, type, val) +// OBSOLETE #else +// OBSOLETE #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE /* x-invalid: --invalid-- */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE /* Update the recorded pc in the cpu state struct. +// OBSOLETE Only necessary for WITH_SCACHE case, but to avoid the +// OBSOLETE conditional compilation .... */ +// OBSOLETE SET_H_PC (pc); +// OBSOLETE /* Virtual insns have zero size. Overwrite vpc with address of next insn +// OBSOLETE using the default-insn-bitsize spec. When executing insns in parallel +// OBSOLETE we may want to queue the fault and continue execution. */ +// OBSOLETE vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* x-after: --after-- */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE_PBB_FR30BF +// OBSOLETE fr30bf_pbb_after (current_cpu, sem_arg); +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* x-before: --before-- */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE_PBB_FR30BF +// OBSOLETE fr30bf_pbb_before (current_cpu, sem_arg); +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* x-cti-chain: --cti-chain-- */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE_PBB_FR30BF +// OBSOLETE #ifdef DEFINE_SWITCH +// OBSOLETE vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, +// OBSOLETE pbb_br_type, pbb_br_npc); +// OBSOLETE BREAK (sem); +// OBSOLETE #else +// OBSOLETE /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ +// OBSOLETE vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, +// OBSOLETE CPU_PBB_BR_TYPE (current_cpu), +// OBSOLETE CPU_PBB_BR_NPC (current_cpu)); +// OBSOLETE #endif +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* x-chain: --chain-- */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE_PBB_FR30BF +// OBSOLETE vpc = fr30bf_pbb_chain (current_cpu, sem_arg); +// OBSOLETE #ifdef DEFINE_SWITCH +// OBSOLETE BREAK (sem); +// OBSOLETE #endif +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* x-begin: --begin-- */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); +// OBSOLETE +// OBSOLETE { +// OBSOLETE #if WITH_SCACHE_PBB_FR30BF +// OBSOLETE #if defined DEFINE_SWITCH || defined FAST_P +// OBSOLETE /* In the switch case FAST_P is a constant, allowing several optimizations +// OBSOLETE in any called inline functions. */ +// OBSOLETE vpc = fr30bf_pbb_begin (current_cpu, FAST_P); +// OBSOLETE #else +// OBSOLETE #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ +// OBSOLETE vpc = fr30bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); +// OBSOLETE #else +// OBSOLETE vpc = fr30bf_pbb_begin (current_cpu, 0); +// OBSOLETE #endif +// OBSOLETE #endif +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* add: add $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* addi: add $u4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_u4), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_u4), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* add2: add2 $m4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,add2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_m4), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_m4), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* addc: addc $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = ADDCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE { +// OBSOLETE BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* addn: addn $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,addn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* addni: addn $u4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,addni) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* addn2: addn2 $m4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,addn2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* sub: sub $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* subc: subc $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,subc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = SUBCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE { +// OBSOLETE BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* subn: subn $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,subn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* cmp: cmp $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp1; +// OBSOLETE { +// OBSOLETE BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE tmp_tmp1 = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* cmpi: cmp $u4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp1; +// OBSOLETE { +// OBSOLETE BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_u4), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_u4), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_u4)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* cmp2: cmp2 $m4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,cmp2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp1; +// OBSOLETE { +// OBSOLETE BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_m4), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_m4), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_m4)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp1, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* and: and $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ANDSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* or: or $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ORSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* eor: eor $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,eor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = XORSI (* FLD (i_Ri), * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* andm: and $Rj,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,andm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = ANDSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* andh: andh $Rj,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,andh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI tmp_tmp; +// OBSOLETE tmp_tmp = ANDHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQHI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTHI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE HI opval = tmp_tmp; +// OBSOLETE SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* andb: andb $Rj,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,andb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI tmp_tmp; +// OBSOLETE tmp_tmp = ANDQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQQI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTQI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE QI opval = tmp_tmp; +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* orm: or $Rj,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,orm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = ORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* orh: orh $Rj,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,orh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI tmp_tmp; +// OBSOLETE tmp_tmp = ORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQHI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTHI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE HI opval = tmp_tmp; +// OBSOLETE SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* orb: orb $Rj,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,orb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI tmp_tmp; +// OBSOLETE tmp_tmp = ORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQQI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTQI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE QI opval = tmp_tmp; +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* eorm: eor $Rj,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,eorm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = XORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQSI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* eorh: eorh $Rj,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,eorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI tmp_tmp; +// OBSOLETE tmp_tmp = XORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQHI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTHI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE HI opval = tmp_tmp; +// OBSOLETE SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* eorb: eorb $Rj,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,eorb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI tmp_tmp; +// OBSOLETE tmp_tmp = XORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = EQQI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTQI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE QI opval = tmp_tmp; +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bandl: bandl $u4,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bandl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = ANDQI (ORQI (FLD (f_u4), 240), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* borl: borl $u4,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,borl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = ORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* beorl: beorl $u4,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,beorl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = XORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bandh: bandh $u4,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bandh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = ANDQI (ORQI (SLLQI (FLD (f_u4), 4), 15), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* borh: borh $u4,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,borh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = ORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* beorh: beorh $u4,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,beorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = XORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* btstl: btstl $u4,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,btstl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI tmp_tmp; +// OBSOLETE tmp_tmp = ANDQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE { +// OBSOLETE BI opval = EQQI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* btsth: btsth $u4,@$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,btsth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI tmp_tmp; +// OBSOLETE tmp_tmp = ANDQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); +// OBSOLETE { +// OBSOLETE BI opval = EQQI (tmp_tmp, 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTQI (tmp_tmp, 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* mul: mul $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE DI tmp_tmp; +// OBSOLETE tmp_tmp = MULDI (EXTSIDI (* FLD (i_Rj)), EXTSIDI (* FLD (i_Ri))); +// OBSOLETE { +// OBSOLETE SI opval = TRUNCDISI (tmp_tmp); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQDI (tmp_tmp, MAKEDI (0, 0)); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = ORIF (GTDI (tmp_tmp, MAKEDI (0, 2147483647)), LTDI (tmp_tmp, NEGDI (MAKEDI (0, 0x80000000)))); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* mulu: mulu $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE DI tmp_tmp; +// OBSOLETE tmp_tmp = MULDI (ZEXTSIDI (* FLD (i_Rj)), ZEXTSIDI (* FLD (i_Ri))); +// OBSOLETE { +// OBSOLETE SI opval = TRUNCDISI (tmp_tmp); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (GET_H_DR (((UINT) 4)), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = NESI (GET_H_DR (((UINT) 4)), 0); +// OBSOLETE CPU (h_vbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* mulh: mulh $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,mulh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = MULHI (TRUNCSIHI (* FLD (i_Rj)), TRUNCSIHI (* FLD (i_Ri))); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = GESI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* muluh: muluh $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,muluh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = MULSI (ANDSI (* FLD (i_Rj), 65535), ANDSI (* FLD (i_Ri), 65535)); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = GESI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* div0s: div0s $Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,div0s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); +// OBSOLETE CPU (h_d0bit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = XORBI (CPU (h_d0bit), LTSI (* FLD (i_Ri), 0)); +// OBSOLETE CPU (h_d1bit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); +// OBSOLETE } +// OBSOLETE if (NEBI (CPU (h_d0bit), 0)) { +// OBSOLETE { +// OBSOLETE SI opval = 0xffffffff; +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE SI opval = 0; +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* div0u: div0u $Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,div0u) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_d0bit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_d1bit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = 0; +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* div1: div1 $Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,div1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE { +// OBSOLETE SI opval = SLLSI (GET_H_DR (((UINT) 4)), 1); +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE if (LTSI (GET_H_DR (((UINT) 5)), 0)) { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 4)), 1); +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SLLSI (GET_H_DR (((UINT) 5)), 1); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE if (EQBI (CPU (h_d1bit), 1)) { +// OBSOLETE { +// OBSOLETE tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ORSI (GET_H_DR (((UINT) 5)), 1); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (GET_H_DR (((UINT) 4)), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* div2: div2 $Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,div2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE if (EQBI (CPU (h_d1bit), 1)) { +// OBSOLETE { +// OBSOLETE tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); +// OBSOLETE { +// OBSOLETE BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); +// OBSOLETE { +// OBSOLETE BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (EQSI (tmp_tmp, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = 1; +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = 0; +// OBSOLETE SET_H_DR (((UINT) 4), opval); +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* div3: div3 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,div3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (EQBI (CPU (h_zbit), 1)) { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 5)), 1); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* div4s: div4s */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,div4s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (EQBI (CPU (h_d1bit), 1)) { +// OBSOLETE { +// OBSOLETE SI opval = NEGSI (GET_H_DR (((UINT) 5))); +// OBSOLETE SET_H_DR (((UINT) 5), opval); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* lsl: lsl $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,lsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ANDSI (* FLD (i_Rj), 31); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SLLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* lsli: lsl $u4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,lsli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = FLD (f_u4); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SLLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* lsl2: lsl2 $u4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,lsl2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ADDSI (FLD (f_u4), 16); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SLLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* lsr: lsr $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,lsr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ANDSI (* FLD (i_Rj), 31); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* lsri: lsr $u4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,lsri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = FLD (f_u4); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* lsr2: lsr2 $u4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,lsr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ADDSI (FLD (f_u4), 16); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRLSI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* asr: asr $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,asr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ANDSI (* FLD (i_Rj), 31); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRASI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* asri: asr $u4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,asri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = FLD (f_u4); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRASI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* asr2: asr2 $u4,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,asr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_shift; +// OBSOLETE tmp_shift = ADDSI (FLD (f_u4), 16); +// OBSOLETE if (NESI (tmp_shift, 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SRASI (* FLD (i_Ri), tmp_shift); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE BI opval = 0; +// OBSOLETE CPU (h_cbit) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = LTSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_nbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE BI opval = EQSI (* FLD (i_Ri), 0); +// OBSOLETE CPU (h_zbit) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldi8: ldi:8 $i8,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi8.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = FLD (f_i8); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldi20: ldi:20 $i20,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldi20) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi20.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = FLD (f_i20); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldi32: ldi:32 $i32,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldi32) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldi32.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 6); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = FLD (f_i32); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ld: ld @$Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* lduh: lduh @$Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldub: ldub @$Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldr13: ld @($R13,$Rj),$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldr13uh: lduh @($R13,$Rj),$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldr13uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldr13ub: ldub @($R13,$Rj),$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldr13ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldr14: ld @($R14,$disp10),$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldr14) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldr14uh: lduh @($R14,$disp9),$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldr14uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14uh.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldr14ub: ldub @($R14,$disp8),$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldr14ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr14ub.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldr15: ld @($R15,$udisp6),$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldr15) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_udisp6), CPU (h_gr[((UINT) 15)]))); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldr15gr: ld @$R15+,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldr15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15gr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE if (NESI (FLD (f_Ri), 15)) { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldr15dr: ld @$R15+,$Rs2 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldr15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SET_H_DR (FLD (f_Rs2), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldr15ps: ld @$R15+,$ps */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldr15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE USI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE SET_H_PS (opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* st: st $Ri,@$Rj */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Ri); +// OBSOLETE SETMEMSI (current_cpu, pc, * FLD (i_Rj), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* sth: sth $Ri,@$Rj */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI opval = * FLD (i_Ri); +// OBSOLETE SETMEMHI (current_cpu, pc, * FLD (i_Rj), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* stb: stb $Ri,@$Rj */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = * FLD (i_Ri); +// OBSOLETE SETMEMQI (current_cpu, pc, * FLD (i_Rj), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* str13: st $Ri,@($R13,$Rj) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,str13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Ri); +// OBSOLETE SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* str13h: sth $Ri,@($R13,$Rj) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,str13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI opval = * FLD (i_Ri); +// OBSOLETE SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* str13b: stb $Ri,@($R13,$Rj) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,str13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = * FLD (i_Ri); +// OBSOLETE SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* str14: st $Ri,@($R14,$disp10) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,str14) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Ri); +// OBSOLETE SETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* str14h: sth $Ri,@($R14,$disp9) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,str14h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14h.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI opval = * FLD (i_Ri); +// OBSOLETE SETMEMHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* str14b: stb $Ri,@($R14,$disp8) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,str14b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str14b.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = * FLD (i_Ri); +// OBSOLETE SETMEMQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* str15: st $Ri,@($R15,$udisp6) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,str15) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str15.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Ri); +// OBSOLETE SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_udisp6)), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* str15gr: st $Ri,@-$R15 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,str15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_str15gr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = * FLD (i_Ri); +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* str15dr: st $Rs2,@-$R15 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,str15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr15dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = GET_H_DR (FLD (f_Rs2)); +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* str15ps: st $ps,@-$R15 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,str15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = GET_H_PS (); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* mov: mov $Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldr13.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Rj); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* movdr: mov $Rs1,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,movdr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_movdr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GET_H_DR (FLD (f_Rs1)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* movps: mov $ps,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,movps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_movdr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GET_H_PS (); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* mov2dr: mov $Ri,$Rs1 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,mov2dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = * FLD (i_Ri); +// OBSOLETE SET_H_DR (FLD (f_Rs1), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* mov2ps: mov $Ri,$ps */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,mov2ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE USI opval = * FLD (i_Ri); +// OBSOLETE SET_H_PS (opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* jmp: jmp @$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE USI opval = * FLD (i_Ri); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* jmpd: jmp:d @$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,jmpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE USI opval = * FLD (i_Ri); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* callr: call @$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,callr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (pc, 2); +// OBSOLETE SET_H_DR (((UINT) 1), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE USI opval = * FLD (i_Ri); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* callrd: call:d @$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,callrd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_mov2dr.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (pc, 4); +// OBSOLETE SET_H_DR (((UINT) 1), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE USI opval = * FLD (i_Ri); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* call: call $label12 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_call.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (pc, 2); +// OBSOLETE SET_H_DR (((UINT) 1), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label12); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* calld: call:d $label12 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,calld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_call.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (pc, 4); +// OBSOLETE SET_H_DR (((UINT) 1), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label12); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ret: ret */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE USI opval = GET_H_DR (((UINT) 1)); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ret:d: ret:d */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ret_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE USI opval = GET_H_DR (((UINT) 1)); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* int: int $u8 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,int) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE ; /*clobber*/ +// OBSOLETE ; /*clobber*/ +// OBSOLETE ; /*clobber*/ +// OBSOLETE { +// OBSOLETE SI opval = fr30_int (current_cpu, pc, FLD (f_u8)); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* inte: inte */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,inte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE ; /*clobber*/ +// OBSOLETE ; /*clobber*/ +// OBSOLETE ; /*clobber*/ +// OBSOLETE { +// OBSOLETE SI opval = fr30_inte (current_cpu, pc); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* reti: reti */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,reti) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (EQBI (GET_H_SBIT (), 0)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 7); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); +// OBSOLETE SET_H_DR (((UINT) 2), opval); +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); +// OBSOLETE SET_H_PS (opval); +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); +// OBSOLETE SET_H_DR (((UINT) 2), opval); +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } else { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); +// OBSOLETE SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 7); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); +// OBSOLETE SET_H_DR (((UINT) 3), opval); +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); +// OBSOLETE SET_H_PS (opval); +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); +// OBSOLETE SET_H_DR (((UINT) 3), opval); +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* brad: bra:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,brad) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bra: bra $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bnod: bno:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bnod) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bno: bno $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* beqd: beq:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,beqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (CPU (h_zbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* beq: beq $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (CPU (h_zbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bned: bne:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bned) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bne: bne $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bcd: bc:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bcd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (CPU (h_cbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bc: bc $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (CPU (h_cbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bncd: bnc:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bncd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (CPU (h_cbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bnc: bnc $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (CPU (h_cbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bnd: bn:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bnd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (CPU (h_nbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bn: bn $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (CPU (h_nbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bpd: bp:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (CPU (h_nbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bp: bp $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (CPU (h_nbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bvd: bv:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (CPU (h_vbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bv: bv $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (CPU (h_vbit)) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bnvd: bnv:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bnvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (CPU (h_vbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bnv: bnv $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bnv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (CPU (h_vbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 2); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bltd: blt:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bltd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (XORBI (CPU (h_vbit), CPU (h_nbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* blt: blt $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,blt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (XORBI (CPU (h_vbit), CPU (h_nbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bged: bge:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bged) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bge: bge $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bled: ble:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bled) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ble: ble $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bgtd: bgt:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bgtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bgt: bgt $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bgt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* blsd: bls:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,blsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ORBI (CPU (h_cbit), CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bls: bls $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (ORBI (CPU (h_cbit), CPU (h_zbit))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bhid: bhi:d $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bhid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* bhi: bhi $label9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,bhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_brad.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_BRANCH_INIT +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { +// OBSOLETE { +// OBSOLETE USI opval = FLD (i_label9); +// OBSOLETE SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE SEM_BRANCH_FINI (vpc); +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmovr13: dmov $R13,@$dir10 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmovr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 13)]); +// OBSOLETE SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmovr13h: dmovh $R13,@$dir9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmovr13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE HI opval = CPU (h_gr[((UINT) 13)]); +// OBSOLETE SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmovr13b: dmovb $R13,@$dir8 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmovr13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE QI opval = CPU (h_gr[((UINT) 13)]); +// OBSOLETE SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmovr13pi: dmov @$R13+,@$dir10 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmovr13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); +// OBSOLETE SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmovr13pih: dmovh @$R13+,@$dir9 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmovr13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE HI opval = GETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); +// OBSOLETE SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmovr13pib: dmovb @$R13+,@$dir8 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmovr13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE QI opval = GETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); +// OBSOLETE SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmovr15pi: dmov @$R15+,@$dir10 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmovr15pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr15pi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmov2r13: dmov @$dir10,$R13 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmov2r13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmov2r13h: dmovh @$dir9,$R13 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmov2r13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmov2r13b: dmovb @$dir8,$R13 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmov2r13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmov2r13pi: dmov @$dir10,@$R13+ */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmov2r13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmov2r13pih: dmovh @$dir9,@$R13+ */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmov2r13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pih.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE HI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); +// OBSOLETE SETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmov2r13pib: dmovb @$dir8,@$R13+ */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmov2r13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr13pib.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE QI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); +// OBSOLETE SETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* dmov2r15pd: dmov @$dir10,@-$R15 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,dmov2r15pd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_dmovr15pi.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldres: ldres @$Ri+,$u4 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldres) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), 4); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* stres: stres $u4,@$Ri+ */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,stres) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (* FLD (i_Ri), 4); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* copop: copop $u4c,$ccc,$CRj,$CRi */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,copop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* copld: copld $u4c,$ccc,$Rjc,$CRi */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,copld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* copst: copst $u4c,$ccc,$CRj,$Ric */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,copst) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* copsv: copsv $u4c,$ccc,$CRj,$Ric */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,copsv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* nop: nop */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.fmt_empty.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE ((void) 0); /*nop*/ +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* andccr: andccr $u8 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,andccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE UQI opval = ANDQI (GET_H_CCR (), FLD (f_u8)); +// OBSOLETE SET_H_CCR (opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* orccr: orccr $u8 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,orccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE UQI opval = ORQI (GET_H_CCR (), FLD (f_u8)); +// OBSOLETE SET_H_CCR (opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* stilm: stilm $u8 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,stilm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_int.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE UQI opval = ANDSI (FLD (f_u8), 31); +// OBSOLETE SET_H_ILM (opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "ilm", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* addsp: addsp $s10 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,addsp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_addsp.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_s10)); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* extsb: extsb $Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,extsb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = EXTQISI (ANDQI (* FLD (i_Ri), 255)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* extub: extub $Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,extub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ZEXTQISI (ANDQI (* FLD (i_Ri), 255)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* extsh: extsh $Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,extsh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = EXTHISI (ANDHI (* FLD (i_Ri), 65535)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* extuh: extuh $Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,extuh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add2.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI opval = ZEXTHISI (ANDHI (* FLD (i_Ri), 65535)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldm0: ldm0 ($reglist_low_ld) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldm0.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 1)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 0)]) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 2)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 1)]) = opval; +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 4)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 2)]) = opval; +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 8)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 3)]) = opval; +// OBSOLETE written |= (1 << 7); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 16)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 4)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 32)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 5)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 64)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 6)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_ld), 128)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 7)]) = opval; +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* ldm1: ldm1 ($reglist_hi_ld) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,ldm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_ldm1.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 1)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 8)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 2)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 9)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 4)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 10)]) = opval; +// OBSOLETE written |= (1 << 3); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 8)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 11)]) = opval; +// OBSOLETE written |= (1 << 4); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 16)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 12)]) = opval; +// OBSOLETE written |= (1 << 5); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 32)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 13)]) = opval; +// OBSOLETE written |= (1 << 6); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 64)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 14)]) = opval; +// OBSOLETE written |= (1 << 7); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_ld), 128)) { +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 8); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* stm0: stm0 ($reglist_low_st) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,stm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_stm0.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 1)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 7)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 2)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 6)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 4)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 5)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 8)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 4)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 16)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 3)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 32)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 2)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 64)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 1)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_low_st), 128)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 0)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 11); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* stm1: stm1 ($reglist_hi_st) */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,stm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_stm1.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 1)) { +// OBSOLETE { +// OBSOLETE SI tmp_save_r15; +// OBSOLETE tmp_save_r15 = CPU (h_gr[((UINT) 15)]); +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_save_r15; +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 2)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 14)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 4)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 13)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 8)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 12)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 16)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 11)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 32)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 10)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 64)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 9)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE if (ANDSI (FLD (f_reglist_hi_st), 128)) { +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE written |= (1 << 9); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 8)]); +// OBSOLETE SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); +// OBSOLETE written |= (1 << 10); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE abuf->written = written; +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* enter: enter $u10 */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,enter) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_enter.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = SUBSI (CPU (h_gr[((UINT) 15)]), 4); +// OBSOLETE { +// OBSOLETE SI opval = CPU (h_gr[((UINT) 14)]); +// OBSOLETE SETMEMSI (current_cpu, pc, tmp_tmp, opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = tmp_tmp; +// OBSOLETE CPU (h_gr[((UINT) 14)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), FLD (f_u10)); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* leave: leave */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,leave) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_enter.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE { +// OBSOLETE SI opval = ADDSI (CPU (h_gr[((UINT) 14)]), 4); +// OBSOLETE CPU (h_gr[((UINT) 15)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE SI opval = GETMEMSI (current_cpu, pc, SUBSI (CPU (h_gr[((UINT) 15)]), 4)); +// OBSOLETE CPU (h_gr[((UINT) 14)]) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* xchb: xchb @$Rj,$Ri */ +// OBSOLETE +// OBSOLETE static SEM_PC +// OBSOLETE SEM_FN_NAME (fr30bf,xchb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) +// OBSOLETE { +// OBSOLETE #define FLD(f) abuf->fields.sfmt_add.f +// OBSOLETE ARGBUF *abuf = SEM_ARGBUF (sem_arg); +// OBSOLETE int UNUSED written = 0; +// OBSOLETE IADDR UNUSED pc = abuf->addr; +// OBSOLETE SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); +// OBSOLETE +// OBSOLETE { +// OBSOLETE SI tmp_tmp; +// OBSOLETE tmp_tmp = * FLD (i_Ri); +// OBSOLETE { +// OBSOLETE SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); +// OBSOLETE * FLD (i_Ri) = opval; +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); +// OBSOLETE } +// OBSOLETE { +// OBSOLETE UQI opval = tmp_tmp; +// OBSOLETE SETMEMUQI (current_cpu, pc, * FLD (i_Rj), opval); +// OBSOLETE TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE return vpc; +// OBSOLETE #undef FLD +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Table of all semantic fns. */ +// OBSOLETE +// OBSOLETE static const struct sem_fn_desc sem_fns[] = { +// OBSOLETE { FR30BF_INSN_X_INVALID, SEM_FN_NAME (fr30bf,x_invalid) }, +// OBSOLETE { FR30BF_INSN_X_AFTER, SEM_FN_NAME (fr30bf,x_after) }, +// OBSOLETE { FR30BF_INSN_X_BEFORE, SEM_FN_NAME (fr30bf,x_before) }, +// OBSOLETE { FR30BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (fr30bf,x_cti_chain) }, +// OBSOLETE { FR30BF_INSN_X_CHAIN, SEM_FN_NAME (fr30bf,x_chain) }, +// OBSOLETE { FR30BF_INSN_X_BEGIN, SEM_FN_NAME (fr30bf,x_begin) }, +// OBSOLETE { FR30BF_INSN_ADD, SEM_FN_NAME (fr30bf,add) }, +// OBSOLETE { FR30BF_INSN_ADDI, SEM_FN_NAME (fr30bf,addi) }, +// OBSOLETE { FR30BF_INSN_ADD2, SEM_FN_NAME (fr30bf,add2) }, +// OBSOLETE { FR30BF_INSN_ADDC, SEM_FN_NAME (fr30bf,addc) }, +// OBSOLETE { FR30BF_INSN_ADDN, SEM_FN_NAME (fr30bf,addn) }, +// OBSOLETE { FR30BF_INSN_ADDNI, SEM_FN_NAME (fr30bf,addni) }, +// OBSOLETE { FR30BF_INSN_ADDN2, SEM_FN_NAME (fr30bf,addn2) }, +// OBSOLETE { FR30BF_INSN_SUB, SEM_FN_NAME (fr30bf,sub) }, +// OBSOLETE { FR30BF_INSN_SUBC, SEM_FN_NAME (fr30bf,subc) }, +// OBSOLETE { FR30BF_INSN_SUBN, SEM_FN_NAME (fr30bf,subn) }, +// OBSOLETE { FR30BF_INSN_CMP, SEM_FN_NAME (fr30bf,cmp) }, +// OBSOLETE { FR30BF_INSN_CMPI, SEM_FN_NAME (fr30bf,cmpi) }, +// OBSOLETE { FR30BF_INSN_CMP2, SEM_FN_NAME (fr30bf,cmp2) }, +// OBSOLETE { FR30BF_INSN_AND, SEM_FN_NAME (fr30bf,and) }, +// OBSOLETE { FR30BF_INSN_OR, SEM_FN_NAME (fr30bf,or) }, +// OBSOLETE { FR30BF_INSN_EOR, SEM_FN_NAME (fr30bf,eor) }, +// OBSOLETE { FR30BF_INSN_ANDM, SEM_FN_NAME (fr30bf,andm) }, +// OBSOLETE { FR30BF_INSN_ANDH, SEM_FN_NAME (fr30bf,andh) }, +// OBSOLETE { FR30BF_INSN_ANDB, SEM_FN_NAME (fr30bf,andb) }, +// OBSOLETE { FR30BF_INSN_ORM, SEM_FN_NAME (fr30bf,orm) }, +// OBSOLETE { FR30BF_INSN_ORH, SEM_FN_NAME (fr30bf,orh) }, +// OBSOLETE { FR30BF_INSN_ORB, SEM_FN_NAME (fr30bf,orb) }, +// OBSOLETE { FR30BF_INSN_EORM, SEM_FN_NAME (fr30bf,eorm) }, +// OBSOLETE { FR30BF_INSN_EORH, SEM_FN_NAME (fr30bf,eorh) }, +// OBSOLETE { FR30BF_INSN_EORB, SEM_FN_NAME (fr30bf,eorb) }, +// OBSOLETE { FR30BF_INSN_BANDL, SEM_FN_NAME (fr30bf,bandl) }, +// OBSOLETE { FR30BF_INSN_BORL, SEM_FN_NAME (fr30bf,borl) }, +// OBSOLETE { FR30BF_INSN_BEORL, SEM_FN_NAME (fr30bf,beorl) }, +// OBSOLETE { FR30BF_INSN_BANDH, SEM_FN_NAME (fr30bf,bandh) }, +// OBSOLETE { FR30BF_INSN_BORH, SEM_FN_NAME (fr30bf,borh) }, +// OBSOLETE { FR30BF_INSN_BEORH, SEM_FN_NAME (fr30bf,beorh) }, +// OBSOLETE { FR30BF_INSN_BTSTL, SEM_FN_NAME (fr30bf,btstl) }, +// OBSOLETE { FR30BF_INSN_BTSTH, SEM_FN_NAME (fr30bf,btsth) }, +// OBSOLETE { FR30BF_INSN_MUL, SEM_FN_NAME (fr30bf,mul) }, +// OBSOLETE { FR30BF_INSN_MULU, SEM_FN_NAME (fr30bf,mulu) }, +// OBSOLETE { FR30BF_INSN_MULH, SEM_FN_NAME (fr30bf,mulh) }, +// OBSOLETE { FR30BF_INSN_MULUH, SEM_FN_NAME (fr30bf,muluh) }, +// OBSOLETE { FR30BF_INSN_DIV0S, SEM_FN_NAME (fr30bf,div0s) }, +// OBSOLETE { FR30BF_INSN_DIV0U, SEM_FN_NAME (fr30bf,div0u) }, +// OBSOLETE { FR30BF_INSN_DIV1, SEM_FN_NAME (fr30bf,div1) }, +// OBSOLETE { FR30BF_INSN_DIV2, SEM_FN_NAME (fr30bf,div2) }, +// OBSOLETE { FR30BF_INSN_DIV3, SEM_FN_NAME (fr30bf,div3) }, +// OBSOLETE { FR30BF_INSN_DIV4S, SEM_FN_NAME (fr30bf,div4s) }, +// OBSOLETE { FR30BF_INSN_LSL, SEM_FN_NAME (fr30bf,lsl) }, +// OBSOLETE { FR30BF_INSN_LSLI, SEM_FN_NAME (fr30bf,lsli) }, +// OBSOLETE { FR30BF_INSN_LSL2, SEM_FN_NAME (fr30bf,lsl2) }, +// OBSOLETE { FR30BF_INSN_LSR, SEM_FN_NAME (fr30bf,lsr) }, +// OBSOLETE { FR30BF_INSN_LSRI, SEM_FN_NAME (fr30bf,lsri) }, +// OBSOLETE { FR30BF_INSN_LSR2, SEM_FN_NAME (fr30bf,lsr2) }, +// OBSOLETE { FR30BF_INSN_ASR, SEM_FN_NAME (fr30bf,asr) }, +// OBSOLETE { FR30BF_INSN_ASRI, SEM_FN_NAME (fr30bf,asri) }, +// OBSOLETE { FR30BF_INSN_ASR2, SEM_FN_NAME (fr30bf,asr2) }, +// OBSOLETE { FR30BF_INSN_LDI8, SEM_FN_NAME (fr30bf,ldi8) }, +// OBSOLETE { FR30BF_INSN_LDI20, SEM_FN_NAME (fr30bf,ldi20) }, +// OBSOLETE { FR30BF_INSN_LDI32, SEM_FN_NAME (fr30bf,ldi32) }, +// OBSOLETE { FR30BF_INSN_LD, SEM_FN_NAME (fr30bf,ld) }, +// OBSOLETE { FR30BF_INSN_LDUH, SEM_FN_NAME (fr30bf,lduh) }, +// OBSOLETE { FR30BF_INSN_LDUB, SEM_FN_NAME (fr30bf,ldub) }, +// OBSOLETE { FR30BF_INSN_LDR13, SEM_FN_NAME (fr30bf,ldr13) }, +// OBSOLETE { FR30BF_INSN_LDR13UH, SEM_FN_NAME (fr30bf,ldr13uh) }, +// OBSOLETE { FR30BF_INSN_LDR13UB, SEM_FN_NAME (fr30bf,ldr13ub) }, +// OBSOLETE { FR30BF_INSN_LDR14, SEM_FN_NAME (fr30bf,ldr14) }, +// OBSOLETE { FR30BF_INSN_LDR14UH, SEM_FN_NAME (fr30bf,ldr14uh) }, +// OBSOLETE { FR30BF_INSN_LDR14UB, SEM_FN_NAME (fr30bf,ldr14ub) }, +// OBSOLETE { FR30BF_INSN_LDR15, SEM_FN_NAME (fr30bf,ldr15) }, +// OBSOLETE { FR30BF_INSN_LDR15GR, SEM_FN_NAME (fr30bf,ldr15gr) }, +// OBSOLETE { FR30BF_INSN_LDR15DR, SEM_FN_NAME (fr30bf,ldr15dr) }, +// OBSOLETE { FR30BF_INSN_LDR15PS, SEM_FN_NAME (fr30bf,ldr15ps) }, +// OBSOLETE { FR30BF_INSN_ST, SEM_FN_NAME (fr30bf,st) }, +// OBSOLETE { FR30BF_INSN_STH, SEM_FN_NAME (fr30bf,sth) }, +// OBSOLETE { FR30BF_INSN_STB, SEM_FN_NAME (fr30bf,stb) }, +// OBSOLETE { FR30BF_INSN_STR13, SEM_FN_NAME (fr30bf,str13) }, +// OBSOLETE { FR30BF_INSN_STR13H, SEM_FN_NAME (fr30bf,str13h) }, +// OBSOLETE { FR30BF_INSN_STR13B, SEM_FN_NAME (fr30bf,str13b) }, +// OBSOLETE { FR30BF_INSN_STR14, SEM_FN_NAME (fr30bf,str14) }, +// OBSOLETE { FR30BF_INSN_STR14H, SEM_FN_NAME (fr30bf,str14h) }, +// OBSOLETE { FR30BF_INSN_STR14B, SEM_FN_NAME (fr30bf,str14b) }, +// OBSOLETE { FR30BF_INSN_STR15, SEM_FN_NAME (fr30bf,str15) }, +// OBSOLETE { FR30BF_INSN_STR15GR, SEM_FN_NAME (fr30bf,str15gr) }, +// OBSOLETE { FR30BF_INSN_STR15DR, SEM_FN_NAME (fr30bf,str15dr) }, +// OBSOLETE { FR30BF_INSN_STR15PS, SEM_FN_NAME (fr30bf,str15ps) }, +// OBSOLETE { FR30BF_INSN_MOV, SEM_FN_NAME (fr30bf,mov) }, +// OBSOLETE { FR30BF_INSN_MOVDR, SEM_FN_NAME (fr30bf,movdr) }, +// OBSOLETE { FR30BF_INSN_MOVPS, SEM_FN_NAME (fr30bf,movps) }, +// OBSOLETE { FR30BF_INSN_MOV2DR, SEM_FN_NAME (fr30bf,mov2dr) }, +// OBSOLETE { FR30BF_INSN_MOV2PS, SEM_FN_NAME (fr30bf,mov2ps) }, +// OBSOLETE { FR30BF_INSN_JMP, SEM_FN_NAME (fr30bf,jmp) }, +// OBSOLETE { FR30BF_INSN_JMPD, SEM_FN_NAME (fr30bf,jmpd) }, +// OBSOLETE { FR30BF_INSN_CALLR, SEM_FN_NAME (fr30bf,callr) }, +// OBSOLETE { FR30BF_INSN_CALLRD, SEM_FN_NAME (fr30bf,callrd) }, +// OBSOLETE { FR30BF_INSN_CALL, SEM_FN_NAME (fr30bf,call) }, +// OBSOLETE { FR30BF_INSN_CALLD, SEM_FN_NAME (fr30bf,calld) }, +// OBSOLETE { FR30BF_INSN_RET, SEM_FN_NAME (fr30bf,ret) }, +// OBSOLETE { FR30BF_INSN_RET_D, SEM_FN_NAME (fr30bf,ret_d) }, +// OBSOLETE { FR30BF_INSN_INT, SEM_FN_NAME (fr30bf,int) }, +// OBSOLETE { FR30BF_INSN_INTE, SEM_FN_NAME (fr30bf,inte) }, +// OBSOLETE { FR30BF_INSN_RETI, SEM_FN_NAME (fr30bf,reti) }, +// OBSOLETE { FR30BF_INSN_BRAD, SEM_FN_NAME (fr30bf,brad) }, +// OBSOLETE { FR30BF_INSN_BRA, SEM_FN_NAME (fr30bf,bra) }, +// OBSOLETE { FR30BF_INSN_BNOD, SEM_FN_NAME (fr30bf,bnod) }, +// OBSOLETE { FR30BF_INSN_BNO, SEM_FN_NAME (fr30bf,bno) }, +// OBSOLETE { FR30BF_INSN_BEQD, SEM_FN_NAME (fr30bf,beqd) }, +// OBSOLETE { FR30BF_INSN_BEQ, SEM_FN_NAME (fr30bf,beq) }, +// OBSOLETE { FR30BF_INSN_BNED, SEM_FN_NAME (fr30bf,bned) }, +// OBSOLETE { FR30BF_INSN_BNE, SEM_FN_NAME (fr30bf,bne) }, +// OBSOLETE { FR30BF_INSN_BCD, SEM_FN_NAME (fr30bf,bcd) }, +// OBSOLETE { FR30BF_INSN_BC, SEM_FN_NAME (fr30bf,bc) }, +// OBSOLETE { FR30BF_INSN_BNCD, SEM_FN_NAME (fr30bf,bncd) }, +// OBSOLETE { FR30BF_INSN_BNC, SEM_FN_NAME (fr30bf,bnc) }, +// OBSOLETE { FR30BF_INSN_BND, SEM_FN_NAME (fr30bf,bnd) }, +// OBSOLETE { FR30BF_INSN_BN, SEM_FN_NAME (fr30bf,bn) }, +// OBSOLETE { FR30BF_INSN_BPD, SEM_FN_NAME (fr30bf,bpd) }, +// OBSOLETE { FR30BF_INSN_BP, SEM_FN_NAME (fr30bf,bp) }, +// OBSOLETE { FR30BF_INSN_BVD, SEM_FN_NAME (fr30bf,bvd) }, +// OBSOLETE { FR30BF_INSN_BV, SEM_FN_NAME (fr30bf,bv) }, +// OBSOLETE { FR30BF_INSN_BNVD, SEM_FN_NAME (fr30bf,bnvd) }, +// OBSOLETE { FR30BF_INSN_BNV, SEM_FN_NAME (fr30bf,bnv) }, +// OBSOLETE { FR30BF_INSN_BLTD, SEM_FN_NAME (fr30bf,bltd) }, +// OBSOLETE { FR30BF_INSN_BLT, SEM_FN_NAME (fr30bf,blt) }, +// OBSOLETE { FR30BF_INSN_BGED, SEM_FN_NAME (fr30bf,bged) }, +// OBSOLETE { FR30BF_INSN_BGE, SEM_FN_NAME (fr30bf,bge) }, +// OBSOLETE { FR30BF_INSN_BLED, SEM_FN_NAME (fr30bf,bled) }, +// OBSOLETE { FR30BF_INSN_BLE, SEM_FN_NAME (fr30bf,ble) }, +// OBSOLETE { FR30BF_INSN_BGTD, SEM_FN_NAME (fr30bf,bgtd) }, +// OBSOLETE { FR30BF_INSN_BGT, SEM_FN_NAME (fr30bf,bgt) }, +// OBSOLETE { FR30BF_INSN_BLSD, SEM_FN_NAME (fr30bf,blsd) }, +// OBSOLETE { FR30BF_INSN_BLS, SEM_FN_NAME (fr30bf,bls) }, +// OBSOLETE { FR30BF_INSN_BHID, SEM_FN_NAME (fr30bf,bhid) }, +// OBSOLETE { FR30BF_INSN_BHI, SEM_FN_NAME (fr30bf,bhi) }, +// OBSOLETE { FR30BF_INSN_DMOVR13, SEM_FN_NAME (fr30bf,dmovr13) }, +// OBSOLETE { FR30BF_INSN_DMOVR13H, SEM_FN_NAME (fr30bf,dmovr13h) }, +// OBSOLETE { FR30BF_INSN_DMOVR13B, SEM_FN_NAME (fr30bf,dmovr13b) }, +// OBSOLETE { FR30BF_INSN_DMOVR13PI, SEM_FN_NAME (fr30bf,dmovr13pi) }, +// OBSOLETE { FR30BF_INSN_DMOVR13PIH, SEM_FN_NAME (fr30bf,dmovr13pih) }, +// OBSOLETE { FR30BF_INSN_DMOVR13PIB, SEM_FN_NAME (fr30bf,dmovr13pib) }, +// OBSOLETE { FR30BF_INSN_DMOVR15PI, SEM_FN_NAME (fr30bf,dmovr15pi) }, +// OBSOLETE { FR30BF_INSN_DMOV2R13, SEM_FN_NAME (fr30bf,dmov2r13) }, +// OBSOLETE { FR30BF_INSN_DMOV2R13H, SEM_FN_NAME (fr30bf,dmov2r13h) }, +// OBSOLETE { FR30BF_INSN_DMOV2R13B, SEM_FN_NAME (fr30bf,dmov2r13b) }, +// OBSOLETE { FR30BF_INSN_DMOV2R13PI, SEM_FN_NAME (fr30bf,dmov2r13pi) }, +// OBSOLETE { FR30BF_INSN_DMOV2R13PIH, SEM_FN_NAME (fr30bf,dmov2r13pih) }, +// OBSOLETE { FR30BF_INSN_DMOV2R13PIB, SEM_FN_NAME (fr30bf,dmov2r13pib) }, +// OBSOLETE { FR30BF_INSN_DMOV2R15PD, SEM_FN_NAME (fr30bf,dmov2r15pd) }, +// OBSOLETE { FR30BF_INSN_LDRES, SEM_FN_NAME (fr30bf,ldres) }, +// OBSOLETE { FR30BF_INSN_STRES, SEM_FN_NAME (fr30bf,stres) }, +// OBSOLETE { FR30BF_INSN_COPOP, SEM_FN_NAME (fr30bf,copop) }, +// OBSOLETE { FR30BF_INSN_COPLD, SEM_FN_NAME (fr30bf,copld) }, +// OBSOLETE { FR30BF_INSN_COPST, SEM_FN_NAME (fr30bf,copst) }, +// OBSOLETE { FR30BF_INSN_COPSV, SEM_FN_NAME (fr30bf,copsv) }, +// OBSOLETE { FR30BF_INSN_NOP, SEM_FN_NAME (fr30bf,nop) }, +// OBSOLETE { FR30BF_INSN_ANDCCR, SEM_FN_NAME (fr30bf,andccr) }, +// OBSOLETE { FR30BF_INSN_ORCCR, SEM_FN_NAME (fr30bf,orccr) }, +// OBSOLETE { FR30BF_INSN_STILM, SEM_FN_NAME (fr30bf,stilm) }, +// OBSOLETE { FR30BF_INSN_ADDSP, SEM_FN_NAME (fr30bf,addsp) }, +// OBSOLETE { FR30BF_INSN_EXTSB, SEM_FN_NAME (fr30bf,extsb) }, +// OBSOLETE { FR30BF_INSN_EXTUB, SEM_FN_NAME (fr30bf,extub) }, +// OBSOLETE { FR30BF_INSN_EXTSH, SEM_FN_NAME (fr30bf,extsh) }, +// OBSOLETE { FR30BF_INSN_EXTUH, SEM_FN_NAME (fr30bf,extuh) }, +// OBSOLETE { FR30BF_INSN_LDM0, SEM_FN_NAME (fr30bf,ldm0) }, +// OBSOLETE { FR30BF_INSN_LDM1, SEM_FN_NAME (fr30bf,ldm1) }, +// OBSOLETE { FR30BF_INSN_STM0, SEM_FN_NAME (fr30bf,stm0) }, +// OBSOLETE { FR30BF_INSN_STM1, SEM_FN_NAME (fr30bf,stm1) }, +// OBSOLETE { FR30BF_INSN_ENTER, SEM_FN_NAME (fr30bf,enter) }, +// OBSOLETE { FR30BF_INSN_LEAVE, SEM_FN_NAME (fr30bf,leave) }, +// OBSOLETE { FR30BF_INSN_XCHB, SEM_FN_NAME (fr30bf,xchb) }, +// OBSOLETE { 0, 0 } +// OBSOLETE }; +// OBSOLETE +// OBSOLETE /* Add the semantic fns to IDESC_TABLE. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE SEM_FN_NAME (fr30bf,init_idesc_table) (SIM_CPU *current_cpu) +// OBSOLETE { +// OBSOLETE IDESC *idesc_table = CPU_IDESC (current_cpu); +// OBSOLETE const struct sem_fn_desc *sf; +// OBSOLETE int mach_num = MACH_NUM (CPU_MACH (current_cpu)); +// OBSOLETE +// OBSOLETE for (sf = &sem_fns[0]; sf->fn != 0; ++sf) +// OBSOLETE { +// OBSOLETE const CGEN_INSN *insn = idesc_table[sf->index].idata; +// OBSOLETE int valid_p = (CGEN_INSN_VIRTUAL_P (insn) +// OBSOLETE || CGEN_INSN_MACH_HAS_P (insn, mach_num)); +// OBSOLETE #if FAST_P +// OBSOLETE if (valid_p) +// OBSOLETE idesc_table[sf->index].sem_fast = sf->fn; +// OBSOLETE else +// OBSOLETE idesc_table[sf->index].sem_fast = SEM_FN_NAME (fr30bf,x_invalid); +// OBSOLETE #else +// OBSOLETE if (valid_p) +// OBSOLETE idesc_table[sf->index].sem_full = sf->fn; +// OBSOLETE else +// OBSOLETE idesc_table[sf->index].sem_full = SEM_FN_NAME (fr30bf,x_invalid); +// OBSOLETE #endif +// OBSOLETE } +// OBSOLETE } diff --git a/sim/fr30/sim-if.c b/sim/fr30/sim-if.c index 28b344d..e5c5c57 100644 --- a/sim/fr30/sim-if.c +++ b/sim/fr30/sim-if.c @@ -1,208 +1,208 @@ -/* Main simulator entry points specific to the FR30. - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "sim-main.h" -#ifdef HAVE_STDLIB_H -#include <stdlib.h> -#endif -#include "sim-options.h" -#include "libiberty.h" -#include "bfd.h" - -static void free_state (SIM_DESC); -static void print_fr30_misc_cpu (SIM_CPU *cpu, int verbose); - -/* Records simulator descriptor so utilities like fr30_dump_regs can be - called from gdb. */ -SIM_DESC current_state; - -/* Cover function of sim_state_free to free the cpu buffers as well. */ - -static void -free_state (SIM_DESC sd) -{ - if (STATE_MODULES (sd) != NULL) - sim_module_uninstall (sd); - sim_cpu_free_all (sd); - sim_state_free (sd); -} - -/* Create an instance of the simulator. */ - -SIM_DESC -sim_open (kind, callback, abfd, argv) - SIM_OPEN_KIND kind; - host_callback *callback; - struct _bfd *abfd; - char **argv; -{ - char c; - int i; - SIM_DESC sd = sim_state_alloc (kind, callback); - - /* The cpu data is kept in a separately allocated chunk of memory. */ - if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 /* FIXME: pc is in mach-specific struct */ - /* FIXME: watchpoints code shouldn't need this */ - { - SIM_CPU *current_cpu = STATE_CPU (sd, 0); - STATE_WATCHPOINTS (sd)->pc = &(PC); - STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); - } -#endif - - if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 /* FIXME: 'twould be nice if we could do this */ - /* These options override any module options. - Obviously ambiguity should be avoided, however the caller may wish to - augment the meaning of an option. */ - if (extra_options != NULL) - sim_add_option_table (sd, extra_options); -#endif - - /* getopt will print the error message so we just have to exit if this fails. - FIXME: Hmmm... in the case of gdb we need getopt to call - print_filtered. */ - if (sim_parse_args (sd, argv) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 - /* Allocate a handler for the control registers and other devices - if no memory for that range has been allocated by the user. - All are allocated in one chunk to keep things from being - unnecessarily complicated. */ - if (sim_core_read_buffer (sd, NULL, read_map, &c, FR30_DEVICE_ADDR, 1) == 0) - sim_core_attach (sd, NULL, - 0 /*level*/, - access_read_write, - 0 /*space ???*/, - FR30_DEVICE_ADDR, FR30_DEVICE_LEN /*nr_bytes*/, - 0 /*modulo*/, - &fr30_devices, - NULL /*buffer*/); -#endif - - /* Allocate core managed memory if none specified by user. - Use address 4 here in case the user wanted address 0 unmapped. */ - if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) - sim_do_commandf (sd, "memory region 0,0x%lx", FR30_DEFAULT_MEM_SIZE); - - /* check for/establish the reference program image */ - if (sim_analyze_program (sd, - (STATE_PROG_ARGV (sd) != NULL - ? *STATE_PROG_ARGV (sd) - : NULL), - abfd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Establish any remaining configuration options. */ - if (sim_config (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - if (sim_post_argv_init (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Open a copy of the cpu descriptor table. */ - { - CGEN_CPU_DESC cd = fr30_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, - CGEN_ENDIAN_BIG); - for (i = 0; i < MAX_NR_PROCESSORS; ++i) - { - SIM_CPU *cpu = STATE_CPU (sd, i); - CPU_CPU_DESC (cpu) = cd; - CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn; - } - fr30_cgen_init_dis (cd); - } - - /* Initialize various cgen things not done by common framework. - Must be done after fr30_cgen_cpu_open. */ - cgen_init (sd); - - /* Store in a global so things like sparc32_dump_regs can be invoked - from the gdb command line. */ - current_state = sd; - - return sd; -} - -void -sim_close (sd, quitting) - SIM_DESC sd; - int quitting; -{ - fr30_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0))); - sim_module_uninstall (sd); -} - -SIM_RC -sim_create_inferior (sd, abfd, argv, envp) - SIM_DESC sd; - struct _bfd *abfd; - char **argv; - char **envp; -{ - SIM_CPU *current_cpu = STATE_CPU (sd, 0); - SIM_ADDR addr; - - if (abfd != NULL) - addr = bfd_get_start_address (abfd); - else - addr = 0; - sim_pc_set (current_cpu, addr); - -#if 0 - STATE_ARGV (sd) = sim_copy_argv (argv); - STATE_ENVP (sd) = sim_copy_argv (envp); -#endif - - return SIM_RC_OK; -} - -void -sim_do_command (sd, cmd) - SIM_DESC sd; - char *cmd; -{ - if (sim_args_command (sd, cmd) != SIM_RC_OK) - sim_io_eprintf (sd, "Unknown command `%s'\n", cmd); -} +// OBSOLETE /* Main simulator entry points specific to the FR30. +// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc. +// OBSOLETE Contributed by Cygnus Solutions. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +// OBSOLETE +// OBSOLETE #include "sim-main.h" +// OBSOLETE #ifdef HAVE_STDLIB_H +// OBSOLETE #include <stdlib.h> +// OBSOLETE #endif +// OBSOLETE #include "sim-options.h" +// OBSOLETE #include "libiberty.h" +// OBSOLETE #include "bfd.h" +// OBSOLETE +// OBSOLETE static void free_state (SIM_DESC); +// OBSOLETE static void print_fr30_misc_cpu (SIM_CPU *cpu, int verbose); +// OBSOLETE +// OBSOLETE /* Records simulator descriptor so utilities like fr30_dump_regs can be +// OBSOLETE called from gdb. */ +// OBSOLETE SIM_DESC current_state; +// OBSOLETE +// OBSOLETE /* Cover function of sim_state_free to free the cpu buffers as well. */ +// OBSOLETE +// OBSOLETE static void +// OBSOLETE free_state (SIM_DESC sd) +// OBSOLETE { +// OBSOLETE if (STATE_MODULES (sd) != NULL) +// OBSOLETE sim_module_uninstall (sd); +// OBSOLETE sim_cpu_free_all (sd); +// OBSOLETE sim_state_free (sd); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Create an instance of the simulator. */ +// OBSOLETE +// OBSOLETE SIM_DESC +// OBSOLETE sim_open (kind, callback, abfd, argv) +// OBSOLETE SIM_OPEN_KIND kind; +// OBSOLETE host_callback *callback; +// OBSOLETE struct _bfd *abfd; +// OBSOLETE char **argv; +// OBSOLETE { +// OBSOLETE char c; +// OBSOLETE int i; +// OBSOLETE SIM_DESC sd = sim_state_alloc (kind, callback); +// OBSOLETE +// OBSOLETE /* The cpu data is kept in a separately allocated chunk of memory. */ +// OBSOLETE if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) +// OBSOLETE { +// OBSOLETE free_state (sd); +// OBSOLETE return 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE #if 0 /* FIXME: pc is in mach-specific struct */ +// OBSOLETE /* FIXME: watchpoints code shouldn't need this */ +// OBSOLETE { +// OBSOLETE SIM_CPU *current_cpu = STATE_CPU (sd, 0); +// OBSOLETE STATE_WATCHPOINTS (sd)->pc = &(PC); +// OBSOLETE STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) +// OBSOLETE { +// OBSOLETE free_state (sd); +// OBSOLETE return 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE #if 0 /* FIXME: 'twould be nice if we could do this */ +// OBSOLETE /* These options override any module options. +// OBSOLETE Obviously ambiguity should be avoided, however the caller may wish to +// OBSOLETE augment the meaning of an option. */ +// OBSOLETE if (extra_options != NULL) +// OBSOLETE sim_add_option_table (sd, extra_options); +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE /* getopt will print the error message so we just have to exit if this fails. +// OBSOLETE FIXME: Hmmm... in the case of gdb we need getopt to call +// OBSOLETE print_filtered. */ +// OBSOLETE if (sim_parse_args (sd, argv) != SIM_RC_OK) +// OBSOLETE { +// OBSOLETE free_state (sd); +// OBSOLETE return 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE #if 0 +// OBSOLETE /* Allocate a handler for the control registers and other devices +// OBSOLETE if no memory for that range has been allocated by the user. +// OBSOLETE All are allocated in one chunk to keep things from being +// OBSOLETE unnecessarily complicated. */ +// OBSOLETE if (sim_core_read_buffer (sd, NULL, read_map, &c, FR30_DEVICE_ADDR, 1) == 0) +// OBSOLETE sim_core_attach (sd, NULL, +// OBSOLETE 0 /*level*/, +// OBSOLETE access_read_write, +// OBSOLETE 0 /*space ???*/, +// OBSOLETE FR30_DEVICE_ADDR, FR30_DEVICE_LEN /*nr_bytes*/, +// OBSOLETE 0 /*modulo*/, +// OBSOLETE &fr30_devices, +// OBSOLETE NULL /*buffer*/); +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE /* Allocate core managed memory if none specified by user. +// OBSOLETE Use address 4 here in case the user wanted address 0 unmapped. */ +// OBSOLETE if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) +// OBSOLETE sim_do_commandf (sd, "memory region 0,0x%lx", FR30_DEFAULT_MEM_SIZE); +// OBSOLETE +// OBSOLETE /* check for/establish the reference program image */ +// OBSOLETE if (sim_analyze_program (sd, +// OBSOLETE (STATE_PROG_ARGV (sd) != NULL +// OBSOLETE ? *STATE_PROG_ARGV (sd) +// OBSOLETE : NULL), +// OBSOLETE abfd) != SIM_RC_OK) +// OBSOLETE { +// OBSOLETE free_state (sd); +// OBSOLETE return 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Establish any remaining configuration options. */ +// OBSOLETE if (sim_config (sd) != SIM_RC_OK) +// OBSOLETE { +// OBSOLETE free_state (sd); +// OBSOLETE return 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE if (sim_post_argv_init (sd) != SIM_RC_OK) +// OBSOLETE { +// OBSOLETE free_state (sd); +// OBSOLETE return 0; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Open a copy of the cpu descriptor table. */ +// OBSOLETE { +// OBSOLETE CGEN_CPU_DESC cd = fr30_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, +// OBSOLETE CGEN_ENDIAN_BIG); +// OBSOLETE for (i = 0; i < MAX_NR_PROCESSORS; ++i) +// OBSOLETE { +// OBSOLETE SIM_CPU *cpu = STATE_CPU (sd, i); +// OBSOLETE CPU_CPU_DESC (cpu) = cd; +// OBSOLETE CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn; +// OBSOLETE } +// OBSOLETE fr30_cgen_init_dis (cd); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Initialize various cgen things not done by common framework. +// OBSOLETE Must be done after fr30_cgen_cpu_open. */ +// OBSOLETE cgen_init (sd); +// OBSOLETE +// OBSOLETE /* Store in a global so things like sparc32_dump_regs can be invoked +// OBSOLETE from the gdb command line. */ +// OBSOLETE current_state = sd; +// OBSOLETE +// OBSOLETE return sd; +// OBSOLETE } +// OBSOLETE +// OBSOLETE void +// OBSOLETE sim_close (sd, quitting) +// OBSOLETE SIM_DESC sd; +// OBSOLETE int quitting; +// OBSOLETE { +// OBSOLETE fr30_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0))); +// OBSOLETE sim_module_uninstall (sd); +// OBSOLETE } +// OBSOLETE +// OBSOLETE SIM_RC +// OBSOLETE sim_create_inferior (sd, abfd, argv, envp) +// OBSOLETE SIM_DESC sd; +// OBSOLETE struct _bfd *abfd; +// OBSOLETE char **argv; +// OBSOLETE char **envp; +// OBSOLETE { +// OBSOLETE SIM_CPU *current_cpu = STATE_CPU (sd, 0); +// OBSOLETE SIM_ADDR addr; +// OBSOLETE +// OBSOLETE if (abfd != NULL) +// OBSOLETE addr = bfd_get_start_address (abfd); +// OBSOLETE else +// OBSOLETE addr = 0; +// OBSOLETE sim_pc_set (current_cpu, addr); +// OBSOLETE +// OBSOLETE #if 0 +// OBSOLETE STATE_ARGV (sd) = sim_copy_argv (argv); +// OBSOLETE STATE_ENVP (sd) = sim_copy_argv (envp); +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE return SIM_RC_OK; +// OBSOLETE } +// OBSOLETE +// OBSOLETE void +// OBSOLETE sim_do_command (sd, cmd) +// OBSOLETE SIM_DESC sd; +// OBSOLETE char *cmd; +// OBSOLETE { +// OBSOLETE if (sim_args_command (sd, cmd) != SIM_RC_OK) +// OBSOLETE sim_io_eprintf (sd, "Unknown command `%s'\n", cmd); +// OBSOLETE } diff --git a/sim/fr30/sim-main.h b/sim/fr30/sim-main.h index 8cbf085..91700fb 100644 --- a/sim/fr30/sim-main.h +++ b/sim/fr30/sim-main.h @@ -1,70 +1,70 @@ -/* Main header for the fr30. */ - -#define USING_SIM_BASE_H /* FIXME: quick hack */ - -struct _sim_cpu; /* FIXME: should be in sim-basics.h */ -typedef struct _sim_cpu SIM_CPU; - -/* sim-basics.h includes config.h but cgen-types.h must be included before - sim-basics.h and cgen-types.h needs config.h. */ -#include "config.h" - -#include "symcat.h" -#include "sim-basics.h" -#include "cgen-types.h" -#include "fr30-desc.h" -#include "fr30-opc.h" -#include "arch.h" - -/* These must be defined before sim-base.h. */ -typedef USI sim_cia; - -#define CIA_GET(cpu) CPU_PC_GET (cpu) -#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) - -#include "sim-base.h" -#include "cgen-sim.h" -#include "fr30-sim.h" - -/* The _sim_cpu struct. */ - -struct _sim_cpu { - /* sim/common cpu base. */ - sim_cpu_base base; - - /* Static parts of cgen. */ - CGEN_CPU cgen_cpu; - - /* CPU specific parts go here. - Note that in files that don't need to access these pieces WANT_CPU_FOO - won't be defined and thus these parts won't appear. This is ok in the - sense that things work. It is a source of bugs though. - One has to of course be careful to not take the size of this - struct and no structure members accessed in non-cpu specific files can - go after here. Oh for a better language. */ -#if defined (WANT_CPU_FR30BF) - FR30BF_CPU_DATA cpu_data; -#endif -}; - -/* The sim_state struct. */ - -struct sim_state { - sim_cpu *cpu; -#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) - - CGEN_STATE cgen_state; - - sim_state_base base; -}; - -/* Misc. */ - -/* Catch address exceptions. */ -extern SIM_CORE_SIGNAL_FN fr30_core_signal; -#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ -fr30_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ - (TRANSFER), (ERROR)) - -/* Default memory size. */ -#define FR30_DEFAULT_MEM_SIZE 0x800000 /* 8M */ +// OBSOLETE /* Main header for the fr30. */ +// OBSOLETE +// OBSOLETE #define USING_SIM_BASE_H /* FIXME: quick hack */ +// OBSOLETE +// OBSOLETE struct _sim_cpu; /* FIXME: should be in sim-basics.h */ +// OBSOLETE typedef struct _sim_cpu SIM_CPU; +// OBSOLETE +// OBSOLETE /* sim-basics.h includes config.h but cgen-types.h must be included before +// OBSOLETE sim-basics.h and cgen-types.h needs config.h. */ +// OBSOLETE #include "config.h" +// OBSOLETE +// OBSOLETE #include "symcat.h" +// OBSOLETE #include "sim-basics.h" +// OBSOLETE #include "cgen-types.h" +// OBSOLETE #include "fr30-desc.h" +// OBSOLETE #include "fr30-opc.h" +// OBSOLETE #include "arch.h" +// OBSOLETE +// OBSOLETE /* These must be defined before sim-base.h. */ +// OBSOLETE typedef USI sim_cia; +// OBSOLETE +// OBSOLETE #define CIA_GET(cpu) CPU_PC_GET (cpu) +// OBSOLETE #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) +// OBSOLETE +// OBSOLETE #include "sim-base.h" +// OBSOLETE #include "cgen-sim.h" +// OBSOLETE #include "fr30-sim.h" +// OBSOLETE +// OBSOLETE /* The _sim_cpu struct. */ +// OBSOLETE +// OBSOLETE struct _sim_cpu { +// OBSOLETE /* sim/common cpu base. */ +// OBSOLETE sim_cpu_base base; +// OBSOLETE +// OBSOLETE /* Static parts of cgen. */ +// OBSOLETE CGEN_CPU cgen_cpu; +// OBSOLETE +// OBSOLETE /* CPU specific parts go here. +// OBSOLETE Note that in files that don't need to access these pieces WANT_CPU_FOO +// OBSOLETE won't be defined and thus these parts won't appear. This is ok in the +// OBSOLETE sense that things work. It is a source of bugs though. +// OBSOLETE One has to of course be careful to not take the size of this +// OBSOLETE struct and no structure members accessed in non-cpu specific files can +// OBSOLETE go after here. Oh for a better language. */ +// OBSOLETE #if defined (WANT_CPU_FR30BF) +// OBSOLETE FR30BF_CPU_DATA cpu_data; +// OBSOLETE #endif +// OBSOLETE }; +// OBSOLETE +// OBSOLETE /* The sim_state struct. */ +// OBSOLETE +// OBSOLETE struct sim_state { +// OBSOLETE sim_cpu *cpu; +// OBSOLETE #define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) +// OBSOLETE +// OBSOLETE CGEN_STATE cgen_state; +// OBSOLETE +// OBSOLETE sim_state_base base; +// OBSOLETE }; +// OBSOLETE +// OBSOLETE /* Misc. */ +// OBSOLETE +// OBSOLETE /* Catch address exceptions. */ +// OBSOLETE extern SIM_CORE_SIGNAL_FN fr30_core_signal; +// OBSOLETE #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ +// OBSOLETE fr30_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ +// OBSOLETE (TRANSFER), (ERROR)) +// OBSOLETE +// OBSOLETE /* Default memory size. */ +// OBSOLETE #define FR30_DEFAULT_MEM_SIZE 0x800000 /* 8M */ diff --git a/sim/fr30/traps.c b/sim/fr30/traps.c index 25cd7b9..6852359 100644 --- a/sim/fr30/traps.c +++ b/sim/fr30/traps.c @@ -1,218 +1,218 @@ -/* fr30 exception, interrupt, and trap (EIT) support - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "sim-main.h" -#include "targ-vals.h" -#include "cgen-engine.h" - -/* The semantic code invokes this for invalid (unrecognized) instructions. */ - -SEM_PC -sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - -#if 0 - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - h_bsm_set (current_cpu, h_sm_get (current_cpu)); - h_bie_set (current_cpu, h_ie_get (current_cpu)); - h_bcond_set (current_cpu, h_cond_get (current_cpu)); - /* sm not changed */ - h_ie_set (current_cpu, 0); - h_cond_set (current_cpu, 0); - - h_bpc_set (current_cpu, cia); - - sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, - EIT_RSVD_INSN_ADDR); - } - else -#endif - sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL); - return vpc; -} - -/* Process an address exception. */ - -void -fr30_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, - unsigned int map, int nr_bytes, address_word addr, - transfer_type transfer, sim_core_signals sig) -{ -#if 0 - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - h_bsm_set (current_cpu, h_sm_get (current_cpu)); - h_bie_set (current_cpu, h_ie_get (current_cpu)); - h_bcond_set (current_cpu, h_cond_get (current_cpu)); - /* sm not changed */ - h_ie_set (current_cpu, 0); - h_cond_set (current_cpu, 0); - - h_bpc_set (current_cpu, cia); - - sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, - EIT_ADDR_EXCP_ADDR); - } - else -#endif - sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, - transfer, sig); -} - -/* Read/write functions for system call interface. */ - -static int -syscall_read_mem (host_callback *cb, struct cb_syscall *sc, - unsigned long taddr, char *buf, int bytes) -{ - SIM_DESC sd = (SIM_DESC) sc->p1; - SIM_CPU *cpu = (SIM_CPU *) sc->p2; - - return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); -} - -static int -syscall_write_mem (host_callback *cb, struct cb_syscall *sc, - unsigned long taddr, const char *buf, int bytes) -{ - SIM_DESC sd = (SIM_DESC) sc->p1; - SIM_CPU *cpu = (SIM_CPU *) sc->p2; - - return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); -} - -/* Subroutine of fr30_int to save the PS and PC and setup for INT and INTE. */ - -static void -setup_int (SIM_CPU *current_cpu, PCADDR pc) -{ - USI ssp = fr30bf_h_dr_get (current_cpu, H_DR_SSP); - USI ps = fr30bf_h_ps_get (current_cpu); - - ssp -= 4; - SETMEMSI (current_cpu, pc, ssp, ps); - ssp -= 4; - SETMEMSI (current_cpu, pc, ssp, pc + 2); - fr30bf_h_dr_set (current_cpu, H_DR_SSP, ssp); - fr30bf_h_sbit_set (current_cpu, 0); -} - -/* Trap support. - The result is the pc address to continue at. - Preprocessing like saving the various registers has already been done. */ - -USI -fr30_int (SIM_CPU *current_cpu, PCADDR pc, int num) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - host_callback *cb = STATE_CALLBACK (sd); - -#ifdef SIM_HAVE_BREAKPOINTS - /* Check for breakpoints "owned" by the simulator first, regardless - of --environment. */ - if (num == TRAP_BREAKPOINT) - { - /* First try sim-break.c. If it's a breakpoint the simulator "owns" - it doesn't return. Otherwise it returns and let's us try. */ - sim_handle_breakpoint (sd, current_cpu, pc); - /* Fall through. */ - } -#endif - - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - /* The new pc is the trap vector entry. - We assume there's a branch there to some handler. */ - USI new_pc; - setup_int (current_cpu, pc); - fr30bf_h_ibit_set (current_cpu, 0); - new_pc = GETMEMSI (current_cpu, pc, - fr30bf_h_dr_get (current_cpu, H_DR_TBR) - + 1024 - ((num + 1) * 4)); - return new_pc; - } - - switch (num) - { - case TRAP_SYSCALL : - { - /* TODO: find out what the ABI for this is */ - CB_SYSCALL s; - - CB_SYSCALL_INIT (&s); - s.func = fr30bf_h_gr_get (current_cpu, 0); - s.arg1 = fr30bf_h_gr_get (current_cpu, 4); - s.arg2 = fr30bf_h_gr_get (current_cpu, 5); - s.arg3 = fr30bf_h_gr_get (current_cpu, 6); - - if (s.func == TARGET_SYS_exit) - { - sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1); - } - - s.p1 = (PTR) sd; - s.p2 = (PTR) current_cpu; - s.read_mem = syscall_read_mem; - s.write_mem = syscall_write_mem; - cb_syscall (cb, &s); - fr30bf_h_gr_set (current_cpu, 2, s.errcode); /* TODO: check this one */ - fr30bf_h_gr_set (current_cpu, 4, s.result); - fr30bf_h_gr_set (current_cpu, 1, s.result2); /* TODO: check this one */ - break; - } - - case TRAP_BREAKPOINT: - sim_engine_halt (sd, current_cpu, NULL, pc, - sim_stopped, SIM_SIGTRAP); - break; - - default : - { - USI new_pc; - setup_int (current_cpu, pc); - fr30bf_h_ibit_set (current_cpu, 0); - new_pc = GETMEMSI (current_cpu, pc, - fr30bf_h_dr_get (current_cpu, H_DR_TBR) - + 1024 - ((num + 1) * 4)); - return new_pc; - } - } - - /* Fake an "reti" insn. - Since we didn't push anything to stack, all we need to do is - update pc. */ - return pc + 2; -} - -USI -fr30_inte (SIM_CPU *current_cpu, PCADDR pc, int num) -{ - /* The new pc is the trap #9 vector entry. - We assume there's a branch there to some handler. */ - USI new_pc; - setup_int (current_cpu, pc); - fr30bf_h_ilm_set (current_cpu, 4); - new_pc = GETMEMSI (current_cpu, pc, - fr30bf_h_dr_get (current_cpu, H_DR_TBR) - + 1024 - ((9 + 1) * 4)); - return new_pc; -} +// OBSOLETE /* fr30 exception, interrupt, and trap (EIT) support +// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc. +// OBSOLETE Contributed by Cygnus Solutions. +// OBSOLETE +// OBSOLETE This file is part of the GNU simulators. +// OBSOLETE +// OBSOLETE This program is free software; you can redistribute it and/or modify +// OBSOLETE it under the terms of the GNU General Public License as published by +// OBSOLETE the Free Software Foundation; either version 2, or (at your option) +// OBSOLETE any later version. +// OBSOLETE +// OBSOLETE This program is distributed in the hope that it will be useful, +// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of +// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// OBSOLETE GNU General Public License for more details. +// OBSOLETE +// OBSOLETE You should have received a copy of the GNU General Public License along +// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., +// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +// OBSOLETE +// OBSOLETE #include "sim-main.h" +// OBSOLETE #include "targ-vals.h" +// OBSOLETE #include "cgen-engine.h" +// OBSOLETE +// OBSOLETE /* The semantic code invokes this for invalid (unrecognized) instructions. */ +// OBSOLETE +// OBSOLETE SEM_PC +// OBSOLETE sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc) +// OBSOLETE { +// OBSOLETE SIM_DESC sd = CPU_STATE (current_cpu); +// OBSOLETE +// OBSOLETE #if 0 +// OBSOLETE if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) +// OBSOLETE { +// OBSOLETE h_bsm_set (current_cpu, h_sm_get (current_cpu)); +// OBSOLETE h_bie_set (current_cpu, h_ie_get (current_cpu)); +// OBSOLETE h_bcond_set (current_cpu, h_cond_get (current_cpu)); +// OBSOLETE /* sm not changed */ +// OBSOLETE h_ie_set (current_cpu, 0); +// OBSOLETE h_cond_set (current_cpu, 0); +// OBSOLETE +// OBSOLETE h_bpc_set (current_cpu, cia); +// OBSOLETE +// OBSOLETE sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, +// OBSOLETE EIT_RSVD_INSN_ADDR); +// OBSOLETE } +// OBSOLETE else +// OBSOLETE #endif +// OBSOLETE sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL); +// OBSOLETE return vpc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Process an address exception. */ +// OBSOLETE +// OBSOLETE void +// OBSOLETE fr30_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, +// OBSOLETE unsigned int map, int nr_bytes, address_word addr, +// OBSOLETE transfer_type transfer, sim_core_signals sig) +// OBSOLETE { +// OBSOLETE #if 0 +// OBSOLETE if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) +// OBSOLETE { +// OBSOLETE h_bsm_set (current_cpu, h_sm_get (current_cpu)); +// OBSOLETE h_bie_set (current_cpu, h_ie_get (current_cpu)); +// OBSOLETE h_bcond_set (current_cpu, h_cond_get (current_cpu)); +// OBSOLETE /* sm not changed */ +// OBSOLETE h_ie_set (current_cpu, 0); +// OBSOLETE h_cond_set (current_cpu, 0); +// OBSOLETE +// OBSOLETE h_bpc_set (current_cpu, cia); +// OBSOLETE +// OBSOLETE sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, +// OBSOLETE EIT_ADDR_EXCP_ADDR); +// OBSOLETE } +// OBSOLETE else +// OBSOLETE #endif +// OBSOLETE sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, +// OBSOLETE transfer, sig); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Read/write functions for system call interface. */ +// OBSOLETE +// OBSOLETE static int +// OBSOLETE syscall_read_mem (host_callback *cb, struct cb_syscall *sc, +// OBSOLETE unsigned long taddr, char *buf, int bytes) +// OBSOLETE { +// OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1; +// OBSOLETE SIM_CPU *cpu = (SIM_CPU *) sc->p2; +// OBSOLETE +// OBSOLETE return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); +// OBSOLETE } +// OBSOLETE +// OBSOLETE static int +// OBSOLETE syscall_write_mem (host_callback *cb, struct cb_syscall *sc, +// OBSOLETE unsigned long taddr, const char *buf, int bytes) +// OBSOLETE { +// OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1; +// OBSOLETE SIM_CPU *cpu = (SIM_CPU *) sc->p2; +// OBSOLETE +// OBSOLETE return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Subroutine of fr30_int to save the PS and PC and setup for INT and INTE. */ +// OBSOLETE +// OBSOLETE static void +// OBSOLETE setup_int (SIM_CPU *current_cpu, PCADDR pc) +// OBSOLETE { +// OBSOLETE USI ssp = fr30bf_h_dr_get (current_cpu, H_DR_SSP); +// OBSOLETE USI ps = fr30bf_h_ps_get (current_cpu); +// OBSOLETE +// OBSOLETE ssp -= 4; +// OBSOLETE SETMEMSI (current_cpu, pc, ssp, ps); +// OBSOLETE ssp -= 4; +// OBSOLETE SETMEMSI (current_cpu, pc, ssp, pc + 2); +// OBSOLETE fr30bf_h_dr_set (current_cpu, H_DR_SSP, ssp); +// OBSOLETE fr30bf_h_sbit_set (current_cpu, 0); +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Trap support. +// OBSOLETE The result is the pc address to continue at. +// OBSOLETE Preprocessing like saving the various registers has already been done. */ +// OBSOLETE +// OBSOLETE USI +// OBSOLETE fr30_int (SIM_CPU *current_cpu, PCADDR pc, int num) +// OBSOLETE { +// OBSOLETE SIM_DESC sd = CPU_STATE (current_cpu); +// OBSOLETE host_callback *cb = STATE_CALLBACK (sd); +// OBSOLETE +// OBSOLETE #ifdef SIM_HAVE_BREAKPOINTS +// OBSOLETE /* Check for breakpoints "owned" by the simulator first, regardless +// OBSOLETE of --environment. */ +// OBSOLETE if (num == TRAP_BREAKPOINT) +// OBSOLETE { +// OBSOLETE /* First try sim-break.c. If it's a breakpoint the simulator "owns" +// OBSOLETE it doesn't return. Otherwise it returns and let's us try. */ +// OBSOLETE sim_handle_breakpoint (sd, current_cpu, pc); +// OBSOLETE /* Fall through. */ +// OBSOLETE } +// OBSOLETE #endif +// OBSOLETE +// OBSOLETE if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) +// OBSOLETE { +// OBSOLETE /* The new pc is the trap vector entry. +// OBSOLETE We assume there's a branch there to some handler. */ +// OBSOLETE USI new_pc; +// OBSOLETE setup_int (current_cpu, pc); +// OBSOLETE fr30bf_h_ibit_set (current_cpu, 0); +// OBSOLETE new_pc = GETMEMSI (current_cpu, pc, +// OBSOLETE fr30bf_h_dr_get (current_cpu, H_DR_TBR) +// OBSOLETE + 1024 - ((num + 1) * 4)); +// OBSOLETE return new_pc; +// OBSOLETE } +// OBSOLETE +// OBSOLETE switch (num) +// OBSOLETE { +// OBSOLETE case TRAP_SYSCALL : +// OBSOLETE { +// OBSOLETE /* TODO: find out what the ABI for this is */ +// OBSOLETE CB_SYSCALL s; +// OBSOLETE +// OBSOLETE CB_SYSCALL_INIT (&s); +// OBSOLETE s.func = fr30bf_h_gr_get (current_cpu, 0); +// OBSOLETE s.arg1 = fr30bf_h_gr_get (current_cpu, 4); +// OBSOLETE s.arg2 = fr30bf_h_gr_get (current_cpu, 5); +// OBSOLETE s.arg3 = fr30bf_h_gr_get (current_cpu, 6); +// OBSOLETE +// OBSOLETE if (s.func == TARGET_SYS_exit) +// OBSOLETE { +// OBSOLETE sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1); +// OBSOLETE } +// OBSOLETE +// OBSOLETE s.p1 = (PTR) sd; +// OBSOLETE s.p2 = (PTR) current_cpu; +// OBSOLETE s.read_mem = syscall_read_mem; +// OBSOLETE s.write_mem = syscall_write_mem; +// OBSOLETE cb_syscall (cb, &s); +// OBSOLETE fr30bf_h_gr_set (current_cpu, 2, s.errcode); /* TODO: check this one */ +// OBSOLETE fr30bf_h_gr_set (current_cpu, 4, s.result); +// OBSOLETE fr30bf_h_gr_set (current_cpu, 1, s.result2); /* TODO: check this one */ +// OBSOLETE break; +// OBSOLETE } +// OBSOLETE +// OBSOLETE case TRAP_BREAKPOINT: +// OBSOLETE sim_engine_halt (sd, current_cpu, NULL, pc, +// OBSOLETE sim_stopped, SIM_SIGTRAP); +// OBSOLETE break; +// OBSOLETE +// OBSOLETE default : +// OBSOLETE { +// OBSOLETE USI new_pc; +// OBSOLETE setup_int (current_cpu, pc); +// OBSOLETE fr30bf_h_ibit_set (current_cpu, 0); +// OBSOLETE new_pc = GETMEMSI (current_cpu, pc, +// OBSOLETE fr30bf_h_dr_get (current_cpu, H_DR_TBR) +// OBSOLETE + 1024 - ((num + 1) * 4)); +// OBSOLETE return new_pc; +// OBSOLETE } +// OBSOLETE } +// OBSOLETE +// OBSOLETE /* Fake an "reti" insn. +// OBSOLETE Since we didn't push anything to stack, all we need to do is +// OBSOLETE update pc. */ +// OBSOLETE return pc + 2; +// OBSOLETE } +// OBSOLETE +// OBSOLETE USI +// OBSOLETE fr30_inte (SIM_CPU *current_cpu, PCADDR pc, int num) +// OBSOLETE { +// OBSOLETE /* The new pc is the trap #9 vector entry. +// OBSOLETE We assume there's a branch there to some handler. */ +// OBSOLETE USI new_pc; +// OBSOLETE setup_int (current_cpu, pc); +// OBSOLETE fr30bf_h_ilm_set (current_cpu, 4); +// OBSOLETE new_pc = GETMEMSI (current_cpu, pc, +// OBSOLETE fr30bf_h_dr_get (current_cpu, H_DR_TBR) +// OBSOLETE + 1024 - ((9 + 1) * 4)); +// OBSOLETE return new_pc; +// OBSOLETE } diff --git a/sim/ppc/ChangeLog b/sim/ppc/ChangeLog index 6ced05b..4c2dfef 100644 --- a/sim/ppc/ChangeLog +++ b/sim/ppc/ChangeLog @@ -1,3 +1,10 @@ +2002-06-22 Andrew Cagney <ac131313@redhat.com> + + * Makefile.in (INTL_SRC): Define. + (INTL_CFLAGS): Define. + (INTL_DIR): Define. + (STD_CFLAGS): Add INTL_CFLAGS. + 2002-06-17 Elena Zannoni <ezannoni@redhat.com> * psim.c (psim_options): Don't choke when gdb invokes us with diff --git a/sim/ppc/Makefile.in b/sim/ppc/Makefile.in index 6776992..d69b5c3 100644 --- a/sim/ppc/Makefile.in +++ b/sim/ppc/Makefile.in @@ -113,7 +113,7 @@ CONFIG_CFLAGS = $(BSWAP_CFLAGS) \ $(TERMIO_CFLAGS) \ $(DEVZERO_CFLAGS) -STD_CFLAGS = $(CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(WARNING_CFLAGS) $(SIM_CFLAGS) $(HDEFINES) $(TDEFINES) $(INCLUDES) +STD_CFLAGS = $(CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(WARNING_CFLAGS) $(SIM_CFLAGS) $(HDEFINES) $(TDEFINES) $(INCLUDES) $(INTL_CFLAGS) NOWARN_CFLAGS = $(CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(SIM_CFLAGS) $(HDEFINES) $(TDEFINES) $(INCLUDES) BUILD_CFLAGS = -g -O $(INCLUDES) $(WARNING_CFLAGS) @@ -154,6 +154,10 @@ BFD_LIB = ../../bfd/libbfd.a INTLLIBS = @INTLLIBS@ INTLDEPS = @INTLDEPS@ +INTL_DIR = ../../intl +INTL_SRC = $(srcdir)/$(INTL_DIR) +INTL_CFLAGS = -I$(INTL_DIR) -I$(INTL_SRC) + TARGETLIB = libsim.a diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog index d8a8f70..ec58759 100644 --- a/sim/sh/ChangeLog +++ b/sim/sh/ChangeLog @@ -1,3 +1,9 @@ +Wed Jul 17 19:36:38 2002 J"orn Rennecke <joern.rennecke@superh.com> + + * Makefile.in (interp.o): Depend on $(srcroot)/include/gdb/sim-sh.h. + * interp.c: Include "gdb/sim-sh.h". + (sim_store_register, sim_fetch_register): Use constants defined there. + Tue Jun 18 16:53:11 2002 J"orn Rennecke <joern.rennecke@superh.com> * interp.c (sim_resume): Fix setting of bus error for diff --git a/sim/sh/Makefile.in b/sim/sh/Makefile.in index 62aaeaf..784c39a 100644 --- a/sim/sh/Makefile.in +++ b/sim/sh/Makefile.in @@ -24,7 +24,7 @@ SIM_EXTRA_CLEAN = sh-clean ## COMMON_POST_CONFIG_FRAG -interp.o: interp.c code.c table.c ppi.c +interp.o: interp.c code.c table.c ppi.c $(srcroot)/include/gdb/sim-sh.h code.c: gencode ./gencode -x >code.c diff --git a/sim/sh/interp.c b/sim/sh/interp.c index 6abff00..2f5d1d3 100644 --- a/sim/sh/interp.c +++ b/sim/sh/interp.c @@ -29,6 +29,7 @@ #include "bfd.h" #include "gdb/callback.h" #include "gdb/remote-sim.h" +#include "gdb/sim-sh.h" /* This file is local - if newlib changes, then so should this. */ #include "syscall.h" @@ -1790,98 +1791,122 @@ sim_store_register (sd, rn, memory, length) val = swap (* (int *)memory); switch (rn) { - case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: - case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15: + case SIM_SH_R0_REGNUM: case SIM_SH_R1_REGNUM: case SIM_SH_R2_REGNUM: + case SIM_SH_R3_REGNUM: case SIM_SH_R4_REGNUM: case SIM_SH_R5_REGNUM: + case SIM_SH_R6_REGNUM: case SIM_SH_R7_REGNUM: case SIM_SH_R8_REGNUM: + case SIM_SH_R9_REGNUM: case SIM_SH_R10_REGNUM: case SIM_SH_R11_REGNUM: + case SIM_SH_R12_REGNUM: case SIM_SH_R13_REGNUM: case SIM_SH_R14_REGNUM: + case SIM_SH_R15_REGNUM: saved_state.asregs.regs[rn] = val; break; - case 16: + case SIM_SH_PC_REGNUM: saved_state.asregs.pc = val; break; - case 17: + case SIM_SH_PR_REGNUM: PR = val; break; - case 18: + case SIM_SH_GBR_REGNUM: GBR = val; break; - case 19: + case SIM_SH_VBR_REGNUM: VBR = val; break; - case 20: + case SIM_SH_MACH_REGNUM: MACH = val; break; - case 21: + case SIM_SH_MACL_REGNUM: MACL = val; break; - case 22: + case SIM_SH_SR_REGNUM: SET_SR (val); break; - case 23: + case SIM_SH_FPUL_REGNUM: FPUL = val; break; - case 24: + case SIM_SH_FPSCR_REGNUM: SET_FPSCR (val); break; - case 25: - if (target_dsp) - A0G = val; - else case 26: - if (target_dsp) - A0 = val; - else case 27: - if (target_dsp) - A1G = val; - else case 28: - if (target_dsp) - A1 = val; - else case 29: - if (target_dsp) - M0 = val; - else case 30: - if (target_dsp) - M1 = val; - else case 31: - if (target_dsp) - X0 = val; - else case 32: - if (target_dsp) - X1 = val; - else case 33: - if (target_dsp) - Y0 = val; - else case 34: - if (target_dsp) - Y1 = val; - else case 40: - if (target_dsp) - SET_MOD (val); - else case 35: case 36: case 37: case 38: case 39: - SET_FI (rn - 25, val); - break; - case 41: + case SIM_SH_FR0_REGNUM: case SIM_SH_FR1_REGNUM: case SIM_SH_FR2_REGNUM: + case SIM_SH_FR3_REGNUM: case SIM_SH_FR4_REGNUM: case SIM_SH_FR5_REGNUM: + case SIM_SH_FR6_REGNUM: case SIM_SH_FR7_REGNUM: case SIM_SH_FR8_REGNUM: + case SIM_SH_FR9_REGNUM: case SIM_SH_FR10_REGNUM: case SIM_SH_FR11_REGNUM: + case SIM_SH_FR12_REGNUM: case SIM_SH_FR13_REGNUM: case SIM_SH_FR14_REGNUM: + case SIM_SH_FR15_REGNUM: + SET_FI (rn - SIM_SH_FR0_REGNUM, val); + break; + case SIM_SH_DSR_REGNUM: + DSR = val; + break; + case SIM_SH_A0G_REGNUM: + A0G = val; + break; + case SIM_SH_A0_REGNUM: + A0 = val; + break; + case SIM_SH_A1G_REGNUM: + A1G = val; + break; + case SIM_SH_A1_REGNUM: + A1 = val; + break; + case SIM_SH_M0_REGNUM: + M0 = val; + break; + case SIM_SH_M1_REGNUM: + M1 = val; + break; + case SIM_SH_X0_REGNUM: + X0 = val; + break; + case SIM_SH_X1_REGNUM: + X1 = val; + break; + case SIM_SH_Y0_REGNUM: + Y0 = val; + break; + case SIM_SH_Y1_REGNUM: + Y1 = val; + break; + case SIM_SH_MOD_REGNUM: + SET_MOD (val); + break; + case SIM_SH_RS_REGNUM: + RS = val; + break; + case SIM_SH_RE_REGNUM: + RE = val; + break; + case SIM_SH_SSR_REGNUM: SSR = val; break; - case 42: + case SIM_SH_SPC_REGNUM: SPC = val; break; /* The rn_bank idiosyncracies are not due to hardware differences, but to a weird aliasing naming scheme for sh3 / sh3e / sh4. */ - case 43: - if (target_dsp) - RS = val; - else case 44: - if (target_dsp) - RE = val; - else case 45: case 46: case 47: case 48: case 49: case 50: + case SIM_SH_R0_BANK0_REGNUM: case SIM_SH_R1_BANK0_REGNUM: + case SIM_SH_R2_BANK0_REGNUM: case SIM_SH_R3_BANK0_REGNUM: + case SIM_SH_R4_BANK0_REGNUM: case SIM_SH_R5_BANK0_REGNUM: + case SIM_SH_R6_BANK0_REGNUM: case SIM_SH_R7_BANK0_REGNUM: if (SR_MD && SR_RB) - Rn_BANK (rn - 43) = val; + Rn_BANK (rn - SIM_SH_R0_BANK0_REGNUM) = val; else - saved_state.asregs.regs[rn - 43] = val; + saved_state.asregs.regs[rn - SIM_SH_R0_BANK0_REGNUM] = val; break; - case 51: case 52: case 53: case 54: case 55: case 56: case 57: case 58: - if (target_dsp || ! SR_MD || ! SR_RB) - SET_Rn_BANK (rn - 51, val); + case SIM_SH_R0_BANK1_REGNUM: case SIM_SH_R1_BANK1_REGNUM: + case SIM_SH_R2_BANK1_REGNUM: case SIM_SH_R3_BANK1_REGNUM: + case SIM_SH_R4_BANK1_REGNUM: case SIM_SH_R5_BANK1_REGNUM: + case SIM_SH_R6_BANK1_REGNUM: case SIM_SH_R7_BANK1_REGNUM: + if (SR_MD && SR_RB) + saved_state.asregs.regs[rn - SIM_SH_R0_BANK1_REGNUM] = val; else - saved_state.asregs.regs[rn - 51] = val; + Rn_BANK (rn - SIM_SH_R0_BANK1_REGNUM) = val; + break; + case SIM_SH_R0_BANK_REGNUM: case SIM_SH_R1_BANK_REGNUM: + case SIM_SH_R2_BANK_REGNUM: case SIM_SH_R3_BANK_REGNUM: + case SIM_SH_R4_BANK_REGNUM: case SIM_SH_R5_BANK_REGNUM: + case SIM_SH_R6_BANK_REGNUM: case SIM_SH_R7_BANK_REGNUM: + SET_Rn_BANK (rn - SIM_SH_R0_BANK_REGNUM, val); break; default: return 0; @@ -1901,96 +1926,120 @@ sim_fetch_register (sd, rn, memory, length) init_pointers (); switch (rn) { - case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: - case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15: + case SIM_SH_R0_REGNUM: case SIM_SH_R1_REGNUM: case SIM_SH_R2_REGNUM: + case SIM_SH_R3_REGNUM: case SIM_SH_R4_REGNUM: case SIM_SH_R5_REGNUM: + case SIM_SH_R6_REGNUM: case SIM_SH_R7_REGNUM: case SIM_SH_R8_REGNUM: + case SIM_SH_R9_REGNUM: case SIM_SH_R10_REGNUM: case SIM_SH_R11_REGNUM: + case SIM_SH_R12_REGNUM: case SIM_SH_R13_REGNUM: case SIM_SH_R14_REGNUM: + case SIM_SH_R15_REGNUM: val = saved_state.asregs.regs[rn]; break; - case 16: + case SIM_SH_PC_REGNUM: val = saved_state.asregs.pc; break; - case 17: + case SIM_SH_PR_REGNUM: val = PR; break; - case 18: + case SIM_SH_GBR_REGNUM: val = GBR; break; - case 19: + case SIM_SH_VBR_REGNUM: val = VBR; break; - case 20: + case SIM_SH_MACH_REGNUM: val = MACH; break; - case 21: + case SIM_SH_MACL_REGNUM: val = MACL; break; - case 22: + case SIM_SH_SR_REGNUM: val = GET_SR (); break; - case 23: + case SIM_SH_FPUL_REGNUM: val = FPUL; break; - case 24: + case SIM_SH_FPSCR_REGNUM: val = GET_FPSCR (); break; - case 25: - val = target_dsp ? SEXT (A0G) : FI (0); + case SIM_SH_FR0_REGNUM: case SIM_SH_FR1_REGNUM: case SIM_SH_FR2_REGNUM: + case SIM_SH_FR3_REGNUM: case SIM_SH_FR4_REGNUM: case SIM_SH_FR5_REGNUM: + case SIM_SH_FR6_REGNUM: case SIM_SH_FR7_REGNUM: case SIM_SH_FR8_REGNUM: + case SIM_SH_FR9_REGNUM: case SIM_SH_FR10_REGNUM: case SIM_SH_FR11_REGNUM: + case SIM_SH_FR12_REGNUM: case SIM_SH_FR13_REGNUM: case SIM_SH_FR14_REGNUM: + case SIM_SH_FR15_REGNUM: + val = FI (rn - SIM_SH_FR0_REGNUM); break; - case 26: - val = target_dsp ? A0 : FI (1); + case SIM_SH_DSR_REGNUM: + val = DSR; break; - case 27: - val = target_dsp ? SEXT (A1G) : FI (2); + case SIM_SH_A0G_REGNUM: + val = SEXT (A0G); break; - case 28: - val = target_dsp ? A1 : FI (3); + case SIM_SH_A0_REGNUM: + val = A0; break; - case 29: - val = target_dsp ? M0 : FI (4); + case SIM_SH_A1G_REGNUM: + val = SEXT (A1G); break; - case 30: - val = target_dsp ? M1 : FI (5); + case SIM_SH_A1_REGNUM: + val = A1; break; - case 31: - val = target_dsp ? X0 : FI (6); + case SIM_SH_M0_REGNUM: + val = M0; break; - case 32: - val = target_dsp ? X1 : FI (7); + case SIM_SH_M1_REGNUM: + val = M1; break; - case 33: - val = target_dsp ? Y0 : FI (8); + case SIM_SH_X0_REGNUM: + val = X0; break; - case 34: - val = target_dsp ? Y1 : FI (9); + case SIM_SH_X1_REGNUM: + val = X1; break; - case 35: case 36: case 37: case 38: case 39: - val = FI (rn - 25); + case SIM_SH_Y0_REGNUM: + val = Y0; break; - case 40: - val = target_dsp ? MOD : FI (15); + case SIM_SH_Y1_REGNUM: + val = Y1; break; - case 41: + case SIM_SH_MOD_REGNUM: + val = MOD; + break; + case SIM_SH_RS_REGNUM: + val = RS; + break; + case SIM_SH_RE_REGNUM: + val = RE; + break; + case SIM_SH_SSR_REGNUM: val = SSR; break; - case 42: + case SIM_SH_SPC_REGNUM: val = SPC; break; /* The rn_bank idiosyncracies are not due to hardware differences, but to a weird aliasing naming scheme for sh3 / sh3e / sh4. */ - case 43: - if (target_dsp) - val = RS; - else case 44: - if (target_dsp) - val = RE; - else case 45: case 46: case 47: case 48: case 49: case 50: - val = (SR_MD && SR_RB - ? Rn_BANK (rn - 43) - : saved_state.asregs.regs[rn - 43]); - break; - case 51: case 52: case 53: case 54: case 55: case 56: case 57: case 58: - val = (target_dsp || ! SR_MD || ! SR_RB - ? Rn_BANK (rn - 51) - : saved_state.asregs.regs[rn - 51]); + case SIM_SH_R0_BANK0_REGNUM: case SIM_SH_R1_BANK0_REGNUM: + case SIM_SH_R2_BANK0_REGNUM: case SIM_SH_R3_BANK0_REGNUM: + case SIM_SH_R4_BANK0_REGNUM: case SIM_SH_R5_BANK0_REGNUM: + case SIM_SH_R6_BANK0_REGNUM: case SIM_SH_R7_BANK0_REGNUM: + val = (SR_MD && SR_RB + ? Rn_BANK (rn - SIM_SH_R0_BANK0_REGNUM) + : saved_state.asregs.regs[rn - SIM_SH_R0_BANK0_REGNUM]); + break; + case SIM_SH_R0_BANK1_REGNUM: case SIM_SH_R1_BANK1_REGNUM: + case SIM_SH_R2_BANK1_REGNUM: case SIM_SH_R3_BANK1_REGNUM: + case SIM_SH_R4_BANK1_REGNUM: case SIM_SH_R5_BANK1_REGNUM: + case SIM_SH_R6_BANK1_REGNUM: case SIM_SH_R7_BANK1_REGNUM: + val = (! SR_MD || ! SR_RB + ? Rn_BANK (rn - SIM_SH_R0_BANK1_REGNUM) + : saved_state.asregs.regs[rn - SIM_SH_R0_BANK1_REGNUM]); + break; + case SIM_SH_R0_BANK_REGNUM: case SIM_SH_R1_BANK_REGNUM: + case SIM_SH_R2_BANK_REGNUM: case SIM_SH_R3_BANK_REGNUM: + case SIM_SH_R4_BANK_REGNUM: case SIM_SH_R5_BANK_REGNUM: + case SIM_SH_R6_BANK_REGNUM: case SIM_SH_R7_BANK_REGNUM: + val = Rn_BANK (rn - SIM_SH_R0_BANK_REGNUM); break; default: return 0; diff --git a/sim/w65/ChangeLog b/sim/w65/ChangeLog deleted file mode 100644 index e3a5673..0000000 --- a/sim/w65/ChangeLog +++ /dev/null @@ -1,156 +0,0 @@ -2002-06-16 Andrew Cagney <ac131313@redhat.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -2002-06-08 Andrew Cagney <cagney@redhat.com> - - * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h". - -Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -1999-05-08 Felix Lee <flee@cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Sun Apr 26 15:19:08 1998 Tom Tromey <tromey@cygnus.com> - - * acconfig.h: New file. - * configure.in: Reverted change of Apr 24; use sinclude again. - Don't call AC_C_CROSS. - -Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Fri Apr 24 11:17:46 1998 Tom Tromey <tromey@cygnus.com> - - * acconfig.h: Removed. - * configure.in: Call CY_GNU_GETTEXT. - * Makefile.in (INTLLIBS): New macro. - (INTLDEPS): Likewise. - ($(RUN_PROG)): Depend on INTLDEPS; link against INTLLIBS. - (top_builddir): New macro. - -Wed Apr 22 14:29:50 1998 Michael Meissner <meissner@cygnus.com> - - * configure: Regenerate with autoconf 2.12.1. - -Tue Feb 17 12:52:24 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * run.c (main): Pass length into sim_fetch_register. - - * interp.c (sim_store_register, sim_fetch_register): Pass in - length parameter. Return -1. - -Tue Aug 26 10:43:11 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_kill): Delete. - (sim_create_inferior): Add ABFD argument. Set PC from same. - -Mon Aug 25 16:34:33 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_open): Add ABFD argument. Change ARGV to PARGV. - -Tue May 20 10:24:54 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_open): Add callback argument. - -Tue Apr 15 14:55:10 1997 Ian Lance Taylor <ian@cygnus.com> - - * Makefile.in (INSTALL): Set to @INSTALL@. - (INSTALL_XFORM, INSTALL_XFORM1): Remove. - (install): Depend upon installdirs. Use $(program_transform_name) - directly, rather than using $(INSTALL_XFORM) and - $(INSTALL_XFORM1). - (installdirs): New target. - -Mon Apr 14 16:30:02 1997 Ian Lance Taylor <ian@cygnus.com> - - * Makefile.in (INSTALL): Change install.sh to install-sh. - -Wed Apr 2 15:40:30 1997 Doug Evans <dje@canuck.cygnus.com> - - * interp.c (sim_open): New arg `kind'. `name is now `argv'. - -Thu Oct 3 16:17:59 1996 Jason Molenda (crash@godzilla.cygnus.co.jp) - - * Makefile.in (mostlyclean): Move config.log to distclean. - -Wed Jun 26 12:30:45 1996 Jason Molenda (crash@godzilla.cygnus.co.jp) - - * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir, - INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values. - (docdir): Removed. - * configure.in (AC_PREREQ): autoconf 2.5 or higher. - (AC_PROG_INSTALL): Added. - * configure: Rebuilt. - -Wed Feb 21 12:17:04 1996 Ian Lance Taylor <ian@cygnus.com> - - * configure: Regenerate with autoconf 2.7. - -Thu Oct 19 21:44:14 1995 Fred Fish <fnf@cygnus.com> - - * Makefile.in: Remove tabs from otherwise empty line. - Confuses many older non-GNU versions of "make". - -Tue Oct 10 11:13:01 1995 Fred Fish <fnf@cygnus.com> - - * Makefile.in (BISONFLAGS): Remove macro. - -Wed Sep 20 13:35:43 1995 Ian Lance Taylor <ian@cygnus.com> - - * Makefile.in (maintainer-clean): New synonym for realclean. - -Fri Sep 8 14:03:32 1995 Ian Lance Taylor <ian@cygnus.com> - - * configure.in: Convert to use autoconf. - * configure: New file, built by autoconf. - * acconfig.h: New file. - * config.in: New file, built by autoheader. - * Makefile.in: Various changes for new configure script. Also: - (INSTALL): Go up two levels, not one. - (ALLOCA, MALLOC, OPCODES): Remove. - (gencode): Use $(CC_FOR_BUILD). - (case.o): Remove. - (run.o, interp.o): Depend upon config.h. - * interp.c: Include "config.h". Don't include "sysdep.h". - Include <stdlib.h>, <time.h>, and <unistd.h> if they exist. - * run.c: Include "config.h". Don't include "sysdep.h". Include - <stdlib.h> if it exists. Include "getopt.h". Declare printf if - necessary. - -Thu Aug 3 10:45:37 1995 Fred Fish <fnf@cygnus.com> - - * Update all FSF addresses except those in COPYING* files. - -Wed Jul 5 16:12:53 1995 J.T. Conklin <jtc@rtl.cygnus.com> - - * w65.mt: Removed. - -Wed May 24 16:31:38 1995 Jim Wilson <wilson@chestnut.cygnus.com> - - * configure.in: Fix typo in last change. - -Mon Mar 27 10:32:34 1995 J.T. Conklin <jtc@rtl.cygnus.com> - - * run.c: parse arguments with getopt(). - -Tue Feb 28 17:31:36 1995 Ian Lance Taylor <ian@cygnus.com> - - * configure.in: Use ../../bfd/hosts/std-host.h if specific - host unavailable. - - * Started ChangeLog. diff --git a/sim/w65/Makefile.in b/sim/w65/Makefile.in deleted file mode 100644 index 8943bd5..0000000 --- a/sim/w65/Makefile.in +++ /dev/null @@ -1,247 +0,0 @@ -# Makefile for GNU binary-file utilities -# Copyright (C) 1992, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. - -# This file is part of GNU binutils. - -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -VPATH = @srcdir@ -srcdir = @srcdir@ - -prefix = @prefix@ -exec_prefix = @exec_prefix@ - -host_alias = @host_alias@ -target_alias = @target_alias@ -program_transform_name = @program_transform_name@ -bindir = @bindir@ -libdir = @libdir@ -tooldir = $(exec_prefix)/$(target_alias) - -datadir = @datadir@ -mandir = @mandir@ -man1dir = $(mandir)/man1 -man2dir = $(mandir)/man2 -man3dir = $(mandir)/man3 -man4dir = $(mandir)/man4 -man5dir = $(mandir)/man5 -man6dir = $(mandir)/man6 -man7dir = $(mandir)/man7 -man8dir = $(mandir)/man8 -man9dir = $(mandir)/man9 -infodir = @infodir@ -includedir = @includedir@ - -# This can be referenced by the gettext configuration code. -top_builddir = .. - -SHELL = /bin/sh - -INSTALL = @INSTALL@ -INSTALL_PROGRAM = @INSTALL_PROGRAM@ -INSTALL_DATA = @INSTALL_DATA@ - -AR = @AR@ -AR_FLAGS = qv -CC = @CC@ -CFLAGS = @CFLAGS@ -MAKEINFO = makeinfo -TEXI2DVI = texi2dvi -RANLIB = @RANLIB@ -TEXI2ROFF=texi2roff -MAKEOVERRIDES= -CC_FOR_BUILD = @CC_FOR_BUILD@ - -HDEFINES = @HDEFINES@ -TDEFINES = - -# Comment these out if using lex. -# Distribution version - -# Distribution name - -# Where to find texinfo.tex to format docn with TeX -TEXIDIR = $(srcdir)/../texinfo - -# These should all be the same program too. -RUN_PROG=run -SIM_LIB=libsim.a -ADDL_LIBS= - -PROGS = $(RUN_PROG) -LIBS= $(SIM_LIB) - -DISTSTUFF = $(PROGS) $(LIBS) - -BASEDIR = $(srcdir)/../.. -BFDDIR = $(BASEDIR)/bfd -INCDIR = $(BASEDIR)/include -GDBDIR = $(BASEDIR)/gdb -INCLUDES = -I. -I$(srcdir) -I../../bfd -I$(BFDDIR) -I$(INCDIR) -I$(GDBDIR) - -#### host and target dependant Makefile fragments come in here. -### - -ALL_CFLAGS = $(INCLUDES) $(HDEFINES) $(TDEFINES) $(CFLAGS) - -.c.o: - $(CC) -c $(ALL_CFLAGS) $< - -LIBIBERTY = ../../libiberty/libiberty.a - -BFD = ../../bfd/libbfd.a - -INTLLIBS = @INTLLIBS@ -INTLDEPS = @INTLDEPS@ - -RUNTEST = runtest -RUNTESTFLAGS = -FLAGS_TO_PASS = \ - "CC=$(CC)" \ - "CFLAGS=$(CFLAGS)" \ - "RUNTEST=$(RUNTEST)" \ - "RUNTESTFLAGS=$(RUNTESTFLAGS)" - -# -## The rules - -all: $(LIBS) $(PROGS) - - -$(RUN_PROG): $(LIBS) run.o $(BFD) $(INTLDEPS) - $(CC) $(CFLAGS) $(LDFLAGS) -o $(RUN_PROG) run.o $(SIM_LIB) $(BFD) $(INTLLIBS) $(LIBIBERTY) - -$(SIM_LIB): case.o interp.o - rm -f $(SIM_LIB) - $(AR) $(AR_FLAGS) $(SIM_LIB) case.o interp.o - $(RANLIB) $(SIM_LIB) - -case.c: gencode - ./gencode -c >case.c ; \ - if [ -x /usr/latest/bin/indent ] ; then \ - /usr/latest/bin/indent case.c ; \ - fi - -optable:gencode - ./gencode >optable - ./gencode -a >$(srcdir)/../../opcodes/w65-opc.h - -gencode:gencode.c - $(CC_FOR_BUILD) -o gencode $< - -run.o:run.c config.h -interp.o:interp.c config.h - - -###################################################################### - -mostlyclean: - -rm -f *.o *~ \#* core binutils.?? binutils.??? case.c - -clean: mostlyclean - -rm -f $(PROGS) *.o *.a - -distclean: - -rm -f Makefile config.status sysdep.h *.o *~ \#* core y.* \ - binutils.?? binutils.??s binutils.aux binutils.log \ - binutils.toc gencode run config.log - -rm -f $(PROGS) config.h stamp-h - -maintainer-clean realclean: clean distclean - -rm -f $(DISTSTUFF) TAGS - -etags tags: TAGS - -TAGS: force - etags $(INCDIR)/*.h $(srcdir)/*.[hc] - -install: all installdirs - for i in $(PROGS) ; do \ - n=`echo $$i | sed -e 's/.new//' | sed '$(program_transform_name)'`; \ - $(INSTALL_PROGRAM) $$i $(bindir)/$$n; \ - done - -installdirs: - $(SHELL) $(srcdir)/../../mkinstalldirs $(bindir) - -install-info: - -clean-info: - -rm -rf *.info* - -# Making a dist: -# cvs rtag binutils-x-yy ld+utils -# cvs co -r binutils-x-yy ld+utils -# cd {HERE}; make dist [-f Makefile.in] - -dist: $(DIST_NAME).tar.z - -diststuff: $(DISTSTUFF) - -$(DIST_NAME).tar.z: - cd ../..; rm -f $(DIST_NAME); ln -s devo $(DIST_NAME) - make diststuff -f Makefile.in - cd ../ld; make diststuff -f Makefile.in - cd ../gprof; make diststuff -f Makefile.in - cd ../texinfo; mv texinfo.tex ..; rm -rf *; mv ../texinfo.tex . - # Take out texinfo from configurable dirs - mv ../configure.in tmp; \ - sed -e '/^host_tools=/s/texinfo //' <tmp >../configure.in; rm tmp - cd ..; chmod og=u `find . -print` - cd ../..; tar chf - $(DIST_NAME) | gzip >$(DIST_NAME).tar.z - rm -rf ../../$(DIST_NAME) - - -# Dummy target to force execution of dependent targets. -# -force: - -# Target to uncomment host-specific lines in this makefile. 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Generated automatically from configure.in by autoheader. */ - -/* Define if using alloca.c. */ -#undef C_ALLOCA - -/* Define to empty if the keyword does not work. */ -#undef const - -/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems. - This function is required for alloca.c support on those systems. */ -#undef CRAY_STACKSEG_END - -/* Define if you have alloca, as a function or macro. */ -#undef HAVE_ALLOCA - -/* Define if you have <alloca.h> and it should be used (not on Ultrix). */ -#undef HAVE_ALLOCA_H - -/* Define if you have a working `mmap' system call. */ -#undef HAVE_MMAP - -/* Define as __inline if that's what the C compiler calls it. */ -#undef inline - -/* Define to `long' if <sys/types.h> doesn't define. */ -#undef off_t - -/* Define if you need to in order for stat and other things to work. */ -#undef _POSIX_SOURCE - -/* Define to `unsigned' if <sys/types.h> doesn't define. */ -#undef size_t - -/* If using the C implementation of alloca, define if you know the - direction of stack growth for your system; otherwise it will be - automatically deduced at run-time. - STACK_DIRECTION > 0 => grows toward higher addresses - STACK_DIRECTION < 0 => grows toward lower addresses - STACK_DIRECTION = 0 => direction of growth unknown - */ -#undef STACK_DIRECTION - -/* Define if you have the ANSI C header files. */ -#undef STDC_HEADERS - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES - -/* Whether printf must be declared even if <stdio.h> is included. */ -#undef NEED_DECLARATION_PRINTF - -/* Define if you have the __argz_count function. */ -#undef HAVE___ARGZ_COUNT - -/* Define if you have the __argz_next function. */ -#undef HAVE___ARGZ_NEXT - -/* Define if you have the __argz_stringify function. */ -#undef HAVE___ARGZ_STRINGIFY - -/* Define if you have the dcgettext function. */ -#undef HAVE_DCGETTEXT - -/* Define if you have the getcwd function. */ -#undef HAVE_GETCWD - -/* Define if you have the getpagesize function. */ -#undef HAVE_GETPAGESIZE - -/* Define if you have the munmap function. */ -#undef HAVE_MUNMAP - -/* Define if you have the putenv function. */ -#undef HAVE_PUTENV - -/* Define if you have the setenv function. */ -#undef HAVE_SETENV - -/* Define if you have the setlocale function. */ -#undef HAVE_SETLOCALE - -/* Define if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if you have the strcasecmp function. */ -#undef HAVE_STRCASECMP - -/* Define if you have the strchr function. */ -#undef HAVE_STRCHR - -/* Define if you have the <argz.h> header file. */ -#undef HAVE_ARGZ_H - -/* Define if you have the <limits.h> header file. */ -#undef HAVE_LIMITS_H - -/* Define if you have the <locale.h> header file. */ -#undef HAVE_LOCALE_H - -/* Define if you have the <malloc.h> header file. */ -#undef HAVE_MALLOC_H - -/* Define if you have the <nl_types.h> header file. */ -#undef HAVE_NL_TYPES_H - -/* Define if you have the <stdlib.h> header file. */ -#undef HAVE_STDLIB_H - -/* Define if you have the <string.h> header file. */ -#undef HAVE_STRING_H - -/* Define if you have the <sys/param.h> header file. */ -#undef HAVE_SYS_PARAM_H - -/* Define if you have the <time.h> header file. */ -#undef HAVE_TIME_H - -/* Define if you have the <unistd.h> header file. */ -#undef HAVE_UNISTD_H - -/* Define if you have the <values.h> header file. */ -#undef HAVE_VALUES_H diff --git a/sim/w65/configure b/sim/w65/configure deleted file mode 100755 index 8b2b9ec..0000000 --- a/sim/w65/configure +++ /dev/null @@ -1,3354 +0,0 @@ -#! /bin/sh - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -sim_inline="-DDEFAULT_INLINE=0" - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -# This file is derived from `gettext.m4'. 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Not all systems have dirname. - ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'` - if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then - # The file is in a subdirectory. - test ! -d "$ac_dir" && mkdir "$ac_dir" - fi - rm -f $ac_file - mv conftest.h $ac_file - fi -fi; done - -EOF -cat >> $CONFIG_STATUS <<EOF - -EOF -cat >> $CONFIG_STATUS <<\EOF -case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac -exit 0 -EOF -chmod +x $CONFIG_STATUS -rm -fr confdefs* $ac_clean_files -test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1 - diff --git a/sim/w65/configure.in b/sim/w65/configure.in deleted file mode 100644 index e2da7db..0000000 --- a/sim/w65/configure.in +++ /dev/null @@ -1,48 +0,0 @@ -dnl Process this file with autoconf to produce a configure script. -sinclude(../common/aclocal.m4) -AC_PREREQ(2.5)dnl -AC_INIT(Makefile.in) - -AC_CONFIG_HEADER(config.h:config.in) - -AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..) -AC_CANONICAL_SYSTEM -AC_ARG_PROGRAM -AC_PROG_CC -AC_PROG_INSTALL - -. ${srcdir}/../../bfd/configure.host - -AC_SUBST(CFLAGS) -AC_SUBST(HDEFINES) -AR=${AR-ar} -AC_SUBST(AR) -AC_PROG_RANLIB - -# Put a plausible default for CC_FOR_BUILD in Makefile. -if test "x$cross_compiling" = "xno"; then - CC_FOR_BUILD='$(CC)' -else - CC_FOR_BUILD=gcc -fi -AC_SUBST(CC_FOR_BUILD) - -dnl We don't use gettext, but bfd does. So we do the appropriate checks -dnl to see if there are intl libraries we should link against. -ALL_LINGUAS= -CY_GNU_GETTEXT - -AC_CHECK_HEADERS(stdlib.h time.h unistd.h) - -AC_MSG_CHECKING([whether printf must be declared]) -AC_CACHE_VAL(sim_cv_decl_needed_printf, -[AC_TRY_COMPILE([#include <stdio.h>], -[int (*pfn) = (int (*)) printf], -sim_cv_decl_needed_printf=no, sim_cv_decl_needed_printf=yes)]) -AC_MSG_RESULT($sim_cv_decl_needed_printf) -if test $sim_cv_decl_needed_printf = yes; then - AC_DEFINE(NEED_DECLARATION_PRINTF) -fi - -AC_OUTPUT(Makefile, -[case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac]) diff --git a/sim/w65/gencode.c b/sim/w65/gencode.c deleted file mode 100644 index cbbeb5b..0000000 --- a/sim/w65/gencode.c +++ /dev/null @@ -1,991 +0,0 @@ -/* Program to write out opcode tables for the W65816 and friends - Copyright (C) 1995 Free Software Foundation, Inc. - Written by Steve Chamberlain sac@cygnus.com - - -GDB is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GDB is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - - -#include <stdio.h> - - -struct opinfo - { - int code; - char *opcode; - char *mode; - int clocks; - int cpu; - struct ainfo *ai; - struct oinfo *oi; - }; - -#define W16_ONLY 1 -#define C02_ONLY 2 - -struct ainfo - { - char *name; - char *enumname; - char *disasmstring; - char *sizer; - char *reloc0; - char *howlval; - - /* If addr val could be reg addr - used for disasssmbly of - args into reg names - you want lda <0x10 to turn into lda <r0 - but you don't want lda #0x10 to do the same. */ - char regflag; - }; - -#define GET_M 1 -#define SPECIAL_CASE 2 -#define COP_GET 3 -#define G2_GET 4 -#define BRANCH 5 -#define GET_X 6 -#define STANDARD_PC_GET 7 -#define PUSH_16 8 -#define PUSH_8 9 -#define PUSH_X 10 -#define PUSH_M 11 -#define POP_16 12 -#define POP_8 13 -#define POP_X 14 -#define POP_M 15 -#define STORE_M 16 -#define STORE_X 17 -struct oinfo - { - char *name; - int howsrc; - char *howto; - }; -struct oinfo olist[] = -{ - {"adc", GET_M, "{ int old_acc = GET_A; int old_src =src; src = old_src + old_acc + GET_CBIT; SET_NBIT_M(src); SET_VBIT_M(old_src, old_acc, src); SET_CBIT_M(src); SET_ZBIT_M(src); SET_A(src);}"}, - {"and", GET_M, "src = GET_A & src; SET_NBIT_M(src); SET_ZBIT_M(src);SET_A(src);"}, - {"asl", G2_GET, " src <<=1; SET_CBIT_M(src); SET_ZBIT_M(src);SET_NBIT_M(src);"}, - {"bcc", BRANCH, "GET_CBIT==0"}, - {"bcs", BRANCH, "GET_CBIT==1"}, - {"beq", BRANCH, "GET_ZBIT==1"}, - {"bit", GET_M, "SET_NBIT_M(src); SET_VBIT((src >> (GET_MBIT ? 6:14 ) &1)); SET_ZBIT_M (GET_A & src);"}, - {"bmi", BRANCH, "GET_NBIT==1"}, - {"bne", BRANCH, "GET_ZBIT==0"}, - {"bpl", BRANCH, "GET_NBIT==0"}, - {"bra", BRANCH, "1"}, - {"brk", SPECIAL_CASE, - "\ -{\ - if (GET_E == 1) \ - { PUSH16(GET_PC + 1); PUSH8 (GET_P | BFLAG); SET_P (GET_P | IFLAG); SET_ONLY_PC(fetch16 (0xfffe));}\ - else \ - { PUSH8 (GET_PBR_LOW); PUSH16 (GET_PC); PUSH8(GET_P); SET_P(GET_P |IFLAG); SET_PBRPC(fetch16 (0xffe6));};\ - }"}, - {"brl", BRANCH, "1"}, - {"bvc", BRANCH, "GET_VBIT==0"}, - {"bvs", BRANCH, "GET_VBIT==1"}, - {"clc", SPECIAL_CASE, "SET_CBIT(0);"}, - {"cld", SPECIAL_CASE, "SET_DBIT(0);"}, - {"cli", SPECIAL_CASE, "SET_IBIT(0);"}, - {"clv", SPECIAL_CASE, "SET_VBIT(0);"}, - {"cmp", GET_M, "src = GET_A - src; SET_ZBIT_M(src); SET_CBIT_M(~src); SET_NBIT_M(src);"}, - {"cop", COP_GET, - "\ -{\ - if (GET_E == 1) \ - { PUSH16(GET_PC + 1); PUSH8 (GET_P | BFLAG); SET_P ((GET_P | IFLAG) & ~DFLAG); SET_ONLY_PC(fetch16 (0xfff4));}\ - else \ - { PUSH8 (GET_PBR_LOW); PUSH16 (GET_PC); PUSH8(GET_P); SET_P((GET_P |IFLAG) & ~DFLAG); SET_PBRPC(fetch16 (0xffe4));};\ - }"}, - {"cpx", GET_X, "src = GET_X - src; SET_NBIT_X(src); SET_ZBIT_X(src); SET_CBIT_X(~src);"}, - {"cpy", GET_X, "src = GET_Y - src; SET_NBIT_X(src); SET_ZBIT_X(src); SET_CBIT_X(~src);"}, - {"dec", G2_GET, "src --; SET_NBIT_M(src); SET_ZBIT_M(src); "}, - {"dex", SPECIAL_CASE, "SET_X(GET_X -1); SET_NBIT_X(GET_X); SET_ZBIT_X(GET_X);"}, - {"dey", SPECIAL_CASE, "SET_Y(GET_Y -1); SET_NBIT_X(GET_Y); SET_ZBIT_X(GET_Y);"}, - {"eor", GET_M, "src = GET_A ^ src; SET_NBIT_M(src); SET_ZBIT_M(src);SET_A(src); "}, - {"inc", G2_GET, "src ++; SET_NBIT_M(src); SET_ZBIT_M(src); "}, - {"inx", SPECIAL_CASE, "SET_X(GET_X +1); SET_NBIT_X(GET_X); SET_ZBIT_X(GET_X);"}, - {"iny", SPECIAL_CASE, "SET_Y(GET_Y +1); SET_NBIT_X(GET_Y); SET_ZBIT_X(GET_Y);"}, - {"jmp", STANDARD_PC_GET, "SET_ONLY_PC(lval);"}, - {"jsr", STANDARD_PC_GET, "if (l) { PUSH8(GET_PBR_LOW);} PUSH16(GET_PC); SET_ONLY_PC(lval);\n"}, - {"lda", GET_M, "SET_A(src); SET_NBIT_M(GET_A); SET_ZBIT_M(GET_A);"}, - {"ldx", GET_X, "SET_X(src);SET_NBIT_X(GET_X); SET_ZBIT_X(GET_X);"}, - {"ldy", GET_X, "SET_Y(src);SET_NBIT_X(GET_Y); SET_ZBIT_X(GET_Y);"}, - {"lsr", G2_GET, - "SET_CBIT(src & 1); \ - SET_NBIT(0); \ - src = src >> 1; \ - SET_ZBIT_M(src);"}, - {"mvn", SPECIAL_CASE, - "{ int dst_bank; int src_bank; dst_bank = fetch8 ( GET_PC)<<16; INC_PC(1); src_bank = fetch8 (GET_PC)<<16; INC_PC(1);\ - do { store8 ( dst_bank + GET_X, fetch8 (src_bank + GET_Y)); SET_X(GET_X+1); SET_Y(GET_Y+1); SET_A((GET_A-1) & 0xffff); } while (GET_A != 0xffff);}"}, - {"mvp", SPECIAL_CASE, - "{ int dst_bank; int src_bank; dst_bank = fetch8 ( GET_PBRPC)<<16; INC_PC(1); src_bank = fetch8 (GET_PBRPC)<<16; INC_PC(1);\ - do { store8 ( dst_bank + GET_X, fetch8 (src_bank + GET_Y)); SET_X(GET_X-1); SET_Y(GET_Y-1); SET_A((GET_A-1) & 0xffff); } while (GET_A != 0xffff);}"}, - - {"nop", SPECIAL_CASE, ""}, -{"ora", GET_M, "SET_A(GET_A | src); SET_NBIT_M(GET_A); SET_ZBIT_M(GET_A);"}, - {"pea", PUSH_16, "src = fetch16(GET_PBRPC); INC_PC(2);"}, - {"pei", PUSH_16, "src = fetch16(fetch8(GET_PBRPC) + GET_D); INC_PC(1);"}, - {"per", PUSH_16, "src = fetch16(GET_PBRPC) + GET_PC+2; INC_PC(2);"}, - {"pha", PUSH_M, "src = GET_A;"}, - {"phb", PUSH_8, "src = GET_DBR_LOW;"}, - {"phd", PUSH_16, "src = GET_DPR;"}, - {"phk", PUSH_8, "src = GET_PBR_LOW;"}, - {"php", PUSH_8, "src = GET_P;"}, - {"phx", PUSH_X, "src = GET_X;"}, - {"phy", PUSH_X, "src = GET_Y;"}, - {"pla", POP_M, "SET_A( src); SET_NBIT_M(GET_A);SET_ZBIT_M(GET_A);"}, - {"plb", POP_8, "SET_DBR_LOW(src);SET_NBIT_8(src); SET_ZBIT_8(src);"}, - {"pld", POP_16, "SET_DPR(src);SET_NBIT_16(src); SET_ZBIT_16(src);"}, - {"plp", POP_8, "SET_P(src); RETHINK;"}, - {"plx", POP_X, "SET_X(src);SET_NBIT_X(src);SET_ZBIT_X(src);"}, - {"ply", POP_X, "SET_Y(src);SET_NBIT_X(src);SET_ZBIT_X(src);"}, - {"rep", COP_GET, "SET_P(GET_P & ~src); RETHINK;"}, - {"rol", G2_GET, "src = (src << 1) | GET_CBIT; SET_CBIT((src >> (GET_MBIT ? 7 : 15)) &1); SET_ZBIT_M(src);"}, - {"ror", G2_GET, "{ int t = src; src = (src>>1) | (GET_CBIT<<((GET_MBIT ? 8:16)-1));SET_NBIT_M(src);SET_ZBIT_M(src); SET_CBIT(t&1);}"}, - {"rti", SPECIAL_CASE, "{ int t; POP16(t); SET_ONLY_PC(t); if (GET_E==0) { POP8(t); SET_PBR(t);} POP8(t);SET_P(t);}"}, - {"rtl", SPECIAL_CASE, "{ int t; POP24(t); SET_PBRPC(t);}"}, - {"rts", SPECIAL_CASE, "{ int t; POP16(t); SET_ONLY_PC(t);}"}, - {"sbc", GET_M, - "{ int old_acc = GET_A & AMASK; int old_src = src & AMASK; src = old_acc - old_src - !GET_CBIT; SET_A(src);\ - SET_CBIT(!(src>>(GET_MBIT?8:16) &1)); SET_VBIT_M(old_src,old_acc, src); SET_ZBIT_M(src); SET_NBIT_M(src);}"}, - {"sec", SPECIAL_CASE, "SET_CBIT(1);"}, - {"sed", SPECIAL_CASE, "SET_DBIT(1);"}, - {"sei", SPECIAL_CASE, "SET_IBIT(1);"}, - {"sep", COP_GET, "SET_P(GET_P | src);RETHINK;"}, - {"sta", STORE_M, "src = GET_A;"}, - {"stp", SPECIAL_CASE, "abort();"}, - {"stx", STORE_X, "src = GET_X;"}, - {"sty", STORE_X, "src = GET_Y;"}, - {"stz", STORE_M, "src = 0;"}, -{"tax", SPECIAL_CASE, "SET_X(GET_A); SET_NBIT_X(GET_A);SET_ZBIT_X(GET_A);"}, -{"tay", SPECIAL_CASE, "SET_Y(GET_A); SET_NBIT_X(GET_A);SET_ZBIT_X(GET_A);"}, - {"tcd", SPECIAL_CASE, "SET_DPR(GET_A); SET_NBIT_X(GET_A); SET_ZBIT_X(GET_A);"}, - {"tcs", SPECIAL_CASE, "SET_S(GET_A);"}, - {"tdc", SPECIAL_CASE, "SET_A(GET_DPR); SET_NBIT_M(GET_A); SET_ZBIT_M(GET_A);"}, - {"trb", G2_GET, "SET_ZBIT_M(src & GET_A); src = src & ~GET_A; "}, - {"tsb", G2_GET, "SET_ZBIT_M(src & GET_A); src = src | GET_A;"}, -{"tsc", SPECIAL_CASE, "SET_A(GET_S); SET_NBIT_16(GET_A); SET_ZBIT_16(GET_A);"}, -{"tsx", SPECIAL_CASE, "SET_X(GET_S); SET_NBIT_X(GET_X); SET_ZBIT_X(GET_X);"}, -{"txa", SPECIAL_CASE, "SET_A(GET_X); SET_NBIT_M(GET_A); SET_ZBIT_M(GET_A);"}, - {"txs", SPECIAL_CASE, "SET_S(GET_X);"}, -{"txy", SPECIAL_CASE, "SET_Y(GET_X); SET_NBIT_X(GET_Y); SET_ZBIT_X(GET_Y);"}, -{"tya", SPECIAL_CASE, "SET_A(GET_Y); SET_NBIT_M(GET_A); SET_ZBIT_M(GET_A);"}, -{"tyx", SPECIAL_CASE, "SET_X(GET_Y); SET_NBIT_X(GET_X); SET_ZBIT_X(GET_X);"}, - {"wai", SPECIAL_CASE, "wai();INC_PC(-1);"}, - {"wdm", SPECIAL_CASE, "SET_A(wdm(GET_A, GET_X));"}, - {"xba", SPECIAL_CASE, - "if (GET_XBIT==0) { SET_A(((GET_A >> 8) & 0xff) | ((GET_A & 0xff)<<8));} else { int t = GET_A; SET_A(GET_B); SET_B(t);}; SET_NBIT_8(GET_A); SET_ZBIT_8(GET_A);"}, - {"xce", SPECIAL_CASE, "{ int t = GET_E; SET_E(GET_CBIT); SET_CBIT(GET_E);if (GET_E) { SET_MBIT(1); SET_XBIT(1);}}; goto top;"}, - 0}; - -struct ainfo alist[] = -{ - {"#a", "IMMTOA", "#$0", "M==0 ? 2:1", "M==0 ? %sR_W65_ABS16 : %sR_W65_ABS8", "lval = GET_PBRPC; INC_PC(GET_MBIT ? 1:2); ", 0}, - {"#c", "IMMCOP", "#$0", "1", "%sR_W65_ABS8", "lval = GET_PBRPC; INC_PC(1); ", 0}, - {"#i", "IMMTOI", "#$0", "X==0 ? 2:1", "X==0 ? %sR_W65_ABS16 : %sR_W65_ABS8", "lval = GET_PBRPC; INC_PC(GET_XBIT ? 1:2);", 0}, - {"A", "ACC", "a", "0", 0, "*FAIL**", 0}, - {"r", "PC_REL", "$0", "1", "%sR_W65_PCR8", "lval = GET_PBR_HIGH + (0xffff &(fetch8sext(GET_PBRPC) + GET_PC + 1)); INC_PC(1);", 0}, - {"rl", "PC_REL_LONG", "$0", "2", "%sR_W65_PCR16", "lval = GET_PBR_HIGH + (0xffff & (fetch16 (GET_PBRPC) + GET_PC + 2)); INC_PC(2);", 0}, - {"i", "IMPLIED", "", "0", "", 0}, - {"s", "STACK", "", "0", "", 0}, - {"d", "DIR", "<$0", "1", "%sR_W65_ABS8", "lval = fetch8(GET_PBRPC) + GET_D; INC_PC(1);", 1}, - {"d,x", "DIR_IDX_X", "<$0,x", "1", "%sR_W65_ABS8", "lval = fetch8(GET_PBRPC) + GET_X+ GET_D; INC_PC(1);", 1}, - {"d,y", "DIR_IDX_Y", "<$0,y", "1", "%sR_W65_ABS8", "lval = fetch8(GET_PBRPC) + GET_Y + GET_D; INC_PC(1);", 1}, - {"(d)", "DIR_IND", "(<$0)", "1", "%sR_W65_ABS8", "lval = GET_DBR_HIGH + (0xffff & fetch16(fetch8(GET_PBRPC) + GET_D));INC_PC(1);",1}, - {"(d,x)", "DIR_IDX_IND_X", "(<$0,x)", "1", "%sR_W65_ABS8", "lval = GET_DBR_HIGH + (0xffff & (fetch8 (GET_PBRPC) + GET_D + GET_X)) ; INC_PC(1);",1}, - {"(d),y", "DIR_IND_IDX_Y", "(<$0),y", "1", "%sR_W65_ABS8", "lval = fetch16(fetch8(GET_PBRPC) + GET_D) + GET_Y + GET_DBR_HIGH;INC_PC(1);",1}, - {"[d]", "DIR_IND_LONG", "[$0]", "1", "%sR_W65_ABS8", "lval = fetch24(GET_D + fetch8(GET_PBRPC));INC_PC(1);",1}, - - {"[d],y", "DIR_IND_IDX_Y_LONG", "[$0],y", "1", "%sR_W65_ABS8", "lval = fetch24(fetch8(GET_PBRPC) + GET_D) + GET_Y;INC_PC(1);",1}, - - {"a", "ABS", "!$0", "2", "%sR_W65_ABS16", "lval = fetch16(GET_PBRPC) + GET_DBR_HIGH; INC_PC(2) ; ",1}, - {"a,x", "ABS_IDX_X", "!$0,x", "2", "%sR_W65_ABS16", "lval = fetch16(GET_PBRPC) + GET_DBR_HIGH + GET_X; INC_PC(2); ",1}, - {"a,y", "ABS_IDX_Y", "!$0,y", "2", "%sR_W65_ABS16", "lval = fetch16(GET_PBRPC) + GET_DBR_HIGH + GET_Y; INC_PC(2); ", 1}, - {"al", "ABS_LONG", ">$0", "3", "%sR_W65_ABS24", "lval = fetch24(GET_PBRPC); INC_PC(3);\nl=1;\n", 1}, - {"[a]", "ABS_IND_LONG", "[>$0]", "2", "%sR_W65_ABS16", "lval = fetch24(fetch16(GET_PBRPC)); INC_PC(2);", 1}, - {"al,x", "ABS_LONG_IDX_X", ">$0,x", "3", "%sR_W65_ABS24", "lval = fetch24(GET_PBRPC) + GET_X; INC_PC(3);", 1}, - {"d,s", "STACK_REL", "$0,s", "1", "%sR_W65_ABS8", "lval = fetch8(GET_PBRPC) + GET_S; INC_PC(1);", 0}, - {"(d,s),y", "STACK_REL_INDX_IDX", "($0,s),y", "1", "%sR_W65_ABS8", "lval = fetch16(fetch8(GET_PBRPC) + GET_S) + GET_DBR_HIGH + GET_Y;INC_PC(1);",0}, - {"(a)", "ABS_IND", "($0)", "2", "%sR_W65_ABS16", "lval = fetch16(GET_PBRPC) + GET_DBR_HIGH; INC_PC(2);", 1}, - {"(a,x)", "ABS_IND_IDX", "($0,x)", "2", "%sR_W65_ABS16", - "lval = fetch16((0xffff & (fetch16(GET_PBRPC) + GET_X )) + GET_PBR_HIGH) + GET_PBR_HIGH;INC_PC(2);",1}, - {"xyz", "BLOCK_MOVE", "", "2", "", 0}, - 0}; - - -struct opinfo optable[257] = -{ - {0x00, "brk", "s"}, - {0x01, "ora", "(d,x)"}, - {0x02, "cop", "#c"}, - {0x03, "ora", "d,s"}, - {0x04, "tsb", "d"}, - {0x05, "ora", "d"}, - {0x06, "asl", "d"}, - {0x07, "ora", "[d]"}, - {0x08, "php", "s"}, - {0x09, "ora", "#a"}, - {0x0a, "asl", "A"}, - {0x0b, "phd", "s"}, - {0x0c, "tsb", "a"}, - {0x0d, "ora", "a"}, - {0x0e, "asl", "a"}, - {0x0f, "ora", "al"}, - {0x10, "bpl", "r"}, - {0x11, "ora", "(d),y"}, - {0x12, "ora", "(d)"}, - {0x13, "ora", "(d,s),y"}, - {0x14, "trb", "d"}, - {0x15, "ora", "d,x"}, - {0x16, "asl", "d,x"}, - {0x17, "ora", "[d],y"}, - {0x18, "clc", "i"}, - {0x19, "ora", "a,y"}, - {0x1a, "inc", "A"}, - {0x1b, "tcs", "i"}, - {0x1c, "trb", "a"}, - {0x1d, "ora", "a,x"}, - {0x1e, "asl", "a,x"}, - {0x1f, "ora", "al,x"}, - {0x20, "jsr", "a"}, - {0x21, "and", "(d,x)"}, - {0x22, "jsr", "al"}, - {0x23, "and", "d,s"}, - {0x24, "bit", "(d)"}, - {0x25, "and", "d"}, - {0x26, "rol", "d"}, - {0x27, "and", "[d]"}, - {0x28, "plp", "s"}, - {0x29, "and", "#a"}, - {0x2a, "rol", "A"}, - {0x2b, "pld", "s"}, - {0x2c, "bit", "a"}, - {0x2d, "and", "a"}, - {0x2e, "rol", "a"}, - {0x2f, "and", "al"}, - {0x30, "bmi", "r"}, - {0x31, "and", "(d),y"}, - {0x32, "and", "(d)"}, - {0x33, "and", "(d,s),y"}, - {0x34, "bit", "(d,x)"}, - {0x35, "and", "d,x"}, - {0x36, "rol", "d,x"}, - {0x37, "and", "[d],y"}, - {0x38, "sec", "i"}, - {0x39, "and", "a,y"}, - {0x3a, "dec", "A"}, - {0x3b, "tsc", "i"}, - {0x3c, "bit", "a,x"}, - {0x3d, "and", "a,x"}, - {0x3e, "rol", "a,x"}, - {0x3f, "and", "al,x"}, - {0x40, "rti", "s"}, - {0x41, "eor", "(d,x)"}, - {0x42, "wdm", "i"}, - {0x43, "eor", "d,s"}, - {0x44, "mvp", "xyz"}, - {0x45, "eor", "d"}, - {0x46, "lsr", "d"}, - {0x47, "eor", "[d]"}, - {0x48, "pha", "s"}, - {0x49, "eor", "#a"}, - {0x4a, "lsr", "A"}, - {0x4b, "phk", "s"}, - {0x4c, "jmp", "a"}, - {0x4d, "eor", "a"}, - {0x4e, "lsr", "a"}, - {0x4f, "eor", "al"}, - {0x50, "bvc", "r"}, - {0x51, "eor", "(d),y"}, - {0x52, "eor", "(d)"}, - {0x53, "eor", "(d,s),y"}, - {0x54, "mvn", "xyz"}, - {0x55, "eor", "d,x"}, - {0x56, "lsr", "d,x"}, - {0x57, "eor", "[d],y"}, - {0x58, "cli", "i"}, - {0x59, "eor", "a,y"}, - {0x5a, "phy", "s"}, - {0x5b, "tcd", "i"}, - {0x5c, "jmp", "al"}, - {0x5d, "eor", "a,x"}, - {0x5e, "lsr", "a,x"}, - {0x5f, "eor", "al,x"}, - {0x60, "rts", "s"}, - {0x61, "adc", "(d,x)"}, - {0x62, "per", "rl"}, - {0x63, "adc", "d,s"}, - {0x64, "stz", "d"}, - {0x65, "adc", "d"}, - {0x66, "ror", "d"}, - {0x67, "adc", "[d]"}, - {0x68, "pla", "s"}, - {0x69, "adc", "#a"}, - {0x6a, "ror", "A"}, - {0x6b, "rtl", "s"}, - {0x6c, "jmp", "(a)"}, - {0x6d, "adc", "a"}, - {0x6e, "ror", "a"}, - {0x6f, "adc", "al"}, - {0x70, "bvs", "r"}, - {0x71, "adc", "(d),y"}, - {0x72, "adc", "(d)"}, - {0x73, "adc", "(d,s),y"}, - {0x74, "stz", "d,x"}, - {0x75, "adc", "d,x"}, - {0x76, "ror", "d,x"}, - {0x77, "adc", "[d],y"}, - {0x78, "sei", "i"}, - {0x79, "adc", "a,y"}, - {0x7a, "ply", "s"}, - {0x7b, "tdc", "i"}, - {0x7c, "jmp", "(a,x)"}, - {0x7d, "adc", "a,x"}, - {0x7e, "ror", "a,x"}, - {0x7f, "adc", "al,x"}, - {0x80, "bra", "r"}, - {0x81, "sta", "(d,x)"}, - {0x82, "brl", "rl"}, - {0x83, "sta", "d,s"}, - {0x84, "sty", "d"}, - {0x85, "sta", "d"}, - {0x86, "stx", "d"}, - {0x87, "sta", "[d]"}, - {0x88, "dey", "i"}, - {0x89, "bit", "#a"}, - {0x8a, "txa", "i"}, - {0x8b, "phb", "s"}, - {0x8c, "sty", "a"}, - {0x8d, "sta", "a"}, - {0x8e, "stx", "a"}, - {0x8f, "sta", "al"}, - {0x90, "bcc", "r"}, - {0x91, "sta", "(d),y"}, - {0x92, "sta", "(d)"}, - {0x93, "sta", "(d,s),y"}, - {0x94, "sty", "d,x"}, - {0x95, "sta", "d,x"}, - {0x96, "stx", "d,x"}, - {0x97, "sta", "[d],y"}, - {0x98, "tya", "i"}, - {0x99, "sta", "a,y"}, - {0x9a, "txs", "i"}, - {0x9b, "txy", "i"}, - {0x9c, "stz", "a"}, - {0x9d, "sta", "a,x"}, - {0x9e, "stz", "a,x"}, - {0x9f, "sta", "al,x"}, - {0xa0, "ldy", "#i"}, - {0xa1, "lda", "(d,x)"}, - {0xa2, "ldx", "#i"}, - {0xa3, "lda", "d,s"}, - {0xa4, "ldy", "d"}, - {0xa5, "lda", "d"}, - {0xa6, "ldx", "d"}, - {0xa7, "lda", "[d]"}, - {0xa8, "tay", "i"}, - {0xa9, "lda", "#a"}, - {0xaa, "tax", "i"}, - {0xab, "plb", "s"}, - {0xac, "ldy", "a"}, - {0xad, "lda", "a"}, - {0xae, "ldx", "a"}, - {0xaf, "lda", "al"}, - {0xb0, "bcs", "r"}, - {0xb1, "lda", "(d),y"}, - {0xb2, "lda", "(d)"}, - {0xb3, "lda", "(d,s),y"}, - {0xb4, "ldy", "d,x"}, - {0xb5, "lda", "d,x"}, - {0xb6, "ldx", "d,y"}, - {0xb7, "lda", "[d],y"}, - {0xb8, "clv", "i"}, - {0xb9, "lda", "a,y"}, - {0xba, "tsx", "i"}, - {0xbb, "tyx", "i"}, - {0xbc, "ldy", "a,x"}, - {0xbd, "lda", "a,x"}, - {0xbe, "ldx", "a,y"}, - {0xbf, "lda", "al,x"}, - {0xc0, "cpy", "#i"}, - {0xc1, "cmp", "(d,x)"}, - {0xc2, "rep", "#c"}, - {0xc3, "cmp", "d,s"}, - {0xc4, "cpy", "d"}, - {0xc5, "cmp", "d"}, - {0xc6, "dec", "d"}, - {0xc7, "cmp", "[d]"}, - {0xc8, "iny", "i"}, - {0xc9, "cmp", "#a"}, - {0xca, "dex", "i"}, - {0xcb, "wai", "i"}, - {0xcc, "cpy", "a"}, - {0xcd, "cmp", "a"}, - {0xce, "dec", "a"}, - {0xcf, "cmp", "al"}, - {0xd0, "bne", "r"}, - {0xd1, "cmp", "(d),y"}, - {0xd2, "cmp", "(d)"}, - {0xd3, "cmp", "(d,s),y"}, - {0xd4, "pei", "d"}, - {0xd5, "cmp", "d,x"}, - {0xd6, "dec", "d,x"}, - {0xd7, "cmp", "[d],y"}, - {0xd8, "cld", "i"}, - {0xd9, "cmp", "a,y"}, - {0xda, "phx", "s"}, - {0xdb, "stp", "i"}, - {0xdc, "jmp", "[a]"}, - {0xdd, "cmp", "a,x"}, - {0xde, "dec", "a,x"}, - {0xdf, "cmp", "al,x"}, - {0xe0, "cpx", "#i"}, - {0xe1, "sbc", "(d,x)"}, - {0xe2, "sep", "#c"}, - {0xe3, "sbc", "d,s"}, - {0xe4, "cpx", "d"}, - {0xe5, "sbc", "d"}, - {0xe6, "inc", "d"}, - {0xe7, "sbc", "[d]"}, - {0xe8, "inx", "i"}, - {0xe9, "sbc", "#a"}, - {0xea, "nop", "i"}, - {0xeb, "xba", "i"}, - {0xec, "cpx", "a"}, - {0xed, "sbc", "a"}, - {0xee, "inc", "a"}, - {0xef, "sbc", "al"}, - {0xf0, "beq", "r"}, - {0xf1, "sbc", "(d),y"}, - {0xf2, "sbc", "(d)"}, - {0xf3, "sbc", "(d,s),y"}, - {0xf4, "pea", "a"}, - {0xf5, "sbc", "d,x"}, - {0xf6, "inc", "d,x"}, - {0xf7, "sbc", "[d],y"}, - {0xf8, "sed", "i"}, - {0xf9, "sbc", "a,y"}, - {0xfa, "plx", "s"}, - {0xfb, "xce", "i"}, - {0xfc, "jsr", "(a,x)"}, - {0xfd, "sbc", "a,x"}, - {0xfe, "inc", "a,x"}, - {0xff, "sbc", "al,x"}, - 0}; - - -int pfunc(a,b) -struct opinfo *a; -struct opinfo *b; -{ -return strcmp(a->mode, b->mode); - -} -static void -dump_table () -{ - int x; - int y; - printf (" |"); - for (x = 0; x < 16; x++) - { - printf (" %x |", x); - } - printf ("\n"); - printf (" |"); - for (x = 0; x < 16; x++) - { - printf ("-------|"); - } - printf ("\n"); - - for (y = 0; y < 16; y++) - { - printf ("%x |", y); - for (x = 0; x < 16; x++) - { - struct opinfo *p = &optable[y * 16 + x]; - if (p->opcode) - { - printf ("%-7s", p->opcode); - } - else - { - printf ("*******"); - } - printf ("|"); - } - printf ("\n"); - printf (" |"); - - for (x = 0; x < 16; x++) - { - struct opinfo *p = &optable[y * 16 + x]; - if (p->mode) - { - printf ("%-7s", p->mode); - } - else - { - printf ("*******"); - } - printf ("|"); - } - printf ("\n"); - printf (" |"); - for (x = 0; x < 16; x++) - { - printf ("-------|"); - } - - - printf ("\n"); - } -} - -dt () -{ -#if 0 - int i; - for (i = 0; i < 256; i++) - { - struct opinfo *p = &optable[i]; - printf ("/* %02x */ ", i); - if (p->opcode) - printf ("{\"%s\",\"%s\",%d,%d},", p->opcode->name, p->addr->name); - - printf ("\n"); - } -#endif - -} -static -void -init_table () -{ - int i; - for (i = 0; i < 256; i++) - { - struct opinfo *p = optable + i; - struct ainfo *a; - struct oinfo *o; - for (a = alist; a->name; a++) - { - if (strcmp (a->name, p->mode) == 0) - { - p->ai = a; - goto done; - } - } - printf ("bad %x\n", i); - done:; - for (o = olist; o->name; o++) - { - if (strcmp (o->name, p->opcode) == 0) - { - p->oi = o; - goto doneo; - } - } - printf ("bad %x\n", i); - doneo:; - - } -} - -/* Dump the opcodes sorted by name */ -static -void -assembler_table (as) -{ - int i; - struct oinfo *o; - struct ainfo *a; - int n = 0; - /* Step through the sorted list of opnames */ - printf (" /* WDC 65816 Assembler opcode table */\n"); - printf (" /* (generated by the program sim/w65/gencode -a) */\n"); - - for (a = alist; a->name; a++) - { - printf ("#define ADDR_%-20s%d\t /* %-7s */\n", a->enumname, ++n, a->name); - } - - printf ("struct opinfo {\n\tint val;\n\tint code;\n\tchar *name;\n\tint amode;\n};\n"); - - printf ("struct opinfo optable[257]={\n"); - if (as) - { - i = 1; - for (o = olist; o->name; o++) - { - printf ("#define O_%s %d\n", o->name, i++); - } - - qsort (optable, 256, sizeof (struct opinfo), pfunc); - - printf ("#ifdef DEFINE_TABLE\n"); - for (o = olist; o->name; o++) - { - - for (i = 0; i < 256; i++) - { - struct opinfo *p = optable + i; - - if (p->oi == o) - { - /* This opcode is of the right name */ - printf ("\t{0x%02X,\tO_%s,\t\"%s\",\tADDR_%s},\n", p->code, p->oi->name, p->oi->name, p->ai->enumname); - } - } - } - } - else - { - for (i = 0; i < 256; i++) - { - struct opinfo *p = optable + i; - printf ("\t{0x%02X,\t\"%s\",\tADDR_%s},\n", i, p->oi->name, p->ai->enumname); - } - } - - printf ("0};\n"); - printf ("#endif\n"); - - - /* Generate the operand disassembly case list */ - - printf ("#define DISASM()\\\n"); - { - struct ainfo *a; - for (a = alist; a->name; a++) - { - printf (" case ADDR_%s:\\\n\t", a->enumname); - if (strcmp (a->enumname, "BLOCK_MOVE") == 0) - { - printf ("args[0] = (asR_W65_ABS16 >>8) &0xff;\\\n"); - printf ("\targs[1] = ( asR_W65_ABS16 & 0xff);\\\n"); - printf ("\tprint_operand (0,\"\t$0,$1\",args);\\\n"); - } - else if (a->reloc0 == 0) - { - printf ("print_operand (0, \"\t%s\", 0);\\\n", a->disasmstring ); - } - else if (strlen (a->reloc0)) - { - printf ("args[0] = "); - printf (a->reloc0, "as","as"); - printf (";\\\n"); - printf ("\tprint_operand (%d, \"\t%s\", args);\\\n", - a->regflag, - a->disasmstring); - } - - printf ("\tsize += %s;\\\n\tbreak;\\\n", a->sizer); - } - } - - printf ("\n"); - - /* Generate the operand size and type case list */ - - printf ("#define GETINFO(size,type,pcrel)\\\n"); - { - struct ainfo *a; - for (a = alist; a->name; a++) - { - printf ("\tcase ADDR_%s: ", a->enumname); - printf ("size = %s;type=", a->sizer); - if (a->reloc0 && strlen (a->reloc0)) - { - printf (a->reloc0, "", ""); - } - else - printf ("-1"); - printf (";pcrel=%d;", a->name[0] == 'P'); - printf ("break;\\\n"); - } - } - printf ("\n"); -} - - -/* Write out examples of each opcode */ -static -void -test_table () -{ - struct opinfo *o; - for (o = optable; o->opcode; o++) - { - printf ("\t%s\t", o->opcode); - printf (o->ai->disasmstring, 0x6543210, 0x6543210); - printf ("\n"); - } - -} - -static void -op_table () -{ - struct opinfo *o; - int i = 0; - /* Write four optables, M=0,1 X=0,1 */ - - for (o = optable; o->opcode; o++) - { - printf ("{0x%02x, \"%s\", \"%s\"\t},\n", - i++, - o->opcode, - o->mode); - } -} - -int worked_out_lval; -static void -genfetch (amode, size) - struct ainfo *amode; - int size; -{ - if (amode->howlval) - { - if (strcmp (amode->name, "A") == 0) - { - /* Can't get the lval for the accumulator */ - printf ("src = GET_A;\n"); - } - else - { - printf ("%s\n", amode->howlval); -worked_out_lval = 1; - if (size == 0) - { - printf ("src = fetch16 (lval);\n"); - } - else - { - printf ("src = fetch8 (lval);\n"); - } - } - } - -} - -static void -genstore (amode, size) - struct ainfo *amode; - int size; -{ - if (amode->howlval) - { - if (strcmp (amode->name, "A") == 0) - { - /* Can't get the lval for the accumulator */ - printf ("SET_A (src);\n"); - } - else - { - if (!worked_out_lval) - printf ("%s\n", amode->howlval); - if (size == 0) - { - printf ("store16(lval, src);\n"); - } - else - { - printf ("store8(lval, src);\n"); - } - } - } -} -/* Generate the code to simulate the instructions */ -static void -code_table () -{ - struct opinfo *o; - int x, m; - printf("#include \"interp.h\"\n"); - - for (x = 0; x < 2; x++) { - for (m = 0; m < 2; m++) { - printf("ifunc_X%d_M%d() {\n",x,m); - printf("#undef GET_MBIT\n"); - printf("#undef GET_XBIT\n"); - printf("#define GET_XBIT %d\n", x); - printf("#define GET_MBIT %d\n", m); - printf("STARTFUNC();\n"); - printf("do { register opcode = fetch8(GET_PBRPC); insts++; INC_PC(1);\n"); - printf ("switch (opcode) {\n"); - for (o = optable; o->opcode; o++) - { - printf (" /* %s %s */\n", o->opcode, o->ai->name); - printf ("case 0x%02x:\n", o->code); - printf ("{\n"); - printf ("int l ;\n"); - printf ("register int src;\n"); - printf ("register int lval;\n"); -worked_out_lval = 0; - switch (o->oi->howsrc) - { - case POP_M: - if (m == 0) - printf ("POP16 (src);"); - else - printf ("POP8(src);"); - break; - case POP_X: - if (x == 0) - printf ("POP16 (src);"); - else - printf ("POP8 (src);"); - break; - case POP_8: - printf ("POP8 (src);"); - break; - case POP_16: - printf ("POP16 (src);"); - break; - - case STANDARD_PC_GET: - printf ("%s\n", o->ai->howlval); - break; - - case GET_M: - genfetch (o->ai, m); - break; - case G2_GET: - genfetch (o->ai, m); - break; - case GET_X: - genfetch (o->ai, x); - break; - case BRANCH: - printf ("%s", o->ai->howlval); - break; - case COP_GET: - genfetch(o->ai,1); - break; - case STORE_X: - case STORE_M: - ; - } - - switch (o->oi->howsrc) - { - case BRANCH: - printf ("if (%s) { SET_ONLY_PC(lval);} ", o->oi->howto); - break; - case SPECIAL_CASE: - case GET_M: - case GET_X: - case STORE_X: - case STANDARD_PC_GET: - case G2_GET: - case PUSH_16: - case PUSH_8: - case PUSH_M: - case PUSH_X: - case POP_16: - case POP_8: - case POP_M: - case POP_X: - case COP_GET: - case STORE_M: - printf ("%s", o->oi->howto); - break; - } - - switch (o->oi->howsrc) - { - case STORE_M: - genstore (o->ai, m); - break; - case STORE_X: - genstore (o->ai, x); - break; - case PUSH_M: - if (m == 0) - printf ("PUSH16 (src);"); - else - printf ("PUSH8(src);"); - break; - case PUSH_X: - if (x == 0) - printf ("PUSH16 (src);"); - else - printf ("PUSH8 (src);"); - break; - case PUSH_8: - printf ("PUSH8 (src);"); - break; - case PUSH_16: - printf ("PUSH16 (src);"); - break; - case G2_GET: - genstore (o->ai, x, m); - break; - } - printf ("}\n"); - - printf ("break;\n"); - } - printf ("}\n}\n"); - printf("while (!saved_state.exception);\n"); - printf("#undef GET_MBIT\n"); - printf("#undef GET_XBIT\n"); - printf("#define GET_MBIT (the_mbit)\n"); - printf("#define GET_XBIT (the_xbit)\n"); - - printf("ENDFUNC();\n"); - printf("}"); - } - } -} - -int -main (ac, av) - char **av; -{ - init_table (); - - if (ac > 1) - { - if (av[1][1] == 'a') - { - assembler_table (1); - } - if (av[1][1] == 't') - { - test_table (); - } - if (av[1][1] == 'o') - { - op_table (); - } - if (av[1][1] == 'c') - { - code_table (); - } - } - else - dump_table (); - - dt (); - - return 0; -} diff --git a/sim/w65/interp.c b/sim/w65/interp.c deleted file mode 100644 index a4b325a..0000000 --- a/sim/w65/interp.c +++ /dev/null @@ -1,388 +0,0 @@ -/* Simulator for the WDC 65816 architecture. - - Written by Steve Chamberlain of Cygnus Support. - sac@cygnus.com - - This file is part of W65 sim - - - THIS SOFTWARE IS NOT COPYRIGHTED - - Cygnus offers the following for use in the public domain. Cygnus - makes no warranty with regard to the software or it's performance - and the user accepts the software "AS IS" with all faults. - - CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO - THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - -*/ - -#include "config.h" - -#include <stdio.h> -#include <signal.h> -#ifdef HAVE_STDLIB_H -#include <stdlib.h> -#endif -#ifdef HAVE_TIME_H -#include <time.h> -#endif -#ifdef HAVE_UNISTD_H -#include <unistd.h> -#endif -#include <sys/param.h> -#include "bfd.h" -#include "gdb/callback.h" -#include "gdb/remote-sim.h" -#include "../../newlib/libc/sys/w65/sys/syscall.h" - -#include "interp.h" - -saved_state_type saved_state; - -int -get_now () -{ - return time ((long *) 0); -} -void -control_c (sig, code, scp, addr) - int sig; - int code; - char *scp; - char *addr; -{ - saved_state.exception = SIGINT; -} - -wai () -{ - saved_state.exception = SIGTRAP; -} - - - -wdm (acc, x) - int acc; - int x; - -{ -int cycles; - /* The x points to where the registers live, acc has code */ - -#define R(arg) (x + arg * 2) -unsigned R0 = R(0); -unsigned R4 = R(4); -unsigned R5 = R(5); -unsigned R6 = R(6); -unsigned R7 = R(7); -unsigned R8 = R(8); -unsigned char *memory = saved_state.memory; - int a1 = fetch16 (R (4)); - switch (a1) - { - case SYS_write: - { - int file = fetch16 (R5); - unsigned char *buf = fetch24 (R6) + memory; - int len = fetch16 (R8); - int res = write (file, buf, len); - store16 (R0, res); - break; - } - case 0: - printf ("%c", acc); - fflush (stdout); - break; - case 1: - saved_state.exception = SIGTRAP; - break; - default: - saved_state.exception = SIGILL; - break; - } -} - - -void -sim_resume (step, insignal) - int step; - int insignal; -{ - void (*prev) (); - register unsigned char *memory; - if (step) - { - saved_state.exception = SIGTRAP; - } - else - { - saved_state.exception = 0; - } - - - prev = signal (SIGINT, control_c); - do - { - int x = (saved_state.p >> 4) & 1; - int m = (saved_state.p >> 5) & 1; - if (x == 0 && m == 0) - { - ifunc_X0_M0 (); - } - else if (x == 0 && m == 1) - { - ifunc_X0_M1 (); - } - else if (x == 1 && m == 0) - { - ifunc_X1_M0 (); - } - else if (x == 1 && m == 1) - { - ifunc_X1_M1 (); - } - } - while (saved_state.exception == 0); - - signal (SIGINT, prev); -} - - - - -init_pointers () -{ - if (!saved_state.memory) - { - saved_state.memory = calloc (64 * 1024, NUMSEGS); - } -} - -int -sim_write (addr, buffer, size) - SIM_ADDR addr; - unsigned char *buffer; - int size; -{ - int i; - init_pointers (); - - for (i = 0; i < size; i++) - { - saved_state.memory[(addr + i) & MMASK] = buffer[i]; - } - return size; -} - -int -sim_read (addr, buffer, size) - SIM_ADDR addr; - unsigned char *buffer; - int size; -{ - int i; - - init_pointers (); - - for (i = 0; i < size; i++) - { - buffer[i] = saved_state.memory[(addr + i) & MMASK]; - } - return size; -} - - - -struct -{ - unsigned int *ptr; - int size; -} -rinfo[] = - -{ - &saved_state.r[0], 2, - &saved_state.r[1], 2, - &saved_state.r[2], 2, - &saved_state.r[3], 2, - &saved_state.r[4], 2, - &saved_state.r[5], 2, - &saved_state.r[6], 2, - &saved_state.r[7], 2, - &saved_state.r[8], 2, - &saved_state.r[9], 2, - &saved_state.r[10], 2, - &saved_state.r[11], 2, - &saved_state.r[12], 2, - &saved_state.r[13], 2, - &saved_state.r[14], 2, - &saved_state.r[15], 4, - &saved_state.pc, 4, - &saved_state.a, 4, - &saved_state.x, 4, - &saved_state.y, 4, - &saved_state.dbr, 4, - &saved_state.d, 4, - &saved_state.s, 4, - &saved_state.p, 4, - &saved_state.ticks, 4, - &saved_state.cycles, 4, - &saved_state.insts, 4, - 0 -}; - -int -sim_store_register (rn, value, length) - int rn; - unsigned char *value; - int length; -{ - unsigned int val; - int i; - val = 0; - for (i = 0; i < rinfo[rn].size; i++) - { - val |= (*value++) << (i * 8); - } - - *(rinfo[rn].ptr) = val; - return -1; -} - -int -sim_fetch_register (rn, buf, length) - int rn; - unsigned char *buf; - int length; -{ - unsigned int val = *(rinfo[rn].ptr); - int i; - - for (i = 0; i < rinfo[rn].size; i++) - { - *buf++ = val; - val = val >> 8; - } - return -1; -} - - -sim_reg_size (n) -{ - return rinfo[n].size; -} -int -sim_trace () -{ - return 0; -} - -void -sim_stop_reason (reason, sigrc) - enum sim_stop *reason; - int *sigrc; -{ - *reason = sim_stopped; - *sigrc = saved_state.exception; -} - -int -sim_set_pc (x) - SIM_ADDR x; -{ - saved_state.pc = x; - return 0; -} - - -void -sim_info (verbose) - int verbose; -{ - double timetaken = (double) saved_state.ticks; - double virttime = saved_state.cycles / 2.0e6; - - printf ("\n\n# instructions executed %10d\n", saved_state.insts); - printf ("# cycles %10d\n", saved_state.cycles); - printf ("# real time taken %10.4f\n", timetaken); - printf ("# virtual time taken %10.4f\n", virttime); - - if (timetaken != 0) - { - printf ("# cycles/second %10d\n", (int) (saved_state.cycles / timetaken)); - printf ("# simulation ratio %10.4f\n", virttime / timetaken); - } - -} - - - -void -sim_open (kind, cb, abfd, argv) - SIM_OPEN_KIND kind; - host_callback *cb; - struct _bfd *abfd; - char **argv; -{ -} - - - -#undef fetch8 -fetch8func (x) -{ - if (x & ~MMASK) - { - saved_state.exception = SIGBUS; - return 0; - } - return saved_state.memory[x]; -} - -fetch8 (x) -{ -return fetch8func(x); -} - -void -sim_close (quitting) - int quitting; -{ - /* nothing to do */ -} - -int -sim_load (prog, from_tty) - char *prog; - int from_tty; -{ - /* Return nonzero so gdb will handle it. */ - return 1; -} - - -void -sim_create_inferior (abfd, argv, env) - struct _bfd *abfd; - char **argv; - char **env; -{ - SIM_ADDR start_address; - int pc; - if (abfd != NULL) - start_address = bfd_get_start_address (abfd); - else - start_address = 0; /*??*/ - /* ??? We assume this is a 4 byte quantity. */ - pc = start_address; - sim_store_register (16, (unsigned char *) &pc); -} - -void -sim_set_callbacks (ptr) -struct host_callback_struct *ptr; -{ - -} diff --git a/sim/w65/interp.h b/sim/w65/interp.h deleted file mode 100644 index 2fd5d22..0000000 --- a/sim/w65/interp.h +++ /dev/null @@ -1,194 +0,0 @@ -#define fetch8(x) fetch8func((cycles++,(x))) -#define NFAKES 16 -typedef struct - { - unsigned a; - unsigned x; - unsigned y; - unsigned pc; /* Keep pbr in there too */ - unsigned dbr; - unsigned d; - unsigned s; - unsigned p; - unsigned e; - unsigned char *memory; - unsigned int exception; - unsigned int ticks; - unsigned int cycles; - unsigned int insts; - unsigned int r[NFAKES]; - } -saved_state_type; - - - -#define GET_P \ - ((GET_NBIT << 7) \ - | (GET_VBIT << 6) \ - | (GET_MBIT << 5) \ - | (GET_XBIT << 4) \ - | (GET_DBIT << 3) \ - | (GET_IBIT << 2) \ - | (GET_ZBIT << 1) \ - | (GET_CBIT << 0)) - -#define SET_P(_bits) \ -{ int bits = _bits; \ -SET_NBIT((bits>>7)&1); \ -SET_VBIT((bits>>6)&1); \ -SET_MBIT((bits>>5)&1); \ -SET_XBIT((bits>>4)&1); \ -SET_DBIT((bits>>3)&1); \ -SET_IBIT((bits>>2)&1); \ -SET_ZBIT((bits>>1)&1); \ -SET_CBIT((bits>>0)&1); } - -#define BFLAG (1<<4) -#define DFLAG (1<<3) - -#define GET_A (the_a) -#define GET_E (the_e) -#define GET_B (the_b) -#define GET_CBIT (the_cbit) -#define GET_D (the_d) -#define GET_DBIT (the_dbit) -#define GET_DBR_HIGH (the_dbr) -#define GET_DBR_LOW (the_dbr >> 16) -#define GET_DPR (the_dpr) -#define GET_IBIT (the_ibit) -#define GET_MBIT (the_mbit) -#define SET_XBIT(x) { the_xbit = x; } -#define GET_NBIT (the_nbit) -#define GET_PBRPC (the_pc) -#define GET_PBR_HIGH (the_pc & 0xff0000) -#define GET_PBR_LOW (the_pc >> 16) -#define GET_PC (the_pc & 0xffff) -#define GET_S (the_s) -#define GET_VBIT (the_vbit) -#define GET_X (the_x) -#define GET_XBIT (the_xbit) -#define GET_Y (the_y) -#define GET_ZBIT (the_zbit) -#define IFLAG (1<<2) -#define INC_PC(x) {the_pc += x;} -#define POP16(x) { int _xx; POP8(x); POP8(_xx); x+= _xx<<8;} -#define POP24(x) { int _xx; POP8(x); POP8(_xx); x += _xx << 8; POP8(_xx); x += _xx << 16; } -#define POP8(x) { SET_S(GET_S +1); x = fetch8(GET_S);} -#define PUSH16(x) { int _xx = x;PUSH8(_xx >> 8); PUSH8(_xx);} -#define PUSH8(x) { store8(GET_S, x); SET_S(GET_S-1);} -#define SET_A(x) { the_a = x & AMASK; } -#define SET_B(x) { the_b = x;} -#define SET_CBIT(x) { the_cbit = x;} -#define SET_CBIT_M(x) { the_cbit = (x & (GET_MBIT ? 0x100: 0x10000)) != 0;} -#define SET_CBIT_X(x) { the_cbit = (x & (GET_XBIT ? 0x100: 0x10000)) != 0;} -#define SET_D(x) {the_d = x;} -#define SET_DBIT(x) { the_dbit= x;} -#define SET_DBR_LOW(x) {the_dbr = (x<<16);} -#define SET_DPR(x) { the_dpr = x;} -#define SET_E(x) { the_e = x;} -#define SET_IBIT(x) { the_ibit = x;} -#define SET_MBIT(x) { the_mbit = x; } -#define SET_NBIT(x) { the_nbit = x;} -#define SET_NBIT_16(x) { the_nbit= ( ((x) & (0x8000)) != 0);} -#define SET_NBIT_8(x) { the_nbit= ( ((x) & (0x80)) != 0);} -#define SET_NBIT_M(x) { if (GET_MBIT) { SET_NBIT_8(x); } else { SET_NBIT_16(x);}} -#define SET_NBIT_X(x) { if (GET_XBIT) { SET_NBIT_8(x); } else { SET_NBIT_16(x);}} -#define SET_PBR(x) { the_pc = (the_pc & 0xffff) + ((x)<<16);} -#define SET_PBRPC(x) { the_pc = x;} -#define SET_ONLY_PC(x) { the_pc = (the_pc & 0xff0000) + ((x ) & 0xffff);} -#define SET_S(x) {the_s = x; } -#define SET_VBIT_16(x) {the_vbit = ((((int)x) < -0x8000) || (((int)x) > 0x7fff));} -#define SET_VBIT_8(x) {the_vbit = ((((int)x) < -0x80) || (((int)x) > 0x7f));} -/*#define SET_VBIT_M(x) { if(GET_MBIT) {SET_VBIT_8(x);}else {SET_VBIT_16(x);}}*/ -#define SET_ZBIT_16(x) { the_zbit = ((x & 0xffff) == 0);} -#define SET_ZBIT_8(x) { the_zbit = ((x & 0xff) == 0);} -#define SET_ZBIT_M(x) { if(GET_MBIT) {SET_ZBIT_8(x);}else {SET_ZBIT_16(x);}} -#define SET_ZBIT_X(x) { if(GET_XBIT) {SET_ZBIT_8(x);}else {SET_ZBIT_16(x);}} -#define SET_VBIT(x) { the_vbit = x; } -#define SET_ZBIT(x) { the_zbit = x; } -#define SET_X(x) { the_x = (x) & (GET_XBIT ? 0xff : 0xffff);} -#define SET_Y(x) { the_y = (x) & (GET_XBIT ? 0xff : 0xffff);} - -#define AMASK ( GET_MBIT ? 0xff : 0xffff) -#define SMASK ( GET_MBIT ? 0x80 : 0x8000) -#define SET_VBIT_M(s1,acc,d) ( the_vbit = ((s1 ^ acc) & (acc ^ d) & SMASK )!=0) - -/*#define fetch8(x) (memory[x&MMASK])*/ -#define fetch16(x) (fetch8(x) + (fetch8((x)+1)<<8)) -#define fetch24(x) (fetch8(x) + (fetch8((x)+1)<<8) + (fetch8((x)+2)<<16)) -#define fetch8sext(x) ((char)fetch8(x)) -#define fetch16sext(x) ((short)fetch16(x)) -#define store8(x,y) {memory[x&MMASK]=y;} -#define store16(x,y) { store8(x,y); store8(x+1,y>>8);} -#define SEXTM(x) (GET_MBIT ? ((char)x): ((short)x)) - - -#define STARTFUNC() \ - register unsigned char *memory;\ - int the_s; \ - int the_b; \ - int the_x; \ - int the_d; \ - int the_y; \ - int the_dbr; \ - int the_pc; \ - int the_nbit; \ - int the_vbit; \ - int the_z; \ - int the_mbit; \ - int the_ibit; \ - int the_xbit; \ - int the_zbit; \ - int the_cbit; \ - int the_dbit; \ - int the_dpr; \ - int the_e; \ - int the_a; \ - int tick_start = get_now ();\ - int cycles = 0; \ - int insts = 0; \ - \ - SET_E (saved_state.e); \ - SET_P (saved_state.p); \ - SET_A (saved_state.a); \ - SET_X (saved_state.x); \ - SET_Y (saved_state.y); \ - SET_ONLY_PC (saved_state.pc); \ - SET_PBR (saved_state.pc >> 16); \ - SET_DBR_LOW (saved_state.dbr); \ - SET_D (saved_state.d); \ - SET_S (saved_state.s); \ - memory = saved_state.memory ; \ -{ int k; for (k = 0; k < NFAKES; k++) \ - store16(0x10 + k * 2, saved_state.r[k]); }\ - \ - top: \ - - - -#define ENDFUNC() \ - rethink: \ - saved_state.ticks += get_now () - tick_start;\ - saved_state.cycles += cycles; \ - saved_state.insts += insts; \ -{ int k; for (k = 0; k < NFAKES; k++) \ -saved_state.r[k] = fetch16(0x10 + k * 2); }\ - \ - saved_state.e = GET_E; \ - saved_state.p = GET_P; \ - saved_state.a = GET_A; \ - saved_state.x = GET_X; \ - saved_state.y = GET_Y; \ - saved_state.pc = GET_PBRPC; \ - saved_state.dbr = GET_DBR_LOW; \ - saved_state.d = GET_D; \ - saved_state.s = GET_S; \ - \ - return 0; \ - - -extern saved_state_type saved_state; - -#define MMASK 0xfffff -#define NUMSEGS 16 -#define RETHINK goto rethink; diff --git a/sim/w65/run.c b/sim/w65/run.c deleted file mode 100644 index 2d966ee..0000000 --- a/sim/w65/run.c +++ /dev/null @@ -1,131 +0,0 @@ -/* run front end support for W65 - Copyright (C) 1995 Free Software Foundation, Inc. - -This file is part of W65 SIM - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - - -/* Steve Chamberlain - sac@cygnus.com */ - -#include "config.h" - -#include <stdio.h> -#ifdef HAVE_STDLIB_H -#include <stdlib.h> -#endif -#include "getopt.h" -#include "bfd.h" - -#ifdef NEED_DECLARATION_PRINTF -extern int printf (); -#endif - -void usage(); -extern int optind; - -int -main (ac, av) - int ac; - char **av; -{ - bfd *abfd; - bfd_vma start_address; - asection *s; - int i; - int verbose = 0; - int trace = 0; - char *name = ""; - - while ((i = getopt (ac, av, "tv")) != EOF) - switch (i) - { - case 't': - trace = 1; - break; - case 'v': - verbose = 1; - break; - default: - usage(); - } - ac -= optind; - av += optind; - - if (ac != 1) - usage(); - - name = *av; - - if (verbose) - { - printf ("run %s\n", name); - } - abfd = bfd_openr (name, "coff-w65"); - if (abfd) - { - - if (bfd_check_format (abfd, bfd_object)) - { - - for (s = abfd->sections; s; s = s->next) - { - unsigned char *buffer = malloc (bfd_section_size (abfd, s)); - bfd_get_section_contents (abfd, - s, - buffer, - 0, - bfd_section_size (abfd, s)); - sim_write (s->vma, buffer, bfd_section_size (abfd, s)); - free (buffer); - } - - start_address = bfd_get_start_address (abfd); - sim_set_pc (start_address); - if (trace) - { - int done = 0; - while (!done) - { - done = sim_trace (); - } - } - else - { - sim_resume (0, 0); - } - if (verbose) - sim_info (printf, 0); - - /* Find out what was in r0 and return that */ - { - unsigned char b[4]; - sim_fetch_register(0, b, 4); - return b[3]; - } - - } - } - - return 1; -} - -void -usage() -{ - fprintf (stderr, "usage: run [-tv] program\n"); - exit (1); -} |