diff options
| author | Andrew Cagney <cagney@redhat.com> | 2003-06-22 04:03:15 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 2003-06-22 04:03:15 +0000 |
| commit | 945d18fb9cb76da5b3a5b7783852410400b684a5 (patch) | |
| tree | a6a20582d3f70a810b595fca7582a3615aeb31fb /sim | |
| parent | 21f86aab13aed2e3e56612b580aa6063f0edf15f (diff) | |
| download | gdb-945d18fb9cb76da5b3a5b7783852410400b684a5.zip gdb-945d18fb9cb76da5b3a5b7783852410400b684a5.tar.gz gdb-945d18fb9cb76da5b3a5b7783852410400b684a5.tar.bz2 | |
2003-06-21 Andrew Cagney <cagney@redhat.com>
* interrupts.c: Update copyright.
(external_interrupt): Fix test for already pending interrupt.
Problem found by Joshua LeVasseur.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/ppc/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/ppc/interrupts.c | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/sim/ppc/ChangeLog b/sim/ppc/ChangeLog index 62920ac..1324f81 100644 --- a/sim/ppc/ChangeLog +++ b/sim/ppc/ChangeLog @@ -1,5 +1,9 @@ 2003-06-21 Andrew Cagney <cagney@redhat.com> + * interrupts.c: Update copyright. + (external_interrupt): Fix test for already pending interrupt. + Problem found by Joshua LeVasseur. + * ppc-instructions: Add missing +8 line. Found by blofeldus at yahoo.com. diff --git a/sim/ppc/interrupts.c b/sim/ppc/interrupts.c index 681e791..dafb2b3 100644 --- a/sim/ppc/interrupts.c +++ b/sim/ppc/interrupts.c @@ -1,6 +1,6 @@ /* This file is part of the program psim. - Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> + Copyright 1994, 1995, 1996, 1997, 2003 Andrew Cagney This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -522,7 +522,7 @@ external_interrupt(cpu *processor, { interrupts *ints = cpu_interrupts(processor); if (is_asserted) { - if (!ints->pending_interrupts & external_interrupt_pending) { + if (!(ints->pending_interrupts & external_interrupt_pending)) { ints->pending_interrupts |= external_interrupt_pending; if (cpu_registers(processor)->msr & msr_external_interrupt_enable) schedule_hardware_interrupt_delivery(processor); |