diff options
| author | Jeff Law <law@redhat.com> | 1997-05-22 05:28:34 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 1997-05-22 05:28:34 +0000 |
| commit | 09e142d5a22042f50f7833f809f8ed35f196b16f (patch) | |
| tree | db292d2e3a19ea1c6201047e85ef1b75293658c7 /sim | |
| parent | 1fa0cc2dfca2bfa6cc62516dd8c7aeb9c590d86a (diff) | |
| download | gdb-09e142d5a22042f50f7833f809f8ed35f196b16f.zip gdb-09e142d5a22042f50f7833f809f8ed35f196b16f.tar.gz gdb-09e142d5a22042f50f7833f809f8ed35f196b16f.tar.bz2 | |
* interp.c (sim_resume): Add missing case in big switch
statement (for extb instruction).
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/mn10300/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/mn10300/interp.c | 1 |
2 files changed, 6 insertions, 0 deletions
diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog index 4ac5038..b18be23 100644 --- a/sim/mn10300/ChangeLog +++ b/sim/mn10300/ChangeLog @@ -1,3 +1,8 @@ +Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com) + + * interp.c (sim_resume): Add missing case in big switch + statement (for extb instruction). + Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com) * interp.c: Replace all references to load_mem and store_mem diff --git a/sim/mn10300/interp.c b/sim/mn10300/interp.c index 7f29f76..997b032 100644 --- a/sim/mn10300/interp.c +++ b/sim/mn10300/interp.c @@ -425,6 +425,7 @@ sim_resume (sd, step, siggnal) case 0x04: case 0x08: case 0x0c: + case 0x10: case 0x11: case 0x12: case 0x13: |