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authorGavin Romig-Koch <gavin@redhat.com>1997-09-16 20:01:00 +0000
committerGavin Romig-Koch <gavin@redhat.com>1997-09-16 20:01:00 +0000
commit667065d0d4c9805b49fa87832cbf9af65e403586 (patch)
tree5f2e6cfe8cf0d2a02cc3075b904caecb8a5f614c /sim
parent41f19f2b999a8a4aab66758e29184cd21e5325ac (diff)
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* sim/mips/gencode.c (build_instruction): Don't need to subtract 4 for
JALR, just 2.
Diffstat (limited to 'sim')
-rw-r--r--sim/mips/ChangeLog5
-rw-r--r--sim/mips/gencode.c3
2 files changed, 7 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 058b2bd..2764259 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,8 @@
+Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
+
+ * gencode.c (build_instruction): Don't need to subtract 4 for
+ JALR, just 2.
+
Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
* interp.c: Correct some HASFPU problems.
diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c
index d2ca749..ae4f42a 100644
--- a/sim/mips/gencode.c
+++ b/sim/mips/gencode.c
@@ -2532,7 +2532,8 @@ build_instruction (doisa, features, mips16, insn)
printf(" op1 = WORD64LO(op1);\n");
printf(" /* NOTE: The jump occurs AFTER the next instruction has been executed */\n");
printf(" DSPC = op1;\n");
- if (insn->flags & LINK)
+ if ((insn->flags & LINK)
+ && ! (insn->flags & REG))
printf(" JALDELAYSLOT();\n");
else
printf(" DELAYSLOT();\n");