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authorAndrew Cagney <cagney@redhat.com>1998-11-21 03:31:30 +0000
committerAndrew Cagney <cagney@redhat.com>1998-11-21 03:31:30 +0000
commit821b702f92c049761c98c1c98126e49a3c45ac69 (patch)
treecad722ad07e0ed575adc450e53ce78cb68656e52 /sim
parente203d469382110263110c978cb5c3d40edb0f672 (diff)
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* r5900.igen (CVT.W.S): Always round towards zero.
Update testsuite.
Diffstat (limited to 'sim')
-rw-r--r--sim/mips/ChangeLog6
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diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 4176bd5..67393ed 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,9 @@
+start-sanitize-r5900
+Mon Nov 16 11:44:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * r5900.igen (CVT.W.S): Always round towards zero.
+
+end-sanitize-r5900
Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
* gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK