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| author | Mike Frysinger <vapier@gentoo.org> | 2021-11-28 00:23:38 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2021-11-28 13:23:59 -0500 |
| commit | 6cbb891faa7c5c9f8c4d7bc2d816b0c7863ff4ea (patch) | |
| tree | 676f5ed34f5181079d3deae297b83afe2eefcc38 /sim | |
| parent | c8c6ef3807554a17d4518e45f91c53d17a71c083 (diff) | |
| download | gdb-6cbb891faa7c5c9f8c4d7bc2d816b0c7863ff4ea.zip gdb-6cbb891faa7c5c9f8c4d7bc2d816b0c7863ff4ea.tar.gz gdb-6cbb891faa7c5c9f8c4d7bc2d816b0c7863ff4ea.tar.bz2 | |
sim: mcore: switch to new target-newlib-syscall
Use the new target-newlib-syscall module. This is needed to merge all
the architectures into a single build, and mcore has a custom syscall
table for its newlib/libgloss port.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/mcore/Makefile.in | 3 | ||||
| -rw-r--r-- | sim/mcore/interp.c | 5 |
2 files changed, 5 insertions, 3 deletions
diff --git a/sim/mcore/Makefile.in b/sim/mcore/Makefile.in index 45cf634..8f62583 100644 --- a/sim/mcore/Makefile.in +++ b/sim/mcore/Makefile.in @@ -15,9 +15,6 @@ # You should have received a copy of the GNU General Public License # along with this program. If not, see <http://www.gnu.org/licenses/>. -# This selects the bfin newlib/libgloss syscall definitions. -NL_TARGET = -DNL_TARGET_mcore - ## COMMON_PRE_CONFIG_FRAG SIM_OBJS = \ diff --git a/sim/mcore/interp.c b/sim/mcore/interp.c index e8a4520..bc33cc0 100644 --- a/sim/mcore/interp.c +++ b/sim/mcore/interp.c @@ -36,6 +36,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */ #include "sim-syscall.h" #include "sim-options.h" +#include "target-newlib-syscall.h" + #define target_big_endian (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) @@ -1350,6 +1352,9 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, SIM_DESC sd = sim_state_alloc (kind, cb); SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); + /* Set default options before parsing user options. */ + cb->syscall_map = cb_mcore_syscall_map; + /* The cpu data is kept in a separately allocated chunk of memory. */ if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK) { |