diff options
author | Andrew Burgess <andrew.burgess@embecosm.com> | 2020-09-13 21:48:31 +0100 |
---|---|---|
committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2020-09-18 17:26:07 +0100 |
commit | e163628395d40485c3b379fa39bdc211ee19d40b (patch) | |
tree | 2e037263e3a38a783b4f41812fcee0e99d9b06f7 /sim | |
parent | d3483b43ff12afe3db2bed7184b7113cbaa358a5 (diff) | |
download | gdb-e163628395d40485c3b379fa39bdc211ee19d40b.zip gdb-e163628395d40485c3b379fa39bdc211ee19d40b.tar.gz gdb-e163628395d40485c3b379fa39bdc211ee19d40b.tar.bz2 |
sim/m32r: return register sizes after fetch and store
The m32r simulator currently always returns -1 for the register size
after both a fetch and a store. In the fetch case GDB is forgiving of
this, but in the store case GDB treats a return value of -1 as an
error.
This commit updates the m32r simulator to return a valid register size
when fetching or storing a register. This fixes any GDB test that
writes to a register, which will include any GDB test that makes an
inferior call, for example gdb.base/break.exp.
sim/m32r/ChangeLog:
* m32r.c (m32rbf_register_size): New function.
(m32rbf_fetch_register): Use new function.
(m32rbf_store_register): Likewise.
Diffstat (limited to 'sim')
-rw-r--r-- | sim/m32r/ChangeLog | 6 | ||||
-rw-r--r-- | sim/m32r/m32r.c | 20 |
2 files changed, 24 insertions, 2 deletions
diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index 5f1b216..05f478b 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,9 @@ +2020-09-18 Andrew Burgess <andrew.burgess@embecosm.com> + + * m32r.c (m32rbf_register_size): New function. + (m32rbf_fetch_register): Use new function. + (m32rbf_store_register): Likewise. + 2017-09-06 John Baldwin <jhb@FreeBSD.org> * configure: Regenerate. diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c index 6187ed1..8936b67 100644 --- a/sim/m32r/m32r.c +++ b/sim/m32r/m32r.c @@ -24,6 +24,14 @@ #include "cgen-mem.h" #include "cgen-ops.h" +/* Return the size of REGNO in bytes. */ + +static int +m32rbf_register_size (int regno) +{ + return 4; +} + /* Decode gdb ctrl register number. */ int @@ -48,6 +56,10 @@ m32r_decode_gdb_ctrl_regnum (int gdb_regnum) int m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) { + int size = m32rbf_register_size (rn); + if (len != size) + return -1; + if (rn < 16) SETTWI (buf, m32rbf_h_gr_get (current_cpu, rn)); else @@ -76,7 +88,7 @@ m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len return 0; } - return -1; /*FIXME*/ + return size; } /* The contents of BUF are in target byte order. */ @@ -84,6 +96,10 @@ m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len int m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) { + int size = m32rbf_register_size (rn); + if (len != size) + return -1; + if (rn < 16) m32rbf_h_gr_set (current_cpu, rn, GETTWI (buf)); else @@ -121,7 +137,7 @@ m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len return 0; } - return -1; /*FIXME*/ + return size; } USI |