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| author | Andrew Cagney <cagney@redhat.com> | 1997-09-17 08:14:23 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-09-17 08:14:23 +0000 |
| commit | a72f8fb439a16152c6c03d1e07c4fbec9c6a85dc (patch) | |
| tree | 0668a8fbabd7aabcbb86f31be8f8e5a9638880ed /sim/v850/v850.igen | |
| parent | 175c6fd37579ff6cd9dd44055cfa60087c1b515f (diff) | |
| download | gdb-a72f8fb439a16152c6c03d1e07c4fbec9c6a85dc.zip gdb-a72f8fb439a16152c6c03d1e07c4fbec9c6a85dc.tar.gz gdb-a72f8fb439a16152c6c03d1e07c4fbec9c6a85dc.tar.bz2 | |
Clean up more tracing.
FIX interrupt delivery - was zapping PSW before it had been saved.
FIX interrupt return, was one instruction out.
Diffstat (limited to 'sim/v850/v850.igen')
| -rw-r--r-- | sim/v850/v850.igen | 24 |
1 files changed, 21 insertions, 3 deletions
diff --git a/sim/v850/v850.igen b/sim/v850/v850.igen index eb7451a..fd45a30 100644 --- a/sim/v850/v850.igen +++ b/sim/v850/v850.igen @@ -631,9 +631,12 @@ regID,111111,RRRRR + 0000000000100000:IX:::ldsr rrrrr!0,000000,RRRRR:I:::mov "mov r<reg1>, r<reg2>" { - COMPAT_1 (OP_0 ()); + TRACE_ALU_INPUT0 (); + GR[reg2] = GR[reg1]; + TRACE_ALU_RESULT (GR[reg2]); } + rrrrr!0,010000,iiiii:II:::mov "mov <imm5>, r<reg2>" { @@ -757,7 +760,7 @@ rrrrr,111111,iiiii + wwwww,01001,IIII,10:XII:::mulu 0000000000000000:I:::nop "nop" { - COMPAT_1 (OP_0 ()); + /* do nothing, trace nothing */ } @@ -886,7 +889,22 @@ rrrrr,110100,RRRRR + iiiiiiiiiiiiiiii:VI:::ori 0000011111100000 + 0000000101000000:X:::reti "reti" { - COMPAT_2 (OP_14007E0 ()); + if ((PSW & PSW_EP)) + { + nia = (EIPC & ~1); + PSW = EIPSW; + } + else if ((PSW & PSW_NP)) + { + nia = (FEPC & ~1); + PSW = FEPSW; + } + else + { + nia = (EIPC & ~1); + PSW = EIPSW; + } + TRACE_BRANCH1 (PSW); } |