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| author | Jeff Law <law@redhat.com> | 1996-10-24 20:49:06 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 1996-10-24 20:49:06 +0000 |
| commit | 85c09b0518630f580b3cdc82728b22ad09b1ca64 (patch) | |
| tree | ac85fd79b33fb0d04413498e5c31d873bbad0612 /sim/v850/simops.c | |
| parent | e32ded5231b1daa9e4173477ee86f7fae401100d (diff) | |
| download | gdb-85c09b0518630f580b3cdc82728b22ad09b1ca64.zip gdb-85c09b0518630f580b3cdc82728b22ad09b1ca64.tar.gz gdb-85c09b0518630f580b3cdc82728b22ad09b1ca64.tar.bz2 | |
* simops.c (OP_500): Fix displacement handling for sld.w.
(OP_501): Similarly for sst.w.
More fixes exposed by tda testing.
Diffstat (limited to 'sim/v850/simops.c')
| -rw-r--r-- | sim/v850/simops.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/v850/simops.c b/sim/v850/simops.c index b26680e..7710232 100644 --- a/sim/v850/simops.c +++ b/sim/v850/simops.c @@ -456,7 +456,7 @@ OP_500 () trace_input ("sld.w", OP_LOAD16, 4); temp = OP[1]; temp &= 0x7f; - op2 = temp << 2; + op2 = temp << 1; result = load_mem (State.regs[30] + op2, 4); State.regs[OP[0]] = result; trace_output (OP_LOAD16); @@ -505,7 +505,7 @@ OP_501 () op0 = State.regs[OP[0]]; temp = OP[1]; temp &= 0x7f; - op1 = temp << 2; + op1 = temp << 1; store_mem (State.regs[30] + op1, 4, op0); trace_output (OP_STORE16); } |