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author | Andrew Cagney <cagney@redhat.com> | 1997-09-17 08:14:23 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-09-17 08:14:23 +0000 |
commit | a72f8fb439a16152c6c03d1e07c4fbec9c6a85dc (patch) | |
tree | 0668a8fbabd7aabcbb86f31be8f8e5a9638880ed /sim/v850/sim-main.h | |
parent | 175c6fd37579ff6cd9dd44055cfa60087c1b515f (diff) | |
download | gdb-a72f8fb439a16152c6c03d1e07c4fbec9c6a85dc.zip gdb-a72f8fb439a16152c6c03d1e07c4fbec9c6a85dc.tar.gz gdb-a72f8fb439a16152c6c03d1e07c4fbec9c6a85dc.tar.bz2 |
Clean up more tracing.
FIX interrupt delivery - was zapping PSW before it had been saved.
FIX interrupt return, was one instruction out.
Diffstat (limited to 'sim/v850/sim-main.h')
-rw-r--r-- | sim/v850/sim-main.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/v850/sim-main.h b/sim/v850/sim-main.h index 44a5669..a4c57af 100644 --- a/sim/v850/sim-main.h +++ b/sim/v850/sim-main.h @@ -41,7 +41,6 @@ typedef struct _v850_regs { reg_t sregs[32]; /* system registers, including psw */ reg_t pc; int dummy_mem; /* where invalid accesses go */ - int pending_nmi; } v850_regs; struct _sim_cpu @@ -49,6 +48,7 @@ struct _sim_cpu /* ... simulator specific members ... */ v850_regs reg; reg_t psw_mask; /* only allow non-reserved bits to be set */ + sim_event *pending_nmi; /* ... base type ... */ sim_cpu_base base; }; |