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authorNick Clifton <nickc@redhat.com>2013-01-28 10:06:51 +0000
committerNick Clifton <nickc@redhat.com>2013-01-28 10:06:51 +0000
commit67d7515b0a3ee2a48b6dc9389c1145c37d4b6c47 (patch)
treebffbf46db2699ea0e3e32eee74f662e1bc1d1d65 /sim/v850/interp.c
parent5dddde8e64ce7587714eb04580ee29c2cc93c8f0 (diff)
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* simops.c (v850_rotl): New function.
(v850_bins): New function. * simops.h: Add prototypes fir v850_rotl and v850_bins. * v850-dc: Add entries for V850e3v5. * v850.igen: Add support for v850e3v5. (ld.dw, st.dw, rotl, bins): New patterns.
Diffstat (limited to 'sim/v850/interp.c')
-rw-r--r--sim/v850/interp.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/sim/v850/interp.c b/sim/v850/interp.c
index b48c8a7..01a3dea 100644
--- a/sim/v850/interp.c
+++ b/sim/v850/interp.c
@@ -281,6 +281,7 @@ sim_open (kind, cb, abfd, argv)
case bfd_mach_v850e1:
case bfd_mach_v850e2:
case bfd_mach_v850e2v3:
+ case bfd_mach_v850e3v5:
STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT
| PSW_CY | PSW_OV | PSW_S | PSW_Z);
break;