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| author | Andrew Cagney <cagney@redhat.com> | 1997-09-12 05:56:38 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-09-12 05:56:38 +0000 |
| commit | 410230cf6d65003b0595a7ef712b671d1bb77b0d (patch) | |
| tree | c6ba4f2a0edfd794857fce8061b26e448ef8a182 /sim/v850/Makefile.in | |
| parent | 944deab68edff4993da304bc2ed56827310b11ca (diff) | |
| download | gdb-410230cf6d65003b0595a7ef712b671d1bb77b0d.zip gdb-410230cf6d65003b0595a7ef712b671d1bb77b0d.tar.gz gdb-410230cf6d65003b0595a7ef712b671d1bb77b0d.tar.bz2 | |
Check reserved bits before executing instructions.
Make v850[eq] the the default simulator.
Report illegal instructions.
Include v850e instructions in v850eq.
Diffstat (limited to 'sim/v850/Makefile.in')
| -rw-r--r-- | sim/v850/Makefile.in | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/sim/v850/Makefile.in b/sim/v850/Makefile.in index cadd913..723d224 100644 --- a/sim/v850/Makefile.in +++ b/sim/v850/Makefile.in @@ -51,12 +51,14 @@ SIM_EXTRA_DEPS = v850_sim.h sim-main.h simops.h itable.h SIM_WARNINGS=@sim_warnings@ SIM_ENDIAN=@sim_endian@ SIM_HOSTENDIAN=@sim_hostendian@ +SIM_RESERVED_BITS=@sim_reserved_bits@ SIM_EXTRA_CFLAGS = \ -DDEBUG \ -I$(srcdir)/../../newlib/libc/sys/sysnecv850 \ $(SIM_WARNINGS) \ $(SIM_ENDIAN) \ - $(SIM_HOSTENDIAN) + $(SIM_HOSTENDIAN) \ + $(SIM_RESERVED_BITS) SIM_EXTRA_CLEAN = clean-extra INCLUDE = $(sim_main_headers) $(SIM_EXTRA_DEPS) |