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author | Andrew Cagney <cagney@redhat.com> | 1997-09-15 08:18:20 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-09-15 08:18:20 +0000 |
commit | 658303f7d4219618030b6a5afce163c93e6034ce (patch) | |
tree | 8f69ed6bf0554fcf59936609f67d2c894613090c /sim/v850/ChangeLog | |
parent | 9c82b2b8058ac93b4d9640f5afa2d2abb40f1f20 (diff) | |
download | gdb-658303f7d4219618030b6a5afce163c93e6034ce.zip gdb-658303f7d4219618030b6a5afce163c93e6034ce.tar.gz gdb-658303f7d4219618030b6a5afce163c93e6034ce.tar.bz2 |
For v850eq start up with US bit set.
Let sim_analyze_program determine the architecture.
Fix various sanitizations.
Diffstat (limited to 'sim/v850/ChangeLog')
-rw-r--r-- | sim/v850/ChangeLog | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog index 6ac5cb4..c9c81a2 100644 --- a/sim/v850/ChangeLog +++ b/sim/v850/ChangeLog @@ -1,3 +1,32 @@ +Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> + +start-sanitize-v850eq + * interp.c (sim_create_inferior): For v850eq set US bit by + default. + +end-sanitize-v850eq +start-sanitize-v850e + * interp.c (sim_open): Don't set arch, now set by + sim_analyze_program. + +end-sanitize-v850e + * configure: Regenerated to track ../common/aclocal.m4 changes. + +Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * simops.c (op_types): Move from here. + sim-main.h: To here. + + * sim-main.h (trace_input, trace_output), simops.c: Make global. + + * simops.c (OP_60): Move "jmp" code from here. + * v850.igen (jmp): To here. + +start-sanitize-v850eq + * simops.c (OP_60): Move "sld.bu" code from here. + * v850.igen (sld.bu): To here. + +end-sanitize-v850eq Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com> start-sanitize-v850eq |