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author | Michael Meissner <gnu@the-meissners.org> | 1997-05-09 20:16:01 +0000 |
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committer | Michael Meissner <gnu@the-meissners.org> | 1997-05-09 20:16:01 +0000 |
commit | 89d1a47805104116b13103c6ddf857a84426f148 (patch) | |
tree | 22cb7fc6ab79fbaf278b8e95aebfc906521995b7 /sim/tic80 | |
parent | aaa7b252607ba49e67cb3329a1dea77418f3d1a1 (diff) | |
download | gdb-89d1a47805104116b13103c6ddf857a84426f148.zip gdb-89d1a47805104116b13103c6ddf857a84426f148.tar.gz gdb-89d1a47805104116b13103c6ddf857a84426f148.tar.bz2 |
Fix xor in simulator
Diffstat (limited to 'sim/tic80')
-rw-r--r-- | sim/tic80/ChangeLog | 1 | ||||
-rw-r--r-- | sim/tic80/insns | 4 |
2 files changed, 3 insertions, 2 deletions
diff --git a/sim/tic80/ChangeLog b/sim/tic80/ChangeLog index aeaa431..131098f 100644 --- a/sim/tic80/ChangeLog +++ b/sim/tic80/ChangeLog @@ -2,6 +2,7 @@ Fri May 9 15:47:36 1997 Mike Meissner <meissner@cygnus.com> * insns (cmp_vals,do_cmp): Produce the correct bits as specified by the architecture. + (xor): Fix xor immediate patterns to use the correct bits. Fri May 9 09:55:33 1997 Andrew Cagney <cagney@b1.cygnus.com> diff --git a/sim/tic80/insns b/sim/tic80/insns index f7edef1..4e91cb6 100644 --- a/sim/tic80/insns +++ b/sim/tic80/insns @@ -1136,8 +1136,8 @@ void::function::do_xor:signed32 *rDest, signed32 Source1, signed32 Source2 *rDest = result; 31.Dest,26.Source2,21.0b0010110,14.UnsignedImmediate::::xor i do_xor (_SD, rDest, vSource1, rSource2); -31.Dest,26.Source2,21.0b110010110,13.0,12.0,11./,4.Source1::::xor r +31.Dest,26.Source2,21.0b110010110,12.0,11./,4.Source1::::xor r do_xor (_SD, rDest, rSource1, rSource2); -31.Dest,26.Source2,21.0b110010110,13.0,12.1,11./::::xor l +31.Dest,26.Source2,21.0b110010110,12.1,11./::::xor l long_immediate (LongUnsignedImmediate); do_xor (_SD, rDest, LongUnsignedImmediate, rSource2); |