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author | Michael Meissner <gnu@the-meissners.org> | 1998-01-28 23:48:13 +0000 |
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committer | Michael Meissner <gnu@the-meissners.org> | 1998-01-28 23:48:13 +0000 |
commit | 241b462435f038f9814d25e69974e712b8ad6548 (patch) | |
tree | bf4d0a38184c157c4b47bc2727f31329402148b9 /sim/tic80 | |
parent | e086cc6caf8276bf877ce97b1f0aefd9adf23dbc (diff) | |
download | gdb-241b462435f038f9814d25e69974e712b8ad6548.zip gdb-241b462435f038f9814d25e69974e712b8ad6548.tar.gz gdb-241b462435f038f9814d25e69974e712b8ad6548.tar.bz2 |
Print compare bits in human readible form
Diffstat (limited to 'sim/tic80')
-rw-r--r-- | sim/tic80/ChangeLog | 12 | ||||
-rw-r--r-- | sim/tic80/cpu.h | 21 | ||||
-rw-r--r-- | sim/tic80/insns | 4 | ||||
-rw-r--r-- | sim/tic80/misc.c | 117 |
4 files changed, 146 insertions, 8 deletions
diff --git a/sim/tic80/ChangeLog b/sim/tic80/ChangeLog index de77fbf..0405124 100644 --- a/sim/tic80/ChangeLog +++ b/sim/tic80/ChangeLog @@ -1,3 +1,15 @@ +Wed Jan 28 18:44:33 1998 Michael Meissner <meissner@cygnus.com> + + * misc.c (tic80_trace_cmp_internal): New function to return + compare bits as a string. + (tic80_trace_{,fpu2}cmp): New functions for tracing cmp and fcmp. + + * cpu.h (tic80_trace_{,fpu2}cmp): Add declaration. + (TRACE_{,FPU2}CMP): New macros for tracing compares. + + * insns (do_{,f}cmp): Use compare specific tracing functions to + print out the flag bits. + Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/tic80/cpu.h b/sim/tic80/cpu.h index f1780fa..4124512 100644 --- a/sim/tic80/cpu.h +++ b/sim/tic80/cpu.h @@ -1,5 +1,5 @@ /* TIc80 Simulator. - Copyright (C) 1997 Free Software Foundation, Inc. + Copyright (C) 1997, 1998 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GDB, the GNU debugger. @@ -162,12 +162,14 @@ struct _sim_cpu { #if defined(WITH_TRACE) extern char *tic80_trace_alu3 PARAMS ((int, unsigned32, unsigned32, unsigned32)); +extern char *tic80_trace_cmp PARAMS ((int, unsigned32, unsigned32, unsigned32)); extern char *tic80_trace_alu2 PARAMS ((int, unsigned32, unsigned32)); extern char *tic80_trace_shift PARAMS ((int, unsigned32, unsigned32, int, int, int, int, int)); extern void tic80_trace_fpu3 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu, sim_fpu, sim_fpu)); extern void tic80_trace_fpu2 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu, sim_fpu)); extern void tic80_trace_fpu1 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu)); extern void tic80_trace_fpu2i PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, unsigned32, sim_fpu, sim_fpu)); +extern void tic80_trace_fpu2cmp PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, unsigned32, sim_fpu, sim_fpu)); extern char *tic80_trace_nop PARAMS ((int)); extern char *tic80_trace_sink1 PARAMS ((int, unsigned32)); extern char *tic80_trace_sink2 PARAMS ((int, unsigned32, unsigned32)); @@ -185,6 +187,15 @@ do { \ } \ } while (0) +#define TRACE_CMP(indx, result, input1, input2) \ +do { \ + if (TRACE_ALU_P (CPU)) { \ + trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \ + itable[indx].line_nr, "alu", \ + tic80_trace_cmp (indx, result, input1, input2)); \ + } \ +} while (0) + #define TRACE_ALU2(indx, result, input) \ do { \ if (TRACE_ALU_P (CPU)) { \ @@ -236,6 +247,14 @@ do { \ } \ } while (0) +#define TRACE_FPU2CMP(result, input1, input2) \ +do { \ + if (TRACE_FPU_P (CPU)) { \ + tic80_trace_fpu2cmp (SD, CPU, cia, MY_INDEX, \ + result, input1, input2); \ + } \ +} while (0) + #define TRACE_NOP(indx) \ do { \ if (TRACE_ALU_P (CPU)) { \ diff --git a/sim/tic80/insns b/sim/tic80/insns index dfe9c87..896443f 100644 --- a/sim/tic80/insns +++ b/sim/tic80/insns @@ -352,7 +352,7 @@ (signed16)source2, (unsigned16)source2) << 10; field |= cmp_vals (_SD, (signed8)source1, (unsigned8)source1, (signed8)source2, (unsigned8)source2); - TRACE_ALU3 (MY_INDEX, field, source1, source2); + TRACE_CMP (MY_INDEX, field, source1, source2); *rDest = field; 31.Dest,26.Source2,21.0b1010000,14.SignedImmediate::::cmp i "cmp <SignedImmediate>, r<Source2>, r<Dest>" @@ -541,7 +541,7 @@ void::function::do_fcmp:unsigned32 *rDest, sim_fpu s1, sim_fpu s2 || sim_fpu_is_ge (&s1, &s2)) result |= BIT32(29); } *rDest = result; - TRACE_FPU2I (result, s1, s2); + TRACE_FPU2CMP (result, s1, s2); 31.Dest,26.Source2,21.0b111110101,12.0,11./,10.0,8.P2,6.P1,4.Source1::f::fcmp r "fcmp.%s<PX#P1>%s<PX#P2> r<Source1>, r<Source2>, r<Dest>" do_fcmp (_SD, rDest, diff --git a/sim/tic80/misc.c b/sim/tic80/misc.c index beb0c68..0548074 100644 --- a/sim/tic80/misc.c +++ b/sim/tic80/misc.c @@ -1,5 +1,5 @@ /* TIc80 Simulator. - Copyright (C) 1997 Free Software Foundation, Inc. + Copyright (C) 1997, 1998 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GDB, the GNU debugger. @@ -137,6 +137,70 @@ tic80_init_trace (void) tic80_size_name = max_len + sizeof(":m") - 1 + sizeof (":s") - 1; } +/* Given an integer which is the result of a comparison, return a string + giving which bits are set. */ + +static char * +tic80_trace_cmp_internal (unsigned32 flag) +{ + struct cmp_bits { unsigned32 bit; char *string; }; + static char buffer[32*8]; + static struct cmp_bits bits[] = + { + { BIT32(29), "hs" }, + { BIT32(28), "lo" }, + { BIT32(27), "ls" }, + { BIT32(26), "hi" }, + { BIT32(25), "ge" }, + { BIT32(24), "lt" }, + { BIT32(23), "le" }, + { BIT32(22), "gt" }, + { BIT32(21), "ne" }, + { BIT32(20), "eq" }, + + { BIT32(19), "hs.h" }, + { BIT32(18), "lo.h" }, + { BIT32(17), "ls.h" }, + { BIT32(16), "hi.h" }, + { BIT32(15), "ge.h" }, + { BIT32(14), "lt.h" }, + { BIT32(13), "le.h" }, + { BIT32(12), "gt.h" }, + { BIT32(11), "ne.h" }, + { BIT32(10), "eq.h" }, + + { BIT32( 9), "hs.b" }, + { BIT32( 8), "lo.b" }, + { BIT32( 7), "ls.b" }, + { BIT32( 6), "hi.b" }, + { BIT32( 5), "ge.b" }, + { BIT32( 4), "lt.b" }, + { BIT32( 3), "le.b" }, + { BIT32( 2), "gt.b" }, + { BIT32( 1), "ne.b" }, + { BIT32( 0), "eq.b" }, + { 0, (char *)0 }, + }; + + int i; + char *p = buffer; + + for (i = 0; bits[i].bit != 0; i++) + { + if ((flag & bits[i].bit) != 0) + { + if (p != buffer) + *p++ = ' '; + + strcpy (p, bits[i].string); + p += strlen (p); + } + } + + *p = '\0'; + return buffer; +} + /* Trace the result of an ALU operation with 2 integer inputs and an integer output */ char * tic80_trace_alu3 (int indx, @@ -156,6 +220,26 @@ tic80_trace_alu3 (int indx, return tic80_trace_buffer; } +/* Trace the result of an ALU operation with 2 integer inputs and an integer output + that sets the bits from a compare instruction. */ +char * +tic80_trace_cmp (int indx, + unsigned32 result, + unsigned32 input1, + unsigned32 input2) +{ + if (!tic80_size_name) + tic80_init_trace (); + + sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld 0x%.*lx/%*ld => 0x%.*lx %s", + tic80_size_name, itable[indx].name, + SIZE_HEX, input1, SIZE_DECIMAL, (long)(signed32)input1, + SIZE_HEX, input2, SIZE_DECIMAL, (long)(signed32)input2, + SIZE_HEX, result, tic80_trace_cmp_internal (result)); + + return tic80_trace_buffer; +} + /* Trace the result of an ALU operation with 1 integer input and an integer output */ char * tic80_trace_alu2 (int indx, @@ -222,7 +306,7 @@ tic80_trace_shift (int indx, SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result); return tic80_trace_buffer; -} +} /* Trace the result of an FPU operation with 2 floating point inputs and a floating point output */ void @@ -287,7 +371,7 @@ tic80_trace_fpu1 (SIM_DESC sd, SIZE_HEX + SIZE_DECIMAL, sim_fpu_2d (&result)); } -/* Trace the result of an FPU operation with 1 integer input and an integer output */ +/* Trace the result of an FPU operation with 2 floating point inputs and an integer output */ void tic80_trace_fpu2i (SIM_DESC sd, sim_cpu *cpu, @@ -309,6 +393,29 @@ tic80_trace_fpu2i (SIM_DESC sd, SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result); } +/* Trace the result of an FPU operation with 2 floating point inputs and an integer output + that is the result of a comparison. */ +void +tic80_trace_fpu2cmp (SIM_DESC sd, + sim_cpu *cpu, + sim_cia cia, + int indx, + unsigned32 result, + sim_fpu input1, + sim_fpu input2) +{ + if (!tic80_size_name) + tic80_init_trace (); + + trace_one_insn (sd, cpu, cia.ip, 1, + itable[indx].file, itable[indx].line_nr, "fpu", + "%-*s %*f %*f => 0x%.*lx %s", + tic80_size_name, itable[indx].name, + SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input1), + SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input2), + SIZE_HEX, result, tic80_trace_cmp_internal (result)); +} + /* Trace the result of a NOP operation */ char * tic80_trace_nop (int indx) @@ -389,7 +496,7 @@ tic80_trace_cond_br (int indx, SIZE_HEX, target, SIZE_DECIMAL, "", SIZE_HEX, cond, SIZE_DECIMAL, (long)(signed32)cond); - return tic80_trace_buffer; + return tic80_trace_buffer; } /* Trace the result of a unconditional branch operation */ @@ -406,7 +513,7 @@ tic80_trace_ucond_br (int indx, SIZE_HEX, target, (SIZE_DECIMAL*2) + SIZE_HEX + 4, "", SIZE_HEX, target); - return tic80_trace_buffer; + return tic80_trace_buffer; } /* Trace the result of a load or store operation with 2 integer addresses |