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| author | Andrew Cagney <cagney@redhat.com> | 1997-04-24 12:06:27 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-04-24 12:06:27 +0000 |
| commit | abe293a0c6db0ad1cff41f857248832324d36f67 (patch) | |
| tree | 3670ef8760b69101a9515e0fa612859a98f0f6bb /sim/tic80/sim-main.h | |
| parent | e5b9ee95f68d936443776321c2260c8d2e5604f9 (diff) | |
| download | gdb-abe293a0c6db0ad1cff41f857248832324d36f67.zip gdb-abe293a0c6db0ad1cff41f857248832324d36f67.tar.gz gdb-abe293a0c6db0ad1cff41f857248832324d36f67.tar.bz2 | |
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Diffstat (limited to 'sim/tic80/sim-main.h')
| -rw-r--r-- | sim/tic80/sim-main.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/sim/tic80/sim-main.h b/sim/tic80/sim-main.h index 2f726f6..a01ad42 100644 --- a/sim/tic80/sim-main.h +++ b/sim/tic80/sim-main.h @@ -75,27 +75,31 @@ extern void engine_init (SIM_DESC sd); -/* Mechanisms for stopping/restarting the simulation */ +/* Mechanisms for stopping/restarting the simulation. + + A non NULL CPU argument designates the processor that is initiating + the halt. After the simulation has stopped that processor should + be marked as the last one active */ extern void engine_error (SIM_DESC sd, + sim_cpu *cpu, instruction_address cia, const char *fmt, ...); extern void engine_halt (SIM_DESC sd, + sim_cpu *cpu, instruction_address cia, enum sim_stop reason, int siggnal); extern void engine_restart (SIM_DESC sd, + sim_cpu *cpu, instruction_address cia); - - - /* SIMULATE INSTRUCTIONS, various different ways of achieving the same thing (others later) */ |