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authorMichael Meissner <gnu@the-meissners.org>1998-01-28 23:48:13 +0000
committerMichael Meissner <gnu@the-meissners.org>1998-01-28 23:48:13 +0000
commit241b462435f038f9814d25e69974e712b8ad6548 (patch)
treebf4d0a38184c157c4b47bc2727f31329402148b9 /sim/tic80/misc.c
parente086cc6caf8276bf877ce97b1f0aefd9adf23dbc (diff)
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Print compare bits in human readible form
Diffstat (limited to 'sim/tic80/misc.c')
-rw-r--r--sim/tic80/misc.c117
1 files changed, 112 insertions, 5 deletions
diff --git a/sim/tic80/misc.c b/sim/tic80/misc.c
index beb0c68..0548074 100644
--- a/sim/tic80/misc.c
+++ b/sim/tic80/misc.c
@@ -1,5 +1,5 @@
/* TIc80 Simulator.
- Copyright (C) 1997 Free Software Foundation, Inc.
+ Copyright (C) 1997, 1998 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GDB, the GNU debugger.
@@ -137,6 +137,70 @@ tic80_init_trace (void)
tic80_size_name = max_len + sizeof(":m") - 1 + sizeof (":s") - 1;
}
+/* Given an integer which is the result of a comparison, return a string
+ giving which bits are set. */
+
+static char *
+tic80_trace_cmp_internal (unsigned32 flag)
+{
+ struct cmp_bits { unsigned32 bit; char *string; };
+ static char buffer[32*8];
+ static struct cmp_bits bits[] =
+ {
+ { BIT32(29), "hs" },
+ { BIT32(28), "lo" },
+ { BIT32(27), "ls" },
+ { BIT32(26), "hi" },
+ { BIT32(25), "ge" },
+ { BIT32(24), "lt" },
+ { BIT32(23), "le" },
+ { BIT32(22), "gt" },
+ { BIT32(21), "ne" },
+ { BIT32(20), "eq" },
+
+ { BIT32(19), "hs.h" },
+ { BIT32(18), "lo.h" },
+ { BIT32(17), "ls.h" },
+ { BIT32(16), "hi.h" },
+ { BIT32(15), "ge.h" },
+ { BIT32(14), "lt.h" },
+ { BIT32(13), "le.h" },
+ { BIT32(12), "gt.h" },
+ { BIT32(11), "ne.h" },
+ { BIT32(10), "eq.h" },
+
+ { BIT32( 9), "hs.b" },
+ { BIT32( 8), "lo.b" },
+ { BIT32( 7), "ls.b" },
+ { BIT32( 6), "hi.b" },
+ { BIT32( 5), "ge.b" },
+ { BIT32( 4), "lt.b" },
+ { BIT32( 3), "le.b" },
+ { BIT32( 2), "gt.b" },
+ { BIT32( 1), "ne.b" },
+ { BIT32( 0), "eq.b" },
+ { 0, (char *)0 },
+ };
+
+ int i;
+ char *p = buffer;
+
+ for (i = 0; bits[i].bit != 0; i++)
+ {
+ if ((flag & bits[i].bit) != 0)
+ {
+ if (p != buffer)
+ *p++ = ' ';
+
+ strcpy (p, bits[i].string);
+ p += strlen (p);
+ }
+ }
+
+ *p = '\0';
+ return buffer;
+}
+
/* Trace the result of an ALU operation with 2 integer inputs and an integer output */
char *
tic80_trace_alu3 (int indx,
@@ -156,6 +220,26 @@ tic80_trace_alu3 (int indx,
return tic80_trace_buffer;
}
+/* Trace the result of an ALU operation with 2 integer inputs and an integer output
+ that sets the bits from a compare instruction. */
+char *
+tic80_trace_cmp (int indx,
+ unsigned32 result,
+ unsigned32 input1,
+ unsigned32 input2)
+{
+ if (!tic80_size_name)
+ tic80_init_trace ();
+
+ sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld 0x%.*lx/%*ld => 0x%.*lx %s",
+ tic80_size_name, itable[indx].name,
+ SIZE_HEX, input1, SIZE_DECIMAL, (long)(signed32)input1,
+ SIZE_HEX, input2, SIZE_DECIMAL, (long)(signed32)input2,
+ SIZE_HEX, result, tic80_trace_cmp_internal (result));
+
+ return tic80_trace_buffer;
+}
+
/* Trace the result of an ALU operation with 1 integer input and an integer output */
char *
tic80_trace_alu2 (int indx,
@@ -222,7 +306,7 @@ tic80_trace_shift (int indx,
SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result);
return tic80_trace_buffer;
-}
+}
/* Trace the result of an FPU operation with 2 floating point inputs and a floating point output */
void
@@ -287,7 +371,7 @@ tic80_trace_fpu1 (SIM_DESC sd,
SIZE_HEX + SIZE_DECIMAL, sim_fpu_2d (&result));
}
-/* Trace the result of an FPU operation with 1 integer input and an integer output */
+/* Trace the result of an FPU operation with 2 floating point inputs and an integer output */
void
tic80_trace_fpu2i (SIM_DESC sd,
sim_cpu *cpu,
@@ -309,6 +393,29 @@ tic80_trace_fpu2i (SIM_DESC sd,
SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result);
}
+/* Trace the result of an FPU operation with 2 floating point inputs and an integer output
+ that is the result of a comparison. */
+void
+tic80_trace_fpu2cmp (SIM_DESC sd,
+ sim_cpu *cpu,
+ sim_cia cia,
+ int indx,
+ unsigned32 result,
+ sim_fpu input1,
+ sim_fpu input2)
+{
+ if (!tic80_size_name)
+ tic80_init_trace ();
+
+ trace_one_insn (sd, cpu, cia.ip, 1,
+ itable[indx].file, itable[indx].line_nr, "fpu",
+ "%-*s %*f %*f => 0x%.*lx %s",
+ tic80_size_name, itable[indx].name,
+ SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input1),
+ SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input2),
+ SIZE_HEX, result, tic80_trace_cmp_internal (result));
+}
+
/* Trace the result of a NOP operation */
char *
tic80_trace_nop (int indx)
@@ -389,7 +496,7 @@ tic80_trace_cond_br (int indx,
SIZE_HEX, target, SIZE_DECIMAL, "",
SIZE_HEX, cond, SIZE_DECIMAL, (long)(signed32)cond);
- return tic80_trace_buffer;
+ return tic80_trace_buffer;
}
/* Trace the result of a unconditional branch operation */
@@ -406,7 +513,7 @@ tic80_trace_ucond_br (int indx,
SIZE_HEX, target, (SIZE_DECIMAL*2) + SIZE_HEX + 4, "",
SIZE_HEX, target);
- return tic80_trace_buffer;
+ return tic80_trace_buffer;
}
/* Trace the result of a load or store operation with 2 integer addresses