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| author | Andrew Cagney <cagney@redhat.com> | 1997-05-30 07:25:13 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-05-30 07:25:13 +0000 |
| commit | 128b51546e6f158723ce2d1fe6fc87bda78d9583 (patch) | |
| tree | 1110bd1fd7c62ff75b72aec92056378a9a9d3ccb /sim/tic80/misc.c | |
| parent | dccd4d2cf1d51f1f1f7a380bf3f792488852761d (diff) | |
| download | gdb-128b51546e6f158723ce2d1fe6fc87bda78d9583.zip gdb-128b51546e6f158723ce2d1fe6fc87bda78d9583.tar.gz gdb-128b51546e6f158723ce2d1fe6fc87bda78d9583.tar.bz2 | |
Add assembler information to igen input files.
Diffstat (limited to 'sim/tic80/misc.c')
| -rw-r--r-- | sim/tic80/misc.c | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/sim/tic80/misc.c b/sim/tic80/misc.c index a9ce496..a741c48 100644 --- a/sim/tic80/misc.c +++ b/sim/tic80/misc.c @@ -411,8 +411,11 @@ tic80_trace_ucond_br (int indx, /* Trace the result of a load or store operation with 2 integer addresses and an integer output or input */ -char * -tic80_trace_ldst (int indx, +void +tic80_trace_ldst (SIM_DESC sd, + sim_cpu *cpu, + sim_cia cia, + int indx, int st_p, int m_p, int s_p, @@ -432,14 +435,14 @@ tic80_trace_ldst (int indx, if (s_p) strcat (name, ":s"); - sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld 0x%.*lx/%*ld %s 0x%.*lx/%*ld", - tic80_size_name, name, - SIZE_HEX, input1, SIZE_DECIMAL, (long)(signed32)input1, - SIZE_HEX, input2, SIZE_DECIMAL, (long)(signed32)input2, - (!st_p) ? "=>" : "<=", - SIZE_HEX, value, SIZE_DECIMAL, (long)(signed32)value); - - return tic80_trace_buffer; + trace_one_insn (sd, cpu, cia.ip, 1, + itable[indx].file, itable[indx].line_nr, "memory", + "%-*s 0x%.*lx/%*ld 0x%.*lx/%*ld %s 0x%.*lx/%*ld", + tic80_size_name, name, + SIZE_HEX, input1, SIZE_DECIMAL, (long)(signed32)input1, + SIZE_HEX, input2, SIZE_DECIMAL, (long)(signed32)input2, + (!st_p) ? "=>" : "<=", + SIZE_HEX, value, SIZE_DECIMAL, (long)(signed32)value); } #endif /* WITH_TRACE */ |