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| author | Michael Meissner <gnu@the-meissners.org> | 1997-05-13 22:04:32 +0000 |
|---|---|---|
| committer | Michael Meissner <gnu@the-meissners.org> | 1997-05-13 22:04:32 +0000 |
| commit | 1b6f4dde350e06d59468db270111252b4256904c (patch) | |
| tree | 6d5268c7c1baa3903692d940a2b3ab32643f2407 /sim/tic80/interp.c | |
| parent | af942f1dc2d30bf7acfb221331da57af6f258aeb (diff) | |
| download | gdb-1b6f4dde350e06d59468db270111252b4256904c.zip gdb-1b6f4dde350e06d59468db270111252b4256904c.tar.gz gdb-1b6f4dde350e06d59468db270111252b4256904c.tar.bz2 | |
Make sure r0 == 0; Return EINVAL for system calls that are defined but not provided; Provide traps 74-79 as debugging traps
Diffstat (limited to 'sim/tic80/interp.c')
| -rw-r--r-- | sim/tic80/interp.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sim/tic80/interp.c b/sim/tic80/interp.c index 24cfad1..e013302 100644 --- a/sim/tic80/interp.c +++ b/sim/tic80/interp.c @@ -114,6 +114,7 @@ engine_run_until_stop (SIM_DESC sd, do { instruction_word insn = IMEM (cia); + cpu->reg[0] = 0; /* force r0 to always contain 0 */ cia = idecode_issue (sd, insn, cia); } while (*keep_running); @@ -135,6 +136,7 @@ engine_step (SIM_DESC sd) sd->restart_ok = 1; cia = cpu->cia; insn = IMEM (cia); + cpu->reg[0] = 0; /* force r0 to always contain 0 */ cia = idecode_issue (sd, insn, cia); engine_halt (sd, cpu, cia, sim_stopped, SIGTRAP); } |