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| author | Michael Meissner <gnu@the-meissners.org> | 1998-02-14 00:59:44 +0000 |
|---|---|---|
| committer | Michael Meissner <gnu@the-meissners.org> | 1998-02-14 00:59:44 +0000 |
| commit | 77cfb0a136d802954f1ac732c96f72b6a3ac73d7 (patch) | |
| tree | 56c89fe1842dcadc20b5599032292c9e19649398 /sim/tic80/insns | |
| parent | 8970f2fd36669b48e27f47e1b459bd88af88cb96 (diff) | |
| download | gdb-77cfb0a136d802954f1ac732c96f72b6a3ac73d7.zip gdb-77cfb0a136d802954f1ac732c96f72b6a3ac73d7.tar.gz gdb-77cfb0a136d802954f1ac732c96f72b6a3ac73d7.tar.bz2 | |
TIC80 uses little endian doubles, not big endian
Diffstat (limited to 'sim/tic80/insns')
| -rw-r--r-- | sim/tic80/insns | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/tic80/insns b/sim/tic80/insns index 896443f..4ffc6c5 100644 --- a/sim/tic80/insns +++ b/sim/tic80/insns @@ -447,7 +447,7 @@ sim_fpu::function::get_fp_reg:int reg, unsigned32 val, int precision sim_engine_abort (SD, CPU, cia, "DP FP register must be even"); if (reg <= 1) sim_engine_abort (SD, CPU, cia, "DP FP register must be >= 2"); - sim_fpu_232to (&ans, GPR (reg), GPR (reg + 1)); + sim_fpu_232to (&ans, GPR (reg + 1), GPR (reg)); break; case 2: /* 32 bit signed integer */ sim_fpu_i32to (&ans, val, 0); @@ -473,7 +473,7 @@ void::function::set_fp_reg:int Dest, sim_fpu val, int PD sim_engine_abort (SD, CPU, cia, "DP FP Dest register must be even"); if (Dest <= 1) sim_engine_abort (SD, CPU, cia, "DP FP Dest register must be >= 2"); - sim_fpu_to232 (&GPR (Dest + 0), &GPR (Dest + 1), &val); + sim_fpu_to232 (&GPR (Dest + 1), &GPR (Dest + 0), &val); break; } case 2: /* signed */ |