aboutsummaryrefslogtreecommitdiff
path: root/sim/tic80/insns
diff options
context:
space:
mode:
authorAndrew Cagney <cagney@redhat.com>1997-08-27 07:56:27 +0000
committerAndrew Cagney <cagney@redhat.com>1997-08-27 07:56:27 +0000
commitd6fea803dc93be47864a8f9094bc2c1fa0c95b9b (patch)
tree6fbebb64bc72bfc3a37ff56ed3d805415ba439c9 /sim/tic80/insns
parent750b7942964c37db092d613eef64eff6dd5de7f3 (diff)
downloadgdb-d6fea803dc93be47864a8f9094bc2c1fa0c95b9b.zip
gdb-d6fea803dc93be47864a8f9094bc2c1fa0c95b9b.tar.gz
gdb-d6fea803dc93be47864a8f9094bc2c1fa0c95b9b.tar.bz2
Add MSBIT* and LSBIT* macro's to sim-bits.h
Add more macro's for extracting sub word quantites to sim-endian.h
Diffstat (limited to 'sim/tic80/insns')
-rw-r--r--sim/tic80/insns2
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/tic80/insns b/sim/tic80/insns
index 0da69a6..fbbe6ff 100644
--- a/sim/tic80/insns
+++ b/sim/tic80/insns
@@ -1059,7 +1059,7 @@ void::function::do_st:int Source, unsigned32 base, unsigned32 *rBase, int m , in
"0x%lx: st.d with odd source register %d",
cia.ip, Source);
addr = base + (S ? (offset << 3) : offset);
- val = (V4_H8 (GPR(Source + 1)) | V4_L8 (GPR(Source)));
+ val = U8_4 (GPR(Source + 1), GPR(Source));
STORE (addr, 8, val);
}
break;