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| author | Andrew Cagney <cagney@redhat.com> | 1997-04-29 08:41:15 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-04-29 08:41:15 +0000 |
| commit | d5e2c74e384a36eee9c317b736118b36395813fb (patch) | |
| tree | 2ae8e2d5afe8deaa3a5aa1412e56df8a960c0c62 /sim/tic80/ic | |
| parent | c889a1eb873d3e87d2fe38b83c7d27a2915eb792 (diff) | |
| download | gdb-d5e2c74e384a36eee9c317b736118b36395813fb.zip gdb-d5e2c74e384a36eee9c317b736118b36395813fb.tar.gz gdb-d5e2c74e384a36eee9c317b736118b36395813fb.tar.bz2 | |
Numerous fixes.
Diffstat (limited to 'sim/tic80/ic')
| -rw-r--r-- | sim/tic80/ic | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sim/tic80/ic b/sim/tic80/ic index 46dbf48..0fbbb5e 100644 --- a/sim/tic80/ic +++ b/sim/tic80/ic @@ -37,3 +37,7 @@ compute:Code:Code: # compute:SignedOffset:SignedOffset: compute:SignedOffset:vSignedOffset:signed_word:SEXT (SignedOffset, 14) +# +compute:UCRN:UCRN: +compute:INDCR:INDCR: +compute:INDCR:UCRN:unsigned32:(INDCR == 0 ? 0 : (CPU)->reg[INDCR]) |