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| author | Andrew Cagney <cagney@redhat.com> | 1997-04-29 08:41:15 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-04-29 08:41:15 +0000 |
| commit | d5e2c74e384a36eee9c317b736118b36395813fb (patch) | |
| tree | 2ae8e2d5afe8deaa3a5aa1412e56df8a960c0c62 /sim/tic80/alu.h | |
| parent | c889a1eb873d3e87d2fe38b83c7d27a2915eb792 (diff) | |
| download | gdb-d5e2c74e384a36eee9c317b736118b36395813fb.zip gdb-d5e2c74e384a36eee9c317b736118b36395813fb.tar.gz gdb-d5e2c74e384a36eee9c317b736118b36395813fb.tar.bz2 | |
Numerous fixes.
Diffstat (limited to 'sim/tic80/alu.h')
| -rw-r--r-- | sim/tic80/alu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/tic80/alu.h b/sim/tic80/alu.h index 2f0aad5..5b44cad 100644 --- a/sim/tic80/alu.h +++ b/sim/tic80/alu.h @@ -18,11 +18,11 @@ #define IMEM(EA) sim_core_read_4(sd, sim_core_execute_map, (EA)) #define MEM(SIGN, EA, NR_BYTES) \ -((SIGN##_##NR_BYTES) sim_core_read_##NR_BYTES(sd, sim_core_read_map, (EA))) +((SIGN##_##NR_BYTES) sim_core_read_##NR_BYTES (SD, sim_core_read_map, (EA) & ~(NR_BYTES - 1))) #define STORE(EA, NR_BYTES, VAL) \ do { \ - sim_core_write_##NR_BYTES(sd, sim_core_write_map, (EA), (VAL)); \ + sim_core_write_##NR_BYTES (SD, sim_core_write_map, (EA) & ~(NR_BYTES - 1), (VAL)); \ } while (0) |