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| author | Andrew Cagney <cagney@redhat.com> | 1998-03-11 12:18:39 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1998-03-11 12:18:39 +0000 |
| commit | eefc25e592ff4681d6a9806e43cd2fc432721ccb (patch) | |
| tree | 76b215564db81c86cb972a7ef5b521d967635acc /sim/tic80/alu.h | |
| parent | 10572b6a43dcf96c17a10d515b113840dd0b1f7f (diff) | |
| download | gdb-eefc25e592ff4681d6a9806e43cd2fc432721ccb.zip gdb-eefc25e592ff4681d6a9806e43cd2fc432721ccb.tar.gz gdb-eefc25e592ff4681d6a9806e43cd2fc432721ccb.tar.bz2 | |
Allow more than just read, write and exec memory spaces in the core
module.
Diffstat (limited to 'sim/tic80/alu.h')
| -rw-r--r-- | sim/tic80/alu.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sim/tic80/alu.h b/sim/tic80/alu.h index 4def0ee..b5bc7c1 100644 --- a/sim/tic80/alu.h +++ b/sim/tic80/alu.h @@ -39,20 +39,20 @@ with this program; if not, write to the Free Software Foundation, Inc., /* Bring data in from the cold */ #define IMEM32(CIA) \ -(sim_core_read_aligned_4(STATE_CPU (sd, 0), CIA, sim_core_execute_map, (CIA).ip)) +(sim_core_read_aligned_4(STATE_CPU (sd, 0), CIA, exec_map, (CIA).ip)) #define IMEM32_IMMED(CIA, N) \ -(sim_core_read_aligned_4 (STATE_CPU (sd, 0), CIA, sim_core_execute_map, (CIA).ip + 4 * (N))) +(sim_core_read_aligned_4 (STATE_CPU (sd, 0), CIA, exec_map, (CIA).ip + 4 * (N))) #define MEM(SIGN, EA, NR_BYTES) \ ((SIGN##_##NR_BYTES) sim_core_read_unaligned_##NR_BYTES (STATE_CPU (sd, 0), cia, \ - sim_core_read_map, \ + read_map, \ (EA))) #define STORE(EA, NR_BYTES, VAL) \ do { \ sim_core_write_unaligned_##NR_BYTES (STATE_CPU (sd, 0), cia, \ - sim_core_write_map, \ + write_map, \ (EA), (VAL)); \ } while (0) |