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author | Andrew Cagney <cagney@redhat.com> | 1997-09-04 03:47:39 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-09-04 03:47:39 +0000 |
commit | a34abff813f4fdd5f289ea45de9e874e31e7edf3 (patch) | |
tree | f6d3be383893c3adaae166e570d5eccd71f08427 /sim/tic80/Makefile.in | |
parent | 600d83316cfa68f72666d792244890789812b51a (diff) | |
download | gdb-a34abff813f4fdd5f289ea45de9e874e31e7edf3.zip gdb-a34abff813f4fdd5f289ea45de9e874e31e7edf3.tar.gz gdb-a34abff813f4fdd5f289ea45de9e874e31e7edf3.tar.bz2 |
o Add modulo argument to sim_core_attach
o Add sim-memopt module - memory option processing.
Diffstat (limited to 'sim/tic80/Makefile.in')
-rw-r--r-- | sim/tic80/Makefile.in | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sim/tic80/Makefile.in b/sim/tic80/Makefile.in index 570f208..f15b68f 100644 --- a/sim/tic80/Makefile.in +++ b/sim/tic80/Makefile.in @@ -19,6 +19,7 @@ SIM_OBJS = sim-endian.o sim-bits.o sim-config.o \ sim-io.o \ sim-utils.o \ sim-load.o \ + sim-memopt.o \ sim-module.o \ sim-options.o \ sim-trace.o \ |