aboutsummaryrefslogtreecommitdiff
path: root/sim/tic80/ChangeLog
diff options
context:
space:
mode:
authorAndrew Cagney <cagney@redhat.com>1998-01-31 06:23:41 +0000
committerAndrew Cagney <cagney@redhat.com>1998-01-31 06:23:41 +0000
commit9ec6741b177fbd4d872a13002d540b60b11e4b78 (patch)
tree882348d86144658f9148f517f17c39dabe54df1e /sim/tic80/ChangeLog
parent5266a484f4aa49a9ea52adbca949f6224ec2fcee (diff)
downloadgdb-9ec6741b177fbd4d872a13002d540b60b11e4b78.zip
gdb-9ec6741b177fbd4d872a13002d540b60b11e4b78.tar.gz
gdb-9ec6741b177fbd4d872a13002d540b60b11e4b78.tar.bz2
igen: Fix SMP simulator generator support.
Use the bfd-processor name in the sim-engine switch. Add nr_cpus argument to sim_engine_run. tic80, v850, d30v, mips, common: Update mips: Fill in bfd-processor field of model records so that they match ../bfd/archures.
Diffstat (limited to 'sim/tic80/ChangeLog')
-rw-r--r--sim/tic80/ChangeLog5
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/tic80/ChangeLog b/sim/tic80/ChangeLog
index 0405124..d0a2f97 100644
--- a/sim/tic80/ChangeLog
+++ b/sim/tic80/ChangeLog
@@ -1,3 +1,8 @@
+Fri Jan 30 11:47:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * cpu.h (CPU_CIA): Delete macro, replace with...
+ (CIA_SET, CIA_GET): Define.
+
Wed Jan 28 18:44:33 1998 Michael Meissner <meissner@cygnus.com>
* misc.c (tic80_trace_cmp_internal): New function to return