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author | Jim Wilson <jim.wilson@linaro.org> | 2017-03-03 13:10:45 -0800 |
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committer | Jim Wilson <jim.wilson@linaro.org> | 2017-03-03 13:10:45 -0800 |
commit | 8ecbe595e69a84a0e3053884832d63af37113680 (patch) | |
tree | ce6ff5924c03fd1d2287b713bb8150aaeccc4def /sim/testsuite | |
parent | df97be551faa262732128493c8ac159ae4b7f6d3 (diff) | |
download | gdb-8ecbe595e69a84a0e3053884832d63af37113680.zip gdb-8ecbe595e69a84a0e3053884832d63af37113680.tar.gz gdb-8ecbe595e69a84a0e3053884832d63af37113680.tar.bz2 |
Fix umulh and smulh bugs. Fix bugs in last week's sumov.s testsuite.
sim/aarch64/
* simulator.c (mul64hi): Shift carry left by 32.
(smulh): Change signum to negate. If negate, invert result, and add
carry bit if low part of multiply result is zero.
sim/testsuite/sim/aarch64/
* sumov.s: Correct compare test values.
* sumulh.s: New.
Diffstat (limited to 'sim/testsuite')
-rw-r--r-- | sim/testsuite/sim/aarch64/ChangeLog | 5 | ||||
-rw-r--r-- | sim/testsuite/sim/aarch64/sumov.s | 12 | ||||
-rw-r--r-- | sim/testsuite/sim/aarch64/sumulh.s | 56 |
3 files changed, 68 insertions, 5 deletions
diff --git a/sim/testsuite/sim/aarch64/ChangeLog b/sim/testsuite/sim/aarch64/ChangeLog index b332ba2..2fcde5d 100644 --- a/sim/testsuite/sim/aarch64/ChangeLog +++ b/sim/testsuite/sim/aarch64/ChangeLog @@ -1,3 +1,8 @@ +2017-03-03 Jim Wilson <jim.wilson@linaro.org> + + * sumov.s: Correct compare test values. + * sumulh.s: New. + 2017-02-25 Jim Wilson <jim.wilson@linaro.org> * sumov.s: New. diff --git a/sim/testsuite/sim/aarch64/sumov.s b/sim/testsuite/sim/aarch64/sumov.s index 69021cb..7180c6a 100644 --- a/sim/testsuite/sim/aarch64/sumov.s +++ b/sim/testsuite/sim/aarch64/sumov.s @@ -34,7 +34,7 @@ input: smov w1, v0.h[4] cmp w0, #0x0201 bne .Lfailure - cmp w1, #-2315 + cmp w1, #-3343 bne .Lfailure smov x0, v0.h[1] @@ -50,8 +50,9 @@ input: movk x2, #0x0807, lsl #16 cmp x0, x2 bne .Lfailure - mov x3, #0xf6f5 - movk x3, #0xf8f7, lsl #16 + mov w3, #0xf6f5 + movk w3, #0xf8f7, lsl #16 + sxtw x3, w3 cmp x1, x3 bne .Lfailure @@ -64,9 +65,10 @@ input: umov w0, v0.h[0] umov w1, v0.h[4] - cmp w0, #0201 + cmp w0, #0x0201 bne .Lfailure - cmp w1, #0xf2f1 + mov w2, #0xf2f1 + cmp w1, w2 bne .Lfailure umov w0, v0.s[0] diff --git a/sim/testsuite/sim/aarch64/sumulh.s b/sim/testsuite/sim/aarch64/sumulh.s new file mode 100644 index 0000000..17f1ecd --- /dev/null +++ b/sim/testsuite/sim/aarch64/sumulh.s @@ -0,0 +1,56 @@ +# mach: aarch64 + +# Check the multiply highpart instructions: smulh, umulh. + +# Test -2*2, -1<<32*-1<<32, -2*-2, and 2*2. + +.include "testutils.inc" + + .data + .align 4 + + start + + mov x0, #-2 + mov x1, #2 + smulh x2, x0, x1 + cmp x2, #-1 + bne .Lfailure + umulh x3, x0, x1 + cmp x3, #1 + bne .Lfailure + + mov w0, #-1 + lsl x0, x0, #32 // 0xffffffff00000000 + mov x1, x0 + smulh x2, x0, x1 + cmp x2, #1 + bne .Lfailure + umulh x3, x0, x1 + mov w4, #-2 + lsl x4, x4, #32 + add x4, x4, #1 // 0xfffffffe00000001 + cmp x3, x4 + bne .Lfailure + + mov x0, #-2 + mov x1, #-2 + smulh x2, x0, x1 + cmp x2, #0 + bne .Lfailure + umulh x3, x0, x1 + cmp x3, #-4 + bne .Lfailure + + mov x0, #2 + mov x1, #2 + smulh x2, x0, x1 + cmp x2, #0 + bne .Lfailure + umulh x3, x0, x1 + cmp x3, #0 + bne .Lfailure + + pass +.Lfailure: + fail |