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| author | Jim Wilson <jim.wilson@linaro.org> | 2017-04-08 07:10:38 -0700 |
|---|---|---|
| committer | Jim Wilson <jim.wilson@linaro.org> | 2017-04-08 07:10:38 -0700 |
| commit | ae27d3fe76ffb54e7d413a67d8c8d76ca78a9681 (patch) | |
| tree | 83574fac96777dad9d81878088f5432ab76616cc /sim/testsuite | |
| parent | aebcde5eb475befba571ca9ae7b6c58126d41160 (diff) | |
| download | gdb-ae27d3fe76ffb54e7d413a67d8c8d76ca78a9681.zip gdb-ae27d3fe76ffb54e7d413a67d8c8d76ca78a9681.tar.gz gdb-ae27d3fe76ffb54e7d413a67d8c8d76ca78a9681.tar.bz2 | |
Support the fcmXX zero instructions.
sim/aarch64/
* simulator.c (do_scalar_FCMGE_zero): New.
(do_scalar_FCMLE_zero, do_scalar_FCMGT_zero, do_scalar_FCMEQ_zero)
(do_scalar_FCMLT_zero): Likewise.
(do_scalar_vec): Add calls to new functions.
sim/testsuite/sim/aarch64/
* fcmXX.s: New.
Diffstat (limited to 'sim/testsuite')
| -rw-r--r-- | sim/testsuite/sim/aarch64/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/testsuite/sim/aarch64/fcmXX.s | 77 |
2 files changed, 81 insertions, 0 deletions
diff --git a/sim/testsuite/sim/aarch64/ChangeLog b/sim/testsuite/sim/aarch64/ChangeLog index 0941446..5aaa67f 100644 --- a/sim/testsuite/sim/aarch64/ChangeLog +++ b/sim/testsuite/sim/aarch64/ChangeLog @@ -1,3 +1,7 @@ +2017-04-08 Jim Wilson <jim.wilson@linaro.org> + + * fcmXX.s: New. + 2017-03-25 Jim Wilson <jim.wilson@linaro.org> * adds.s: Add checks for values -2 and 1, where C is not set. diff --git a/sim/testsuite/sim/aarch64/fcmXX.s b/sim/testsuite/sim/aarch64/fcmXX.s new file mode 100644 index 0000000..cc1a2a9 --- /dev/null +++ b/sim/testsuite/sim/aarch64/fcmXX.s @@ -0,0 +1,77 @@ +# mach: aarch64 + +# Check the FP scalar compare zero instructions: fcmeq, fcmle, fcmlt, fcmge, +# fcmgt. +# Check values -1, 0, and 1. + +.include "testutils.inc" + + start + fmov s0, wzr + fcmeq s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #-1 + bne .Lfailure + fmov s0, #-1.0 + fcmeq s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #0 + bne .Lfailure + fmov d0, xzr + fcmeq d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #-1 + bne .Lfailure + fmov d0, #1.0 + fcmeq d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #0 + bne .Lfailure + + fmov s0, #-1.0 + fcmle s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #-1 + bne .Lfailure + fmov d0, #-1.0 + fcmle d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #-1 + bne .Lfailure + + fmov s0, #-1.0 + fcmlt s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #-1 + bne .Lfailure + fmov d0, #-1.0 + fcmlt d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #-1 + bne .Lfailure + + fmov s0, #1.0 + fcmge s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #-1 + bne .Lfailure + fmov d0, #1.0 + fcmge d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #-1 + bne .Lfailure + + fmov s0, #1.0 + fcmgt s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #-1 + bne .Lfailure + fmov d0, #1.0 + fcmgt d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #-1 + bne .Lfailure + + pass +.Lfailure: + fail |