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| author | Jason Molenda <jmolenda@apple.com> | 1999-11-17 02:31:06 +0000 |
|---|---|---|
| committer | Jason Molenda <jmolenda@apple.com> | 1999-11-17 02:31:06 +0000 |
| commit | 4ce44c668ddc0a909c3f081d98c68bea90a93af9 (patch) | |
| tree | cf330e250ee02bf77884cb91292faaaa849c5837 /sim/testsuite | |
| parent | 2daf4fd8960262b76e597427e2e230b3fe6470b3 (diff) | |
| download | gdb-4ce44c668ddc0a909c3f081d98c68bea90a93af9.zip gdb-4ce44c668ddc0a909c3f081d98c68bea90a93af9.tar.gz gdb-4ce44c668ddc0a909c3f081d98c68bea90a93af9.tar.bz2 | |
import gdb-1999-11-16 snapshot
Diffstat (limited to 'sim/testsuite')
| -rw-r--r-- | sim/testsuite/d10v-elf/ChangeLog | 9 | ||||
| -rw-r--r-- | sim/testsuite/d10v-elf/t-mvtc.s | 56 |
2 files changed, 61 insertions, 4 deletions
diff --git a/sim/testsuite/d10v-elf/ChangeLog b/sim/testsuite/d10v-elf/ChangeLog index 723f88a..de4a22c 100644 --- a/sim/testsuite/d10v-elf/ChangeLog +++ b/sim/testsuite/d10v-elf/ChangeLog @@ -1,3 +1,12 @@ +Fri Oct 29 18:36:34 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * t-mvtc.s: Check that the user can not modify the DM bit in the + BPSW or DPSW. + +Thu Oct 28 01:47:26 1999 Andrew Cagney <cagney@b1.cygnus.com> + + * t-mvtc.s: Update. Check that user can not modify DM bit. + Wed Sep 8 19:34:55 MDT 1999 Diego Novillo <dnovillo@cygnus.com> * t-ld-st.s: New file. diff --git a/sim/testsuite/d10v-elf/t-mvtc.s b/sim/testsuite/d10v-elf/t-mvtc.s index cbf9308..2eed833 100644 --- a/sim/testsuite/d10v-elf/t-mvtc.s +++ b/sim/testsuite/d10v-elf/t-mvtc.s @@ -17,7 +17,7 @@ checkpsw2 4 PSW_DB loadpsw2 PSW_DM - checkpsw2 5 PSW_DM + checkpsw2 5 0 ;; PSW_DM loadpsw2 PSW_IE checkpsw2 6 PSW_IE @@ -65,17 +65,65 @@ mvfc r7, cr11 check 18 r7 0xbeee -;;; Check that certain bits of the DPSW and BPSW are hardwired to zero +;;; Check that certain bits of the PSW, DPSW and BPSW are hardwired to zero +psw_ffff: + ldi r6, 0xffff + mvtc r6, psw + mvfc r7, psw + check 18 r7 0xb7cd + +bpsw_ffff: ldi r6, 0xffff mvtc r6, bpsw mvfc r7, bpsw - check 18 r7 0xbfcd + check 18 r7 0xb7cd +dpsw_ffff: ldi r6, 0xffff mvtc r6, dpsw mvfc r7, dpsw - check 18 r7 0xbfcd + check 18 r7 0xb7cd + +;;; Another check. Very similar + +psw_dfff: + ldi r6, 0xdfff + mvtc r6, psw + mvfc r7, psw + check 18 r7 0x97cd + +bpsw_dfff: + ldi r6, 0xdfff + mvtc r6, bpsw + mvfc r7, bpsw + check 18 r7 0x97cd + +dpsw_dfff: + ldi r6, 0xdfff + mvtc r6, dpsw + mvfc r7, dpsw + check 18 r7 0x97cd + +;;; And again. + +psw_8005: + ldi r6, 0x8005 + mvtc r6, psw + mvfc r7, psw + check 18 r7 0x8005 + +bpsw_8005: + ldi r6, 0x8005 + mvtc r6, bpsw + mvfc r7, bpsw + check 18 r7 0x8005 + +dpsw_8005: + ldi r6, 0x8005 + mvtc r6, dpsw + mvfc r7, dpsw + check 18 r7 0x8005 exit0 |