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author | Mike Frysinger <vapier@gentoo.org> | 2021-01-05 22:09:57 -0500 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2021-01-15 19:18:34 -0500 |
commit | 1368b914e93a3af332f787d3d41c106d11bb90da (patch) | |
tree | 9893ccae5d2d8cbf2ce855e09d6b8f30b56a21bc /sim/testsuite/frv/cldshu.cgs | |
parent | e403a898b5893337baea73bcb001ece74042f351 (diff) | |
download | gdb-1368b914e93a3af332f787d3d41c106d11bb90da.zip gdb-1368b914e93a3af332f787d3d41c106d11bb90da.tar.gz gdb-1368b914e93a3af332f787d3d41c106d11bb90da.tar.bz2 |
sim: testsuite: flatten tree
Now that all port tests live under testsuite/sim/*/, and none live
in testsuite/ directly, flatten the structure by moving all of the
dirs under testsuite/sim/ to testsuite/ directly.
We need to stop passing --tool to dejagnu so that it searches all
dirs and not just ones that start with "sim". Since we have no
other dirs in this tree, and no plans to add any, should be fine.
Diffstat (limited to 'sim/testsuite/frv/cldshu.cgs')
-rw-r--r-- | sim/testsuite/frv/cldshu.cgs | 159 |
1 files changed, 159 insertions, 0 deletions
diff --git a/sim/testsuite/frv/cldshu.cgs b/sim/testsuite/frv/cldshu.cgs new file mode 100644 index 0000000..491352e --- /dev/null +++ b/sim/testsuite/frv/cldshu.cgs @@ -0,0 +1,159 @@ +# frv testcase for cldshu @($GRi,$GRj),$GRk,$CCi,$cond +# mach: all + + .include "testutils.inc" + + start + + .global cldshu +cldshu: + set_spr_immed 0x1b1b,cccr + set_gr_gr sp,gr20 + + set_mem_limmed 0xdead,0xbeef,sp + set_gr_limmed 0xbeef,0xdead,gr8 + + set_gr_gr sp,gr9 + set_gr_immed 0,gr7 + cldshu @(sp,gr7),gr8,cc0,1 + test_gr_limmed 0xffff,0xdead,gr8 + test_gr_gr sp,gr9 + + inc_gr_immed 2,gr9 + set_gr_immed 2,gr7 + cldshu @(sp,gr7),gr8,cc0,1 + test_gr_limmed 0xffff,0xbeef,gr8 + test_gr_gr sp,gr9 + + inc_gr_immed -2,sp + set_mem_limmed 0xffff,0x0000,sp + inc_gr_immed 4,sp + set_gr_immed -2,gr7 + cldshu @(sp,gr7),gr8,cc4,1 + test_gr_immed 0,gr8 + test_gr_gr sp,gr9 + + set_gr_gr gr20,sp + set_mem_limmed 0xdead,0xbeef,sp + set_gr_limmed 0xbeef,0xdead,gr8 + + set_gr_gr sp,gr9 + set_gr_immed 0,gr7 + cldshu @(sp,gr7),gr8,cc0,0 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + set_gr_immed 2,gr7 + cldshu @(sp,gr7),gr8,cc0,0 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + inc_gr_immed 4,gr9 + set_mem_limmed 0xffff,0x0000,sp + inc_gr_immed 4,sp + set_gr_immed -2,gr7 + cldshu @(sp,gr7),gr8,cc4,0 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + set_gr_gr sp,gr20 + set_mem_limmed 0xdead,0xbeef,sp + set_gr_limmed 0xbeef,0xdead,gr8 + + set_gr_gr sp,gr9 + set_gr_immed 0,gr7 + cldshu @(sp,gr7),gr8,cc1,0 + test_gr_limmed 0xffff,0xdead,gr8 + test_gr_gr sp,gr9 + + inc_gr_immed 2,gr9 + set_gr_immed 2,gr7 + cldshu @(sp,gr7),gr8,cc1,0 + test_gr_limmed 0xffff,0xbeef,gr8 + test_gr_gr sp,gr9 + + inc_gr_immed -2,sp + set_mem_limmed 0xffff,0x0000,sp + inc_gr_immed 4,sp + set_gr_immed -2,gr7 + cldshu @(sp,gr7),gr8,cc5,0 + test_gr_immed 0,gr8 + test_gr_gr sp,gr9 + + set_gr_gr gr20,sp + set_mem_limmed 0xdead,0xbeef,sp + set_gr_limmed 0xbeef,0xdead,gr8 + + set_gr_gr sp,gr9 + set_gr_immed 0,gr7 + cldshu @(sp,gr7),gr8,cc1,1 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + set_gr_immed 2,gr7 + cldshu @(sp,gr7),gr8,cc1,1 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + inc_gr_immed 4,gr9 + set_mem_limmed 0xffff,0x0000,sp + inc_gr_immed 4,sp + set_gr_immed -2,gr7 + cldshu @(sp,gr7),gr8,cc5,1 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + set_gr_gr gr20,sp + set_mem_limmed 0xdead,0xbeef,sp + set_gr_limmed 0xbeef,0xdead,gr8 + + set_gr_gr sp,gr9 + set_gr_immed 0,gr7 + cldshu @(sp,gr7),gr8,cc2,0 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + set_gr_immed 2,gr7 + cldshu @(sp,gr7),gr8,cc2,1 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + inc_gr_immed 4,gr9 + set_mem_limmed 0xffff,0x0000,sp + inc_gr_immed 4,sp + set_gr_immed -2,gr7 + cldshu @(sp,gr7),gr8,cc6,0 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + set_gr_gr gr20,sp + set_mem_limmed 0xdead,0xbeef,sp + set_gr_limmed 0xbeef,0xdead,gr8 + + set_gr_gr sp,gr9 + set_gr_immed 0,gr7 + cldshu @(sp,gr7),gr8,cc3,1 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + set_gr_immed 2,gr7 + cldshu @(sp,gr7),gr8,cc3,0 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + inc_gr_immed 4,gr9 + set_mem_limmed 0xffff,0x0000,sp + inc_gr_immed 4,sp + set_gr_immed -2,gr7 + cldshu @(sp,gr7),gr8,cc7,1 + test_gr_limmed 0xbeef,0xdead,gr8 + test_gr_gr sp,gr9 + + set_gr_gr gr20,sp + set_mem_limmed 0xdead,0xbeef,sp + set_gr_gr sp,gr8 + set_gr_immed 2,gr7 + cldshu @(gr8,gr7),gr8,cc0,1 + test_gr_limmed 0xffff,0xbeef,gr8 + + pass |