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author | Andrew Cagney <cagney@redhat.com> | 1997-06-27 08:33:16 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-06-27 08:33:16 +0000 |
commit | 3a8e858f24704fbd4493b8a7f98dfb0578768159 (patch) | |
tree | 2f6908ddc8d7dc607ba6cd5b6ed0a042857794cd /sim/testsuite/d30v-elf | |
parent | 217947b23db936fdc814a757d51aa161be3040d0 (diff) | |
download | gdb-3a8e858f24704fbd4493b8a7f98dfb0578768159.zip gdb-3a8e858f24704fbd4493b8a7f98dfb0578768159.tar.gz gdb-3a8e858f24704fbd4493b8a7f98dfb0578768159.tar.bz2 |
Add test for dbt/rtd instructions
Diffstat (limited to 'sim/testsuite/d30v-elf')
-rw-r--r-- | sim/testsuite/d30v-elf/os-dbt.S | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/sim/testsuite/d30v-elf/os-dbt.S b/sim/testsuite/d30v-elf/os-dbt.S new file mode 100644 index 0000000..3468867 --- /dev/null +++ b/sim/testsuite/d30v-elf/os-dbt.S @@ -0,0 +1,38 @@ + .globl _start + # + # NOTE: Registers r10-r11 are reserved for the interrupt handler + # while the others can be used by the main loop/start code. + +_start: + # patch the DBT handler + add r1, r0, handler + ldw r2, @(r1, 0) + ldw r3, @(r1, 4) + # DBT vector address + add r1, r0, 0xfffff120 + stw r2, @(r1, 0) + stw r3, @(r1, 4) + + # try out the breakpoint/return + add r2, r0, 47 + #dbt + nop + .long 0x00b00000 + nop + + # exit with what ever the breakpoint hander set r2 to. + nop + .long 0x0e000004 + nop + +handler: + jmp real_handler + + # The Breakpoint handler sets r2 to 0 if PSW was set correctly. +real_handler: + mvfsys r2, cr0 + sub r2, r0, 0x08000000 + #rtd + nop + .long 0x00a00000 + nop |