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author | Andrew Cagney <cagney@redhat.com> | 1997-12-09 05:46:48 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-12-09 05:46:48 +0000 |
commit | c10ae9ad33b261235bc7b63b89a3bb6d0ca7a291 (patch) | |
tree | bd2f8ca7d580c5243b017cb1910f68ed30629e2a /sim/testsuite/d10v-elf | |
parent | c02ed6a8a3e3c8bd68f7212c4a5e03f781d4f122 (diff) | |
download | gdb-c10ae9ad33b261235bc7b63b89a3bb6d0ca7a291.zip gdb-c10ae9ad33b261235bc7b63b89a3bb6d0ca7a291.tar.gz gdb-c10ae9ad33b261235bc7b63b89a3bb6d0ca7a291.tar.bz2 |
Test/fix d10v RTE instruction.
Diffstat (limited to 'sim/testsuite/d10v-elf')
-rw-r--r-- | sim/testsuite/d10v-elf/.Sanitize | 1 | ||||
-rw-r--r-- | sim/testsuite/d10v-elf/t-rte.s | 18 |
2 files changed, 19 insertions, 0 deletions
diff --git a/sim/testsuite/d10v-elf/.Sanitize b/sim/testsuite/d10v-elf/.Sanitize index dcdaad8..25ed0ae 100644 --- a/sim/testsuite/d10v-elf/.Sanitize +++ b/sim/testsuite/d10v-elf/.Sanitize @@ -15,6 +15,7 @@ t-msbu.s t-rac.s t-rachi.s t-rep.s +t-rte.s t-mulxu.s t-sub.s t-subi.s diff --git a/sim/testsuite/d10v-elf/t-rte.s b/sim/testsuite/d10v-elf/t-rte.s new file mode 100644 index 0000000..5ce31dd --- /dev/null +++ b/sim/testsuite/d10v-elf/t-rte.s @@ -0,0 +1,18 @@ +.include "t-macros.i" + + start + + PSW_BITS = PSW_C|PSW_F0|PSW_F1 + + ldi r6, #success@word + mvtc r6, bpc + ldi r6, #PSW_BITS + mvtc r6, bpsw + +test_rte: + RTE + exit47 + +success: + checkpsw2 1 PSW_BITS + exit0 |